Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r010-oct2-167813598800273.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................
=====================================================================
Generated by BenchKit 2-5348
Executing tool marciexred
Input is AirplaneLD-PT-0200, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r010-oct2-167813598800273
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.1M
-rw-r--r-- 1 mcc users 110K Feb 26 11:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 411K Feb 26 11:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 79K Feb 26 11:27 CTLFireability.txt
-rw-r--r-- 1 mcc users 470K Feb 26 11:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 50K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 143K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 47K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 213K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 224K Feb 26 11:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 807K Feb 26 11:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 87K Feb 26 11:40 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 507K Feb 26 11:40 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 31K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 872K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-00
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-01
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-02
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-03
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-04
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-05
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-06
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-07
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-08
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-09
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-10
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-11
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-12
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-13
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-14
FORMULA_NAME AirplaneLD-PT-0200-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678678684520

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marciexred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-0200
Applying reductions before tool marcie
Invoking reducer
Running Version 202303021504
[2023-03-13 03:38:07] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-13 03:38:07] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-13 03:38:07] [INFO ] Load time of PNML (sax parser for PT used): 136 ms
[2023-03-13 03:38:07] [INFO ] Transformed 1419 places.
[2023-03-13 03:38:07] [INFO ] Transformed 1608 transitions.
[2023-03-13 03:38:07] [INFO ] Parsed PT model containing 1419 places and 1608 transitions and 6128 arcs in 265 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 56 ms.
Reduce places removed 602 places and 0 transitions.
FORMULA AirplaneLD-PT-0200-CTLCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 817 out of 817 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 817/817 places, 1608/1608 transitions.
Applied a total of 0 rules in 17 ms. Remains 817 /817 variables (removed 0) and now considering 1608/1608 (removed 0) transitions.
// Phase 1: matrix 1608 rows 817 cols
[2023-03-13 03:38:08] [INFO ] Computed 3 place invariants in 109 ms
[2023-03-13 03:38:08] [INFO ] Implicit Places using invariants in 677 ms returned []
[2023-03-13 03:38:08] [INFO ] Invariant cache hit.
[2023-03-13 03:38:09] [INFO ] Implicit Places using invariants and state equation in 765 ms returned []
Implicit Place search using SMT with State Equation took 1473 ms to find 0 implicit places.
[2023-03-13 03:38:09] [INFO ] Invariant cache hit.
[2023-03-13 03:38:10] [INFO ] Dead Transitions using invariants and state equation in 1398 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2892 ms. Remains : 817/817 places, 1608/1608 transitions.
Support contains 817 out of 817 places after structural reductions.
[2023-03-13 03:38:11] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-13 03:38:11] [INFO ] Flatten gal took : 113 ms
FORMULA AirplaneLD-PT-0200-CTLCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-13 03:38:11] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA AirplaneLD-PT-0200-CTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-13 03:38:11] [INFO ] Flatten gal took : 68 ms
[2023-03-13 03:38:11] [INFO ] Input system was already deterministic with 1608 transitions.
Incomplete random walk after 10000 steps, including 1267 resets, run finished after 821 ms. (steps per millisecond=12 ) properties (out of 38) seen :15
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 1 ms. (steps per millisecond=1001 ) properties (out of 23) seen :0
Running SMT prover for 23 properties.
[2023-03-13 03:38:12] [INFO ] Invariant cache hit.
[2023-03-13 03:38:13] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-13 03:38:13] [INFO ] [Real]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-13 03:38:13] [INFO ] After 1009ms SMT Verify possible using all constraints in real domain returned unsat :6 sat :0 real:17
[2023-03-13 03:38:14] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-13 03:38:14] [INFO ] [Nat]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-13 03:38:15] [INFO ] After 1611ms SMT Verify possible using all constraints in natural domain returned unsat :23 sat :0
Fused 23 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 23 atomic propositions for a total of 13 simplifications.
FORMULA AirplaneLD-PT-0200-CTLCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0200-CTLCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-13 03:38:15] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 85 ms
[2023-03-13 03:38:15] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA AirplaneLD-PT-0200-CTLCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0200-CTLCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0200-CTLCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 56 ms
[2023-03-13 03:38:15] [INFO ] Input system was already deterministic with 1608 transitions.
Support contains 13 out of 817 places (down from 613) after GAL structural reductions.
FORMULA AirplaneLD-PT-0200-CTLCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0200-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0200-CTLCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 817 stabilizing places and 1608 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 817 transition count 1608
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 817/817 places, 1608/1608 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 814 transition count 1608
Discarding 795 places :
Symmetric choice reduction at 1 with 795 rule applications. Total rules 798 place count 19 transition count 813
Iterating global reduction 1 with 795 rules applied. Total rules applied 1593 place count 19 transition count 813
Ensure Unique test removed 795 transitions
Reduce isomorphic transitions removed 795 transitions.
Iterating post reduction 1 with 795 rules applied. Total rules applied 2388 place count 19 transition count 18
Applied a total of 2388 rules in 23 ms. Remains 19 /817 variables (removed 798) and now considering 18/1608 (removed 1590) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 19/817 places, 18/1608 transitions.
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 1 ms
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 0 ms
[2023-03-13 03:38:15] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 817/817 places, 1608/1608 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 814 transition count 1608
Discarding 792 places :
Symmetric choice reduction at 1 with 792 rule applications. Total rules 795 place count 22 transition count 816
Iterating global reduction 1 with 792 rules applied. Total rules applied 1587 place count 22 transition count 816
Ensure Unique test removed 792 transitions
Reduce isomorphic transitions removed 792 transitions.
Iterating post reduction 1 with 792 rules applied. Total rules applied 2379 place count 22 transition count 24
Applied a total of 2379 rules in 14 ms. Remains 22 /817 variables (removed 795) and now considering 24/1608 (removed 1584) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 22/817 places, 24/1608 transitions.
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 1 ms
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 1 ms
[2023-03-13 03:38:15] [INFO ] Input system was already deterministic with 24 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 817/817 places, 1608/1608 transitions.
Graph (complete) has 2123 edges and 817 vertex of which 410 are kept as prefixes of interest. Removing 407 places using SCC suffix rule.5 ms
Discarding 407 places :
Also discarding 800 output transitions
Drop transitions removed 800 transitions
Discarding 398 places :
Symmetric choice reduction at 0 with 398 rule applications. Total rules 399 place count 12 transition count 410
Iterating global reduction 0 with 398 rules applied. Total rules applied 797 place count 12 transition count 410
Ensure Unique test removed 398 transitions
Reduce isomorphic transitions removed 398 transitions.
Iterating post reduction 0 with 398 rules applied. Total rules applied 1195 place count 12 transition count 12
Applied a total of 1195 rules in 19 ms. Remains 12 /817 variables (removed 805) and now considering 12/1608 (removed 1596) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 19 ms. Remains : 12/817 places, 12/1608 transitions.
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 1 ms
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 1 ms
[2023-03-13 03:38:15] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 817/817 places, 1608/1608 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 814 transition count 1608
Discarding 791 places :
Symmetric choice reduction at 1 with 791 rule applications. Total rules 794 place count 23 transition count 817
Iterating global reduction 1 with 791 rules applied. Total rules applied 1585 place count 23 transition count 817
Ensure Unique test removed 791 transitions
Reduce isomorphic transitions removed 791 transitions.
Iterating post reduction 1 with 791 rules applied. Total rules applied 2376 place count 23 transition count 26
Applied a total of 2376 rules in 16 ms. Remains 23 /817 variables (removed 794) and now considering 26/1608 (removed 1582) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 23/817 places, 26/1608 transitions.
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 0 ms
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 1 ms
[2023-03-13 03:38:15] [INFO ] Input system was already deterministic with 26 transitions.
Starting structural reductions in LTL mode, iteration 0 : 817/817 places, 1608/1608 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 814 transition count 1608
Discarding 790 places :
Symmetric choice reduction at 1 with 790 rule applications. Total rules 793 place count 24 transition count 818
Iterating global reduction 1 with 790 rules applied. Total rules applied 1583 place count 24 transition count 818
Ensure Unique test removed 790 transitions
Reduce isomorphic transitions removed 790 transitions.
Iterating post reduction 1 with 790 rules applied. Total rules applied 2373 place count 24 transition count 28
Applied a total of 2373 rules in 10 ms. Remains 24 /817 variables (removed 793) and now considering 28/1608 (removed 1580) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 24/817 places, 28/1608 transitions.
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 1 ms
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 0 ms
[2023-03-13 03:38:15] [INFO ] Input system was already deterministic with 28 transitions.
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 40 ms
[2023-03-13 03:38:15] [INFO ] Flatten gal took : 41 ms
[2023-03-13 03:38:15] [INFO ] Export to MCC of 5 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-13 03:38:15] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 817 places, 1608 transitions and 4520 arcs took 8 ms.
Total runtime 8344 ms.
There are residual formulas that ITS could not solve within timeout
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../reducer/bin//../../marcie/bin/marcie --net-file=model.pnml --mcc-file=CTLCardinality.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Net: Petri
(NrP: 817 NrTr: 1608 NrArc: 4520)

parse formulas
formulas created successfully
place and transition orderings generation:0m 0.087sec

net check time: 0m 0.000sec

init dd package: 0m 2.883sec


RS generation: 0m 9.597sec


-> reachability set: #nodes 5678 (5.7e+03) #states 275,494,823 (8)



starting MCC model checker
--------------------------

checking: AX [1<=0]
normalized: ~ [EX [~ [1<=0]]]

abstracting: (1<=0)
states: 0
.-> the formula is FALSE

FORMULA AirplaneLD-PT-0200-CTLCardinality-05 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 1.232sec

checking: AG [AF [1<=p249]]
normalized: ~ [E [true U EG [~ [1<=p249]]]]

abstracting: (1<=p249)
states: 686,817 (5)
.
EG iterations: 1
-> the formula is FALSE

FORMULA AirplaneLD-PT-0200-CTLCardinality-11 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 2.107sec

checking: EF [[EX [AX [~ [p732<=p11]]] & EF [~ [1<=p598]]]]
normalized: E [true U [EX [~ [EX [p732<=p11]]] & E [true U ~ [1<=p598]]]]

abstracting: (1<=p598)
states: 1,370,619 (6)
abstracting: (p732<=p11)
states: 274,127,619 (8)
..-> the formula is TRUE

FORMULA AirplaneLD-PT-0200-CTLCardinality-09 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 15m19.569sec

checking: [AF [p470<=0] & AX [AG [[p759<=p797 | AF [1<=p57]]]]]
normalized: [~ [EX [E [true U ~ [[~ [EG [~ [1<=p57]]] | p759<=p797]]]]] & ~ [EG [~ [p470<=0]]]]

abstracting: (p470<=0)
states: 274,124,204 (8)
......
EG iterations: 6
abstracting: (p759<=p797)
states: 274,124,202 (8)
abstracting: (1<=p57)
states: 686,817 (5)
.
EG iterations: 1
.-> the formula is FALSE

FORMULA AirplaneLD-PT-0200-CTLCardinality-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 4.218sec

checking: AG [EF [[[[[~ [p767<=1] | ~ [1<=p181]] | ~ [p460<=1]] & AX [~ [p712<=0]]] | EG [1<=p594]]]]
normalized: ~ [E [true U ~ [E [true U [[[[~ [p767<=1] | ~ [1<=p181]] | ~ [p460<=1]] & ~ [EX [p712<=0]]] | EG [1<=p594]]]]]]

abstracting: (1<=p594)
states: 1,370,619 (6)
......
EG iterations: 6
abstracting: (p712<=0)
states: 274,124,202 (8)
.abstracting: (p460<=1)
states: 275,494,823 (8)
abstracting: (1<=p181)
states: 686,817 (5)
abstracting: (p767<=1)
states: 275,494,823 (8)
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393220 kB
MemFree: 6255300 kB
After kill :
MemTotal: 16393220 kB
MemFree: 16096248 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
check for maximal unmarked siphon
ok
check for constant places
ok
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.003sec

1417
iterations count:129663 (80), effective:814 (0)

initing FirstDep: 0m 0.003sec


iterations count:3626 (2), effective:5 (0)
6551
iterations count:165131 (102), effective:207 (0)
10090 10840 10716 10796 10876 10752 10833 10708 10789 10869 10745 10825 10701 10781 10861 10737 10817 10693 10773 10854 10730 10810 10890 10766 10846 10722 10802 10882 10758 10838 10714 10795 10875 10751 10831 10707 10787 10867 10743 10823 10903 10779 10860 10735 10816 10896 10772 10852 10728 10808 10888 10764 10844 10720 10800 10881 10757 10837 10917 10793 10873 10749 10829 10909 10785 10865 10741 10822 10902 10778 10858 10734 10814 10894 10770 10850 10077 10806 10887 10762 10843 10923 10799 10879 10755 10835 10915 10791 10871 10747 10827 10908 10784 10864 10740 10820 10900 10776 10856 10936 10812 10892 10768 10849 10929 10805 10885 10761 10841 10921 10797 10877 10753 10833 10914 10789 10870 10950 10826 10906 10782 10862 10942 10818 10898 10774 10854 10935 10811 10891 10767 10847 10927 10803 10883 10963 10839 10919 10795 10876 10956 10832 10912 10788 10868 10948 10824 10904 10780 10860 10940 10816 10897 10077 10853 10933 10809 10889 10969 10845 10925 10801 10881 10962 10838 10314 10190
iterations count:16710779 (10392), effective:20819 (12)

iterations count:3776 (2), effective:6 (0)
9279 9334 9180 9033 9523 11405 11281 11365 11448 11324 11408 11284 11368 11452 11328 11411 11287 11371 11455 11331 11415 11291 11374 11458 11334 11418 11502 11378 11462 11337 11421 11505 11381 11465 11341 11425 11508 11384 11468 11344 11428 11512 11388 11471 11555 11431 11515 11391 11475 11558 11434 11518 11394 11478 11562 11438 11522 10659 11481 11565 11441 11525 11609 11485 11568 11444 11528 11612 11488 11572 11448 11531 11615 11491 11575 10704 11535 11618 11494 11578 11662 11538 11622 11498 11581 11665 11541 11625 11501 11585 11669 11545 11628 11712 11588 11672 11548 11632 11715 11591 11675 11551 11635 11719 11595 11678 11554 11638 11722 11598 11682 11766 11641 11725 11601 11685 11769 11645 11729 11605 11688 11772 11648 11732 11608 11692 11775 11651 11735 11819 11695 11779 11655 11738 11822 11698 11782 11658 11742 11826 11701 10978 10854 10940 11024 10900 10984 11067 10943 11027 10903 10987 11071 10947 11030 10906 10990 11074 10950 11034 10910 10993 11077 10953 10839 10030 10703 10579 10959 10331 10918 11001 10877 10960 11044 10920 11003 10879 10962 11045 10921 11004 10880 10963 11046 10922 11006 10881 10965 11048 10924 11007 11090 10966 11049 10925 11008 11092 10967 11051 10927 11010 11093 10969 11052 10928 11011 11094 10970 11053 11137 11013 11096 10972 11055 11138 11014 11097 10973 11056 11139 11015 11099 10974 11058 11141 11017 11100 11183 11059 11142 11018 11101 11185 11060 11144 11020 11103 11186 11062 11145 11021 11104 11187 11063 11146 10473 11106 11189 11065 11148 11231 11107 11190 11066 11149 11232 11108 11192 11067 11151 11234 11110 11193 11069 11152 11235 11111 11194 11278 11153 11237 11113 11196 11279 11155 11238 11114 11197 11280 11156 11239 11115 11199 11282 11158 11241 11324 11200 11283 11159 11242 11325 11201 11285 11160 11244 11327 11203 11286 11162 11245 11328 11204 11287 11371 11246 11330 11206 11289 11372 11248 11331 11207 11290 11373 11249 11332 11208 11292 11375 11251 11334 10615 11293 11376 11252 11335 11418 11294 10978 10853 10640 11320 11196 11279 11155 11238 11322 11197 11281 11157 11240 11323 11199 11282 11365 11241 11324 11200 11283 11367 11243 11326 11202 11285 11368 11244 11327 11203 11286 11369 11245 11329 11412 11288 11371 11247 11330 11413 11289 11372 11248 11331 11415 11290 11374 11250 11333 11416 11292 11375 11458 11334 11417 11293 11376 11460 11336 11419 11295 11378 11461 11337 11420 11296 11379 11462 11338 11422 10852 11381 11464 11340 11423 11506 11382 11465 11341 11424 11508 11383 11467 11343 11426 11509 11385 11468 11344 11427 11510 11386 11469 11553 11429 11512 11388 11471 11554 11430 11513 11389 11472 11555 11431 11515 11390 11474 11557 11433 11516 11599 11475 11558 11434 11517 11601 11476 11560 11436 11519 11602 11478 11561 11437 11520 11603 11479 11562 11646 11522 11605 11481 11564 11647 11523 11606 11482 11565 11648 11524 11608 11483 11567 11650 11526 11609 10993 11568 11651 11527 11610 11694 11569 11653 11529 11612 11695 11571 11654 11530 11613 11696 11572 11655 11531 11013 10693 10569 11246 11329 11205 11288 11164 11248 11331 11207 11290 11166 11249 11332 11208 11291 11167 11250 11334 11210 11293 11376 11252 11335 11211 11294 11377 11253 11336 11212 11295 11379 11255 11338 11214 11297 11380 11256 11339 11422 11298 11381 11257 11341 11424 11300 11383 11259 11342 11425 11301 11384 11260 11343 11427 11302 11386 10822 11345 11428 11304 11387 11470 11346 11429 11305 11388 11472 11348 11431 11307 11390 11473 11349 11432 11308 11391 11474 11350 11434 11517 11393 11476 11352 11435 11518 11394 11477 11353 11436 11520 11395 11479 11355 11438 11521 11397 11480 11563 11439 11522 11398 11481 11565 11441 11524 11400 11483 11566 11442 11525 11401 11484 11567 11443 11527 11610 11486 11569 11445 11528 11611 11487 11570 11446 11529 11613 11488 11572 11448 11531 11614 11490 11573 10964 11532 11615 11491 11574 11658 11534 11617 11493 11576 11659 11535 11618 11494 11577 11660 11536 11620 11495 11579 11662 11538 11621 11704 11580 11663 11539 11622 11706 11581 11065 10941 10622 11296 11172 11255 11131 11215

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0200"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="marciexred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marciexred"
echo " Input is AirplaneLD-PT-0200, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r010-oct2-167813598800273"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0200.tgz
mv AirplaneLD-PT-0200 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;