Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r009-oct2-167813597700282.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................
=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is AirplaneLD-PT-0500, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r009-oct2-167813597700282
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 11M
-rw-r--r-- 1 mcc users 310K Feb 26 11:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 1.1M Feb 26 11:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 222K Feb 26 11:33 CTLFireability.txt
-rw-r--r-- 1 mcc users 1.3M Feb 26 11:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 167K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 428K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 98K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 410K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 478K Feb 26 12:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 1.7M Feb 26 12:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 381K Feb 26 12:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 2.1M Feb 26 12:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 2.2M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-00
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-01
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-02
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-03
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-04
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-05
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-06
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-07
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-08
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-09
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-10
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-11
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-12
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-13
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-14
FORMULA_NAME AirplaneLD-PT-0500-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678621297821

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-0500
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-12 11:41:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-12 11:41:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-12 11:41:40] [INFO ] Load time of PNML (sax parser for PT used): 247 ms
[2023-03-12 11:41:40] [INFO ] Transformed 3519 places.
[2023-03-12 11:41:40] [INFO ] Transformed 4008 transitions.
[2023-03-12 11:41:40] [INFO ] Parsed PT model containing 3519 places and 4008 transitions and 15278 arcs in 412 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 61 ms.
Reduce places removed 1502 places and 0 transitions.
Support contains 2014 out of 2017 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2017/2017 places, 4008/4008 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 2014 transition count 4008
Applied a total of 3 rules in 37 ms. Remains 2014 /2017 variables (removed 3) and now considering 4008/4008 (removed 0) transitions.
// Phase 1: matrix 4008 rows 2014 cols
[2023-03-12 11:41:41] [INFO ] Computed 1 place invariants in 408 ms
[2023-03-12 11:41:41] [INFO ] Implicit Places using invariants in 867 ms returned []
[2023-03-12 11:41:41] [INFO ] Invariant cache hit.
[2023-03-12 11:41:42] [INFO ] Implicit Places using invariants and state equation in 608 ms returned []
Implicit Place search using SMT with State Equation took 1509 ms to find 0 implicit places.
[2023-03-12 11:41:42] [INFO ] Invariant cache hit.
[2023-03-12 11:41:44] [INFO ] Dead Transitions using invariants and state equation in 2001 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 2014/2017 places, 4008/4008 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3568 ms. Remains : 2014/2017 places, 4008/4008 transitions.
Support contains 2014 out of 2014 places after structural reductions.
[2023-03-12 11:41:45] [INFO ] Flatten gal took : 287 ms
[2023-03-12 11:41:46] [INFO ] Flatten gal took : 266 ms
[2023-03-12 11:41:47] [INFO ] Input system was already deterministic with 4008 transitions.
Incomplete random walk after 10000 steps, including 1254 resets, run finished after 1957 ms. (steps per millisecond=5 ) properties (out of 47) seen :29
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 74 ms. (steps per millisecond=13 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 29 ms. (steps per millisecond=34 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 18) seen :0
Running SMT prover for 18 properties.
[2023-03-12 11:41:49] [INFO ] Invariant cache hit.
[2023-03-12 11:41:55] [INFO ] [Real]Absence check using 0 positive and 1 generalized place invariants in 2 ms returned sat
[2023-03-12 11:41:55] [INFO ] After 1754ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:18
[2023-03-12 11:41:56] [INFO ] [Nat]Absence check using 0 positive and 1 generalized place invariants in 2 ms returned sat
[2023-03-12 11:42:00] [INFO ] After 3010ms SMT Verify possible using state equation in natural domain returned unsat :6 sat :12
[2023-03-12 11:42:03] [INFO ] After 5642ms SMT Verify possible using trap constraints in natural domain returned unsat :6 sat :12
Attempting to minimize the solution found.
Minimization took 1385 ms.
[2023-03-12 11:42:04] [INFO ] After 9167ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :12
Fused 18 Parikh solutions to 12 different solutions.
Finished Parikh walk after 7 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=7 )
Parikh walk visited 12 properties in 69 ms.
Successfully simplified 6 atomic propositions for a total of 16 simplifications.
[2023-03-12 11:42:04] [INFO ] Flatten gal took : 159 ms
[2023-03-12 11:42:05] [INFO ] Flatten gal took : 165 ms
[2023-03-12 11:42:06] [INFO ] Input system was already deterministic with 4008 transitions.
Computed a total of 2014 stabilizing places and 4008 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 2014 transition count 4008
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA AirplaneLD-PT-0500-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Graph (complete) has 2762 edges and 2014 vertex of which 1 are kept as prefixes of interest. Removing 2013 places using SCC suffix rule.6 ms
Discarding 2013 places :
Also discarding 4006 output transitions
Drop transitions removed 4006 transitions
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 1 transition count 1
Applied a total of 2 rules in 15 ms. Remains 1 /2014 variables (removed 2013) and now considering 1/4008 (removed 4007) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 1/2014 places, 1/4008 transitions.
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:42:06] [INFO ] Input system was already deterministic with 1 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Discarding 1747 places :
Symmetric choice reduction at 0 with 1747 rule applications. Total rules 1747 place count 267 transition count 2261
Iterating global reduction 0 with 1747 rules applied. Total rules applied 3494 place count 267 transition count 2261
Ensure Unique test removed 1747 transitions
Reduce isomorphic transitions removed 1747 transitions.
Iterating post reduction 0 with 1747 rules applied. Total rules applied 5241 place count 267 transition count 514
Applied a total of 5241 rules in 61 ms. Remains 267 /2014 variables (removed 1747) and now considering 514/4008 (removed 3494) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 62 ms. Remains : 267/2014 places, 514/4008 transitions.
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 13 ms
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 12 ms
[2023-03-12 11:42:06] [INFO ] Input system was already deterministic with 514 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Discarding 1745 places :
Symmetric choice reduction at 0 with 1745 rule applications. Total rules 1745 place count 269 transition count 2263
Iterating global reduction 0 with 1745 rules applied. Total rules applied 3490 place count 269 transition count 2263
Ensure Unique test removed 1745 transitions
Reduce isomorphic transitions removed 1745 transitions.
Iterating post reduction 0 with 1745 rules applied. Total rules applied 5235 place count 269 transition count 518
Applied a total of 5235 rules in 31 ms. Remains 269 /2014 variables (removed 1745) and now considering 518/4008 (removed 3490) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 269/2014 places, 518/4008 transitions.
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 11 ms
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 13 ms
[2023-03-12 11:42:06] [INFO ] Input system was already deterministic with 518 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Discarding 748 places :
Symmetric choice reduction at 0 with 748 rule applications. Total rules 748 place count 1266 transition count 3260
Iterating global reduction 0 with 748 rules applied. Total rules applied 1496 place count 1266 transition count 3260
Ensure Unique test removed 748 transitions
Reduce isomorphic transitions removed 748 transitions.
Iterating post reduction 0 with 748 rules applied. Total rules applied 2244 place count 1266 transition count 2512
Applied a total of 2244 rules in 22 ms. Remains 1266 /2014 variables (removed 748) and now considering 2512/4008 (removed 1496) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 1266/2014 places, 2512/4008 transitions.
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 65 ms
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 86 ms
[2023-03-12 11:42:06] [INFO ] Input system was already deterministic with 2512 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Graph (complete) has 2762 edges and 2014 vertex of which 10 are kept as prefixes of interest. Removing 2004 places using SCC suffix rule.4 ms
Discarding 2004 places :
Also discarding 2500 output transitions
Drop transitions removed 2500 transitions
Ensure Unique test removed 1498 transitions
Reduce isomorphic transitions removed 1498 transitions.
Iterating post reduction 0 with 1498 rules applied. Total rules applied 1499 place count 10 transition count 10
Applied a total of 1499 rules in 11 ms. Remains 10 /2014 variables (removed 2004) and now considering 10/4008 (removed 3998) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 10/2014 places, 10/4008 transitions.
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:42:06] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Graph (complete) has 2762 edges and 2014 vertex of which 1 are kept as prefixes of interest. Removing 2013 places using SCC suffix rule.4 ms
Discarding 2013 places :
Also discarding 3008 output transitions
Drop transitions removed 3008 transitions
Ensure Unique test removed 999 transitions
Reduce isomorphic transitions removed 999 transitions.
Iterating post reduction 0 with 999 rules applied. Total rules applied 1000 place count 1 transition count 1
Applied a total of 1000 rules in 23 ms. Remains 1 /2014 variables (removed 2013) and now considering 1/4008 (removed 4007) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 1/2014 places, 1/4008 transitions.
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:42:06] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:42:06] [INFO ] Input system was already deterministic with 1 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Discarding 749 places :
Symmetric choice reduction at 0 with 749 rule applications. Total rules 749 place count 1265 transition count 3259
Iterating global reduction 0 with 749 rules applied. Total rules applied 1498 place count 1265 transition count 3259
Ensure Unique test removed 749 transitions
Reduce isomorphic transitions removed 749 transitions.
Iterating post reduction 0 with 749 rules applied. Total rules applied 2247 place count 1265 transition count 2510
Applied a total of 2247 rules in 22 ms. Remains 1265 /2014 variables (removed 749) and now considering 2510/4008 (removed 1498) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 1265/2014 places, 2510/4008 transitions.
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 61 ms
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 76 ms
[2023-03-12 11:42:07] [INFO ] Input system was already deterministic with 2510 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Graph (complete) has 2762 edges and 2014 vertex of which 1010 are kept as prefixes of interest. Removing 1004 places using SCC suffix rule.5 ms
Discarding 1004 places :
Also discarding 2000 output transitions
Drop transitions removed 2000 transitions
Discarding 498 places :
Symmetric choice reduction at 0 with 498 rule applications. Total rules 499 place count 512 transition count 1510
Iterating global reduction 0 with 498 rules applied. Total rules applied 997 place count 512 transition count 1510
Ensure Unique test removed 498 transitions
Reduce isomorphic transitions removed 498 transitions.
Iterating post reduction 0 with 498 rules applied. Total rules applied 1495 place count 512 transition count 1012
Applied a total of 1495 rules in 38 ms. Remains 512 /2014 variables (removed 1502) and now considering 1012/4008 (removed 2996) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 39 ms. Remains : 512/2014 places, 1012/4008 transitions.
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 19 ms
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 24 ms
[2023-03-12 11:42:07] [INFO ] Input system was already deterministic with 1012 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Discarding 1989 places :
Symmetric choice reduction at 0 with 1989 rule applications. Total rules 1989 place count 25 transition count 2019
Iterating global reduction 0 with 1989 rules applied. Total rules applied 3978 place count 25 transition count 2019
Ensure Unique test removed 1989 transitions
Reduce isomorphic transitions removed 1989 transitions.
Iterating post reduction 0 with 1989 rules applied. Total rules applied 5967 place count 25 transition count 30
Applied a total of 5967 rules in 47 ms. Remains 25 /2014 variables (removed 1989) and now considering 30/4008 (removed 3978) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 47 ms. Remains : 25/2014 places, 30/4008 transitions.
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:42:07] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Graph (complete) has 2762 edges and 2014 vertex of which 1 are kept as prefixes of interest. Removing 2013 places using SCC suffix rule.3 ms
Discarding 2013 places :
Also discarding 3008 output transitions
Drop transitions removed 3008 transitions
Ensure Unique test removed 999 transitions
Reduce isomorphic transitions removed 999 transitions.
Iterating post reduction 0 with 999 rules applied. Total rules applied 1000 place count 1 transition count 1
Applied a total of 1000 rules in 8 ms. Remains 1 /2014 variables (removed 2013) and now considering 1/4008 (removed 4007) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 1/2014 places, 1/4008 transitions.
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:42:07] [INFO ] Input system was already deterministic with 1 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Discarding 1994 places :
Symmetric choice reduction at 0 with 1994 rule applications. Total rules 1994 place count 20 transition count 2014
Iterating global reduction 0 with 1994 rules applied. Total rules applied 3988 place count 20 transition count 2014
Ensure Unique test removed 1994 transitions
Reduce isomorphic transitions removed 1994 transitions.
Iterating post reduction 0 with 1994 rules applied. Total rules applied 5982 place count 20 transition count 20
Applied a total of 5982 rules in 31 ms. Remains 20 /2014 variables (removed 1994) and now considering 20/4008 (removed 3988) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 20/2014 places, 20/4008 transitions.
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:42:07] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Discarding 1986 places :
Symmetric choice reduction at 0 with 1986 rule applications. Total rules 1986 place count 28 transition count 2022
Iterating global reduction 0 with 1986 rules applied. Total rules applied 3972 place count 28 transition count 2022
Ensure Unique test removed 1986 transitions
Reduce isomorphic transitions removed 1986 transitions.
Iterating post reduction 0 with 1986 rules applied. Total rules applied 5958 place count 28 transition count 36
Applied a total of 5958 rules in 35 ms. Remains 28 /2014 variables (removed 1986) and now considering 36/4008 (removed 3972) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 28/2014 places, 36/4008 transitions.
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:42:07] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Discarding 1995 places :
Symmetric choice reduction at 0 with 1995 rule applications. Total rules 1995 place count 19 transition count 2013
Iterating global reduction 0 with 1995 rules applied. Total rules applied 3990 place count 19 transition count 2013
Ensure Unique test removed 1995 transitions
Reduce isomorphic transitions removed 1995 transitions.
Iterating post reduction 0 with 1995 rules applied. Total rules applied 5985 place count 19 transition count 18
Applied a total of 5985 rules in 19 ms. Remains 19 /2014 variables (removed 1995) and now considering 18/4008 (removed 3990) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 19/2014 places, 18/4008 transitions.
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:42:07] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Discarding 1991 places :
Symmetric choice reduction at 0 with 1991 rule applications. Total rules 1991 place count 23 transition count 2017
Iterating global reduction 0 with 1991 rules applied. Total rules applied 3982 place count 23 transition count 2017
Ensure Unique test removed 1991 transitions
Reduce isomorphic transitions removed 1991 transitions.
Iterating post reduction 0 with 1991 rules applied. Total rules applied 5973 place count 23 transition count 26
Applied a total of 5973 rules in 19 ms. Remains 23 /2014 variables (removed 1991) and now considering 26/4008 (removed 3982) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 23/2014 places, 26/4008 transitions.
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:42:07] [INFO ] Input system was already deterministic with 26 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2014/2014 places, 4008/4008 transitions.
Graph (complete) has 2762 edges and 2014 vertex of which 1 are kept as prefixes of interest. Removing 2013 places using SCC suffix rule.2 ms
Discarding 2013 places :
Also discarding 3508 output transitions
Drop transitions removed 3508 transitions
Ensure Unique test removed 499 transitions
Reduce isomorphic transitions removed 499 transitions.
Iterating post reduction 0 with 499 rules applied. Total rules applied 500 place count 1 transition count 1
Applied a total of 500 rules in 7 ms. Remains 1 /2014 variables (removed 2013) and now considering 1/4008 (removed 4007) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 1/2014 places, 1/4008 transitions.
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:42:07] [INFO ] Input system was already deterministic with 1 transitions.
[2023-03-12 11:42:07] [INFO ] Flatten gal took : 140 ms
[2023-03-12 11:42:08] [INFO ] Flatten gal took : 139 ms
[2023-03-12 11:42:08] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 28 ms.
[2023-03-12 11:42:08] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 2014 places, 4008 transitions and 8770 arcs took 12 ms.
Total runtime 28749 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/505/ctl_0_ --ctl=/tmp/505/ctl_1_ --ctl=/tmp/505/ctl_2_ --ctl=/tmp/505/ctl_3_ --ctl=/tmp/505/ctl_4_ --ctl=/tmp/505/ctl_5_ --ctl=/tmp/505/ctl_6_ --ctl=/tmp/505/ctl_7_ --ctl=/tmp/505/ctl_8_ --ctl=/tmp/505/ctl_9_ --ctl=/tmp/505/ctl_10_ --ctl=/tmp/505/ctl_11_ --ctl=/tmp/505/ctl_12_ --ctl=/tmp/505/ctl_13_ --ctl=/tmp/505/ctl_14_ --mu-par --mu-opt
FORMULA AirplaneLD-PT-0500-CTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-01
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-02
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-03
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-04
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-05
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-06
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-07
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-09
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-10
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-11
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-12
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-13
Could not compute solution for formula : AirplaneLD-PT-0500-CTLFireability-14
FORMULA AirplaneLD-PT-0500-CTLFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN

BK_STOP 1678621365155

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name AirplaneLD-PT-0500-CTLFireability-00
ctl formula formula --ctl=/tmp/505/ctl_0_
ctl formula name AirplaneLD-PT-0500-CTLFireability-01
ctl formula formula --ctl=/tmp/505/ctl_1_
ctl formula name AirplaneLD-PT-0500-CTLFireability-02
ctl formula formula --ctl=/tmp/505/ctl_2_
ctl formula name AirplaneLD-PT-0500-CTLFireability-03
ctl formula formula --ctl=/tmp/505/ctl_3_
ctl formula name AirplaneLD-PT-0500-CTLFireability-04
ctl formula formula --ctl=/tmp/505/ctl_4_
ctl formula name AirplaneLD-PT-0500-CTLFireability-05
ctl formula formula --ctl=/tmp/505/ctl_5_
ctl formula name AirplaneLD-PT-0500-CTLFireability-06
ctl formula formula --ctl=/tmp/505/ctl_6_
ctl formula name AirplaneLD-PT-0500-CTLFireability-07
ctl formula formula --ctl=/tmp/505/ctl_7_
ctl formula name AirplaneLD-PT-0500-CTLFireability-09
ctl formula formula --ctl=/tmp/505/ctl_8_
ctl formula name AirplaneLD-PT-0500-CTLFireability-10
ctl formula formula --ctl=/tmp/505/ctl_9_
ctl formula name AirplaneLD-PT-0500-CTLFireability-11
ctl formula formula --ctl=/tmp/505/ctl_10_
ctl formula name AirplaneLD-PT-0500-CTLFireability-12
ctl formula formula --ctl=/tmp/505/ctl_11_
ctl formula name AirplaneLD-PT-0500-CTLFireability-13
ctl formula formula --ctl=/tmp/505/ctl_12_
ctl formula name AirplaneLD-PT-0500-CTLFireability-14
ctl formula formula --ctl=/tmp/505/ctl_13_
ctl formula name AirplaneLD-PT-0500-CTLFireability-15
ctl formula formula --ctl=/tmp/505/ctl_14_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 2014 places, 4008 transitions and 8770 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.040 real 0.030 user 0.010 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 4008->4008 groups
pnml2lts-sym: Regrouping took 5.800 real 5.770 user 0.030 sys
pnml2lts-sym: state vector length is 2014; there are 4008 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: Exploration took 20081 group checks and 0 next state calls
pnml2lts-sym: reachability took 2.430 real 9.460 user 0.230 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.000 real 0.010 user 0.000 sys
pnml2lts-sym: state space has 4271787022 states, 7544 nodes
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: Formula /tmp/505/ctl_0_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/505/ctl_14_ holds for the initial state
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
double free or corruption (!prev)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0500"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is AirplaneLD-PT-0500, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r009-oct2-167813597700282"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0500.tgz
mv AirplaneLD-PT-0500 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;