Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r009-oct2-167813597600234.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is AirplaneLD-COL-4000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r009-oct2-167813597600234
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 8.2K Feb 26 15:00 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K Feb 26 15:00 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 26 13:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 55K Feb 26 13:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 15:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 19:46 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 153K Feb 26 19:46 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.6K Feb 26 17:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 26 17:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 620K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-00
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-01
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-02
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-03
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-04
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-05
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-06
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-07
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-08
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-09
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-10
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-11
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-12
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-13
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-14
FORMULA_NAME AirplaneLD-COL-4000-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678620769784

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-COL-4000
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-12 11:32:51] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-12 11:32:51] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-12 11:32:51] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-12 11:32:52] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-12 11:32:52] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 933 ms
[2023-03-12 11:32:52] [INFO ] Detected 3 constant HL places corresponding to 12002 PT places.
[2023-03-12 11:32:52] [INFO ] Imported 20 HL places and 15 HL transitions for a total of 28019 PT places and 48012.0 transition bindings in 79 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 27 ms.
[2023-03-12 11:32:52] [INFO ] Built PT skeleton of HLPN with 20 places and 15 transitions 56 arcs in 5 ms.
[2023-03-12 11:32:52] [INFO ] Skeletonized 5 HLPN properties in 2 ms. Removed 11 properties that had guard overlaps.
Computed a total of 20 stabilizing places and 15 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 20 transition count 15
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 4 formulas.
Remains 1 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Computed a total of 17 stabilizing places and 14 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 17 transition count 14
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Finished random walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
Finished probabilistic random walk after 0 steps, run visited all 0 properties in 0 ms. (steps per millisecond=0 )
[2023-03-12 11:32:53] [INFO ] Flatten gal took : 12 ms
[2023-03-12 11:32:53] [INFO ] Flatten gal took : 3 ms
Symmetric sort wr.t. initial and guards and successors and join/free detected :Altitude
Symmetric sort wr.t. initial detected :Altitude
Transition t3_2 : guard parameter $A(Altitude:8000) in guard (OR (GEQ $A 3999) (EQ $A 7999))introduces in Altitude(8000) partition with 2 elements
Transition t3_1 : guard parameter $A(Altitude:8000) in guard (AND (LT $A 3999) (NEQ $A 7999))introduces in Altitude(8000) partition with 2 elements
Sort wr.t. initial and guards Altitude has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Altitude domain size was 8000 reducing to 2 values.
For transition t3_2:(OR (GEQ $A 3999) (EQ $A 7999)) -> (EQ $A 1)
For transition t3_1:(AND (LT $A 3999) (NEQ $A 7999)) -> (EQ $A 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Speed
Symmetric sort wr.t. initial detected :Speed
Transition t5_2 : guard parameter $S(Speed:4000) in guard (OR (LEQ $S 1999) (EQ $S 3999))introduces in Speed(4000) partition with 2 elements
Transition t5_1 : guard parameter $S(Speed:4000) in guard (AND (GT $S 1999) (NEQ $S 3999))introduces in Speed(4000) partition with 2 elements
Transition t4_2 : guard parameter $S(Speed:4000) in guard (OR (LEQ $S 1999) (EQ $S 3999))introduces in Speed(4000) partition with 2 elements
Transition t4_1 : guard parameter $S(Speed:4000) in guard (AND (GT $S 1999) (NEQ $S 3999))introduces in Speed(4000) partition with 2 elements
Sort wr.t. initial and guards Speed has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Speed domain size was 4000 reducing to 2 values.
For transition t5_2:(OR (LEQ $S 1999) (EQ $S 3999)) -> (EQ $S 1)
For transition t5_1:(AND (GT $S 1999) (NEQ $S 3999)) -> (EQ $S 0)
For transition t4_2:(OR (LEQ $S 1999) (EQ $S 3999)) -> (EQ $S 1)
For transition t4_1:(AND (GT $S 1999) (NEQ $S 3999)) -> (EQ $S 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Signal
Arc [19:1*[1]] contains constants of sort Signal
Transition t5_2 : constants on arcs in [[19:1*[1]]] introduces in Signal(2) partition with 1 elements that refines current partition to 2 subsets.
Symmetric sort wr.t. initial and guards and successors and join/free detected :Weight
Symmetric sort wr.t. initial detected :Weight
Transition t2_2 : guard parameter $W(Weight:2) in guard (EQ $W 1)introduces in Weight(2) partition with 2 elements
[2023-03-12 11:32:53] [INFO ] Unfolded HLPN to a Petri net with 29 places and 20 transitions 56 arcs in 118 ms.
[2023-03-12 11:32:53] [INFO ] Unfolded 16 HLPN properties in 0 ms.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-12 11:32:53] [INFO ] Reduced 1 identical enabling conditions.
Reduce places removed 6 places and 0 transitions.
Support contains 20 out of 23 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 23/23 places, 20/20 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 20 transition count 20
Applied a total of 3 rules in 6 ms. Remains 20 /23 variables (removed 3) and now considering 20/20 (removed 0) transitions.
// Phase 1: matrix 20 rows 20 cols
[2023-03-12 11:32:53] [INFO ] Computed 1 place invariants in 3 ms
[2023-03-12 11:32:53] [INFO ] Implicit Places using invariants in 139 ms returned []
[2023-03-12 11:32:53] [INFO ] Invariant cache hit.
[2023-03-12 11:32:53] [INFO ] Implicit Places using invariants and state equation in 86 ms returned []
Implicit Place search using SMT with State Equation took 252 ms to find 0 implicit places.
[2023-03-12 11:32:53] [INFO ] Invariant cache hit.
[2023-03-12 11:32:53] [INFO ] Dead Transitions using invariants and state equation in 275 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 20/23 places, 20/20 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 537 ms. Remains : 20/23 places, 20/20 transitions.
Support contains 20 out of 20 places after structural reductions.
[2023-03-12 11:32:53] [INFO ] Flatten gal took : 4 ms
[2023-03-12 11:32:53] [INFO ] Flatten gal took : 5 ms
[2023-03-12 11:32:53] [INFO ] Input system was already deterministic with 20 transitions.
Incomplete random walk after 10000 steps, including 1253 resets, run finished after 468 ms. (steps per millisecond=21 ) properties (out of 38) seen :31
Incomplete Best-First random walk after 10001 steps, including 240 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 264 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 246 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 235 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 248 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 224 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 254 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-12 11:32:54] [INFO ] Invariant cache hit.
[2023-03-12 11:32:54] [INFO ] [Real]Absence check using 0 positive and 1 generalized place invariants in 0 ms returned sat
[2023-03-12 11:32:54] [INFO ] After 123ms SMT Verify possible using all constraints in real domain returned unsat :7 sat :0
Fused 7 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 7 atomic propositions for a total of 16 simplifications.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 6 ms
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 3 ms
[2023-03-12 11:32:54] [INFO ] Input system was already deterministic with 20 transitions.
Computed a total of 20 stabilizing places and 20 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 20 transition count 20
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA AirplaneLD-COL-4000-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 20/20 places, 20/20 transitions.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-12 11:32:54] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 4 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 20/20 places, 20/20 transitions.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 3 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 20/20 places, 20/20 transitions.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-12 11:32:54] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 20/20 places, 20/20 transitions.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 20/20 places, 20/20 transitions.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 20/20 places, 20/20 transitions.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-12 11:32:54] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 20/20 places, 20/20 transitions.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 20/20 places, 20/20 transitions.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Graph (complete) has 18 edges and 20 vertex of which 4 are kept as prefixes of interest. Removing 16 places using SCC suffix rule.0 ms
Discarding 16 places :
Also discarding 12 output transitions
Drop transitions removed 12 transitions
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 5 place count 4 transition count 4
Applied a total of 5 rules in 1 ms. Remains 4 /20 variables (removed 16) and now considering 4/20 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 4/20 places, 4/20 transitions.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:32:54] [INFO ] Input system was already deterministic with 4 transitions.
Finished random walk after 12 steps, including 2 resets, run visited all 1 properties in 1 ms. (steps per millisecond=12 )
FORMULA AirplaneLD-COL-4000-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Graph (complete) has 18 edges and 20 vertex of which 1 are kept as prefixes of interest. Removing 19 places using SCC suffix rule.0 ms
Discarding 19 places :
Also discarding 18 output transitions
Drop transitions removed 18 transitions
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 1 transition count 1
Applied a total of 2 rules in 1 ms. Remains 1 /20 variables (removed 19) and now considering 1/20 (removed 19) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 1/20 places, 1/20 transitions.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:32:54] [INFO ] Input system was already deterministic with 1 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 20/20 places, 20/20 transitions.
[2023-03-12 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:55] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:55] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 19 transition count 19
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 19 transition count 19
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 19 transition count 18
Applied a total of 3 rules in 1 ms. Remains 19 /20 variables (removed 1) and now considering 18/20 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 19/20 places, 18/20 transitions.
[2023-03-12 11:32:55] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:55] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:55] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 19 transition count 19
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 19 transition count 19
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 19 transition count 18
Applied a total of 3 rules in 2 ms. Remains 19 /20 variables (removed 1) and now considering 18/20 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 19/20 places, 18/20 transitions.
[2023-03-12 11:32:55] [INFO ] Flatten gal took : 0 ms
[2023-03-12 11:32:55] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:55] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 20 /20 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 20/20 places, 20/20 transitions.
[2023-03-12 11:32:55] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:55] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:55] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20/20 places, 20/20 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 19 transition count 19
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 19 transition count 19
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 19 transition count 18
Applied a total of 3 rules in 2 ms. Remains 19 /20 variables (removed 1) and now considering 18/20 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 19/20 places, 18/20 transitions.
[2023-03-12 11:32:55] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:55] [INFO ] Flatten gal took : 1 ms
[2023-03-12 11:32:55] [INFO ] Input system was already deterministic with 18 transitions.
[2023-03-12 11:32:55] [INFO ] Flatten gal took : 2 ms
[2023-03-12 11:32:55] [INFO ] Flatten gal took : 2 ms
[2023-03-12 11:32:55] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 1 ms.
[2023-03-12 11:32:55] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 20 places, 20 transitions and 44 arcs took 0 ms.
Total runtime 3326 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/475/ctl_0_ --ctl=/tmp/475/ctl_1_ --ctl=/tmp/475/ctl_2_ --ctl=/tmp/475/ctl_3_ --ctl=/tmp/475/ctl_4_ --ctl=/tmp/475/ctl_5_ --ctl=/tmp/475/ctl_6_ --ctl=/tmp/475/ctl_7_ --ctl=/tmp/475/ctl_8_ --ctl=/tmp/475/ctl_9_ --ctl=/tmp/475/ctl_10_ --ctl=/tmp/475/ctl_11_ --ctl=/tmp/475/ctl_12_ --ctl=/tmp/475/ctl_13_ --mu-par --mu-opt
FORMULA AirplaneLD-COL-4000-CTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA AirplaneLD-COL-4000-CTLFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN

BK_STOP 1678620775934

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name AirplaneLD-COL-4000-CTLFireability-00
ctl formula formula --ctl=/tmp/475/ctl_0_
ctl formula name AirplaneLD-COL-4000-CTLFireability-01
ctl formula formula --ctl=/tmp/475/ctl_1_
ctl formula name AirplaneLD-COL-4000-CTLFireability-02
ctl formula formula --ctl=/tmp/475/ctl_2_
ctl formula name AirplaneLD-COL-4000-CTLFireability-03
ctl formula formula --ctl=/tmp/475/ctl_3_
ctl formula name AirplaneLD-COL-4000-CTLFireability-04
ctl formula formula --ctl=/tmp/475/ctl_4_
ctl formula name AirplaneLD-COL-4000-CTLFireability-05
ctl formula formula --ctl=/tmp/475/ctl_5_
ctl formula name AirplaneLD-COL-4000-CTLFireability-06
ctl formula formula --ctl=/tmp/475/ctl_6_
ctl formula name AirplaneLD-COL-4000-CTLFireability-07
ctl formula formula --ctl=/tmp/475/ctl_7_
ctl formula name AirplaneLD-COL-4000-CTLFireability-09
ctl formula formula --ctl=/tmp/475/ctl_8_
ctl formula name AirplaneLD-COL-4000-CTLFireability-10
ctl formula formula --ctl=/tmp/475/ctl_9_
ctl formula name AirplaneLD-COL-4000-CTLFireability-11
ctl formula formula --ctl=/tmp/475/ctl_10_
ctl formula name AirplaneLD-COL-4000-CTLFireability-13
ctl formula formula --ctl=/tmp/475/ctl_11_
ctl formula name AirplaneLD-COL-4000-CTLFireability-14
ctl formula formula --ctl=/tmp/475/ctl_12_
ctl formula name AirplaneLD-COL-4000-CTLFireability-15
ctl formula formula --ctl=/tmp/475/ctl_13_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 20 places, 20 transitions and 44 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 20->20 groups
pnml2lts-sym: Regrouping took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: state vector length is 20; there are 20 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: Exploration took 152 group checks and 0 next state calls
pnml2lts-sym: reachability took 0.070 real 0.220 user 0.050 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: state space has 484 states, 81 nodes
pnml2lts-sym: Formula /tmp/475/ctl_2_ holds for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_0_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_1_ holds for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_4_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_6_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_3_ holds for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_8_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_9_ holds for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_10_ holds for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_11_ holds for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_12_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_7_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_5_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/475/ctl_13_ holds for the initial state
pnml2lts-sym: group_next: 108 nodes total
pnml2lts-sym: group_explored: 106 nodes, 72 short vectors total
pnml2lts-sym: max token count: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-4000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is AirplaneLD-COL-4000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r009-oct2-167813597600234"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-4000.tgz
mv AirplaneLD-COL-4000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;