Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r009-oct2-167813597300006.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................
=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is ARMCacheCoherence-PT-none, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r009-oct2-167813597300006
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 6.6K Feb 25 21:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 25 21:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 25 21:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 21:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:28 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:28 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:28 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 21:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 163K Feb 25 21:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 25 21:46 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 21:46 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 14M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-00
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-01
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-02
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-03
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-04
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-05
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-06
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-07
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-08
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-09
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-10
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-11
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-12
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-13
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-14
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678602260775

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ARMCacheCoherence-PT-none
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-12 06:24:23] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-12 06:24:23] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-12 06:24:24] [INFO ] Load time of PNML (sax parser for PT used): 752 ms
[2023-03-12 06:24:24] [INFO ] Transformed 87 places.
[2023-03-12 06:24:24] [INFO ] Transformed 33676 transitions.
[2023-03-12 06:24:24] [INFO ] Found NUPN structural information;
[2023-03-12 06:24:24] [INFO ] Parsed PT model containing 87 places and 33676 transitions and 246935 arcs in 990 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 19 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 32425 transitions
Reduce redundant transitions removed 32425 transitions.
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 6 resets, run finished after 504 ms. (steps per millisecond=19 ) properties (out of 10) seen :3
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-12 06:24:25] [INFO ] Flow matrix only has 500 transitions (discarded 751 similar events)
// Phase 1: matrix 500 rows 87 cols
[2023-03-12 06:24:25] [INFO ] Computed 12 place invariants in 13 ms
[2023-03-12 06:24:25] [INFO ] After 295ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-03-12 06:24:26] [INFO ] [Nat]Absence check using 12 positive place invariants in 64 ms returned sat
[2023-03-12 06:24:26] [INFO ] After 392ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :2
[2023-03-12 06:24:26] [INFO ] State equation strengthened by 181 read => feed constraints.
[2023-03-12 06:24:26] [INFO ] After 384ms SMT Verify possible using 181 Read/Feed constraints in natural domain returned unsat :5 sat :2
[2023-03-12 06:24:27] [INFO ] After 722ms SMT Verify possible using trap constraints in natural domain returned unsat :5 sat :2
Attempting to minimize the solution found.
Minimization took 240 ms.
[2023-03-12 06:24:27] [INFO ] After 1625ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :2
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-07 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 7 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 40 ms.
Support contains 40 out of 87 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 87/87 places, 1251/1251 transitions.
Drop transitions removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 87 transition count 1235
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 19 place count 84 transition count 1232
Iterating global reduction 1 with 3 rules applied. Total rules applied 22 place count 84 transition count 1232
Performed 4 Post agglomeration using F-continuation condition with reduction of 14 identical transitions.
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 1 with 8 rules applied. Total rules applied 30 place count 80 transition count 1214
Ensure Unique test removed 168 transitions
Reduce isomorphic transitions removed 168 transitions.
Iterating post reduction 1 with 168 rules applied. Total rules applied 198 place count 80 transition count 1046
Drop transitions removed 307 transitions
Redundant transition composition rules discarded 307 transitions
Iterating global reduction 2 with 307 rules applied. Total rules applied 505 place count 80 transition count 739
Free-agglomeration rule applied 2 times.
Iterating global reduction 2 with 2 rules applied. Total rules applied 507 place count 80 transition count 737
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 509 place count 78 transition count 737
Applied a total of 509 rules in 236 ms. Remains 78 /87 variables (removed 9) and now considering 737/1251 (removed 514) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 237 ms. Remains : 78/87 places, 737/1251 transitions.
Incomplete random walk after 10000 steps, including 4 resets, run finished after 128 ms. (steps per millisecond=78 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 2) seen :1
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Running SMT prover for 1 properties.
[2023-03-12 06:24:27] [INFO ] Flow matrix only has 300 transitions (discarded 437 similar events)
// Phase 1: matrix 300 rows 78 cols
[2023-03-12 06:24:27] [INFO ] Computed 12 place invariants in 2 ms
[2023-03-12 06:24:28] [INFO ] [Real]Absence check using 12 positive place invariants in 4 ms returned sat
[2023-03-12 06:24:28] [INFO ] After 166ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-12 06:24:28] [INFO ] [Nat]Absence check using 12 positive place invariants in 3 ms returned sat
[2023-03-12 06:24:28] [INFO ] After 179ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-12 06:24:28] [INFO ] State equation strengthened by 114 read => feed constraints.
[2023-03-12 06:24:28] [INFO ] After 111ms SMT Verify possible using 114 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-12 06:24:28] [INFO ] After 148ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 61 ms.
[2023-03-12 06:24:28] [INFO ] After 442ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 2 ms.
Support contains 11 out of 78 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 78/78 places, 737/737 transitions.
Graph (trivial) has 30 edges and 78 vertex of which 6 / 78 are part of one of the 3 SCC in 3 ms
Free SCC test removed 3 places
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 4 place count 72 transition count 728
Iterating global reduction 0 with 3 rules applied. Total rules applied 7 place count 72 transition count 728
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 0 with 16 rules applied. Total rules applied 23 place count 64 transition count 720
Drop transitions removed 1 transitions
Ensure Unique test removed 28 transitions
Reduce isomorphic transitions removed 29 transitions.
Iterating post reduction 0 with 29 rules applied. Total rules applied 52 place count 64 transition count 691
Drop transitions removed 48 transitions
Redundant transition composition rules discarded 48 transitions
Iterating global reduction 1 with 48 rules applied. Total rules applied 100 place count 64 transition count 643
Free-agglomeration rule applied 7 times.
Iterating global reduction 1 with 7 rules applied. Total rules applied 107 place count 64 transition count 636
Reduce places removed 7 places and 0 transitions.
Drop transitions removed 1 transitions
Ensure Unique test removed 65 transitions
Reduce isomorphic transitions removed 66 transitions.
Iterating post reduction 1 with 73 rules applied. Total rules applied 180 place count 57 transition count 570
Drop transitions removed 40 transitions
Redundant transition composition rules discarded 40 transitions
Iterating global reduction 2 with 40 rules applied. Total rules applied 220 place count 57 transition count 530
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 221 place count 56 transition count 529
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 103 transitions
Reduce isomorphic transitions removed 103 transitions.
Iterating post reduction 2 with 105 rules applied. Total rules applied 326 place count 54 transition count 426
Drop transitions removed 202 transitions
Redundant transition composition rules discarded 202 transitions
Iterating global reduction 3 with 202 rules applied. Total rules applied 528 place count 54 transition count 224
Free-agglomeration rule applied 7 times.
Iterating global reduction 3 with 7 rules applied. Total rules applied 535 place count 54 transition count 217
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 3 with 7 rules applied. Total rules applied 542 place count 47 transition count 217
Partial Free-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 4 with 1 rules applied. Total rules applied 543 place count 47 transition count 217
Applied a total of 543 rules in 162 ms. Remains 47 /78 variables (removed 31) and now considering 217/737 (removed 520) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 162 ms. Remains : 47/78 places, 217/737 transitions.
Finished random walk after 9435 steps, including 2 resets, run visited all 1 properties in 19 ms. (steps per millisecond=496 )
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
All properties solved without resorting to model-checking.
Total runtime 5446 ms.
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --invariant=/tmp/475/inv_0_ --invariant=/tmp/475/inv_1_ --invariant=/tmp/475/inv_2_ --invariant=/tmp/475/inv_3_ --invariant=/tmp/475/inv_4_ --invariant=/tmp/475/inv_5_ --invariant=/tmp/475/inv_6_ --invariant=/tmp/475/inv_7_ --invariant=/tmp/475/inv_8_ --invariant=/tmp/475/inv_9_ --invariant=/tmp/475/inv_10_ --invariant=/tmp/475/inv_11_ --invariant=/tmp/475/inv_12_ --invariant=/tmp/475/inv_13_ --invariant=/tmp/475/inv_14_ --invariant=/tmp/475/inv_15_ --inv-par
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-04 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN

BK_STOP 1678602752719

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
mcc2023
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-00
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_0_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-01
rfs formula type EF
rfs formula formula --invariant=/tmp/475/inv_1_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-02
rfs formula type EF
rfs formula formula --invariant=/tmp/475/inv_2_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-03
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_3_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-04
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_4_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-05
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_5_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-06
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_6_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-07
rfs formula type EF
rfs formula formula --invariant=/tmp/475/inv_7_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-08
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_8_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-09
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_9_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-10
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_10_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-11
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_11_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-12
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_12_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-13
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_13_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-14
rfs formula type EF
rfs formula formula --invariant=/tmp/475/inv_14_
rfs formula name ARMCacheCoherence-PT-none-ReachabilityCardinality-15
rfs formula type AG
rfs formula formula --invariant=/tmp/475/inv_15_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 87 places, 33676 transitions and 246935 arcs
pnml2lts-sym: Petri net ARMCacheCoherence-PT-none analyzed
pnml2lts-sym: There are safe places
pnml2lts-sym: Loading Petri net took 0.730 real 0.690 user 0.040 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 33676->903 groups
pnml2lts-sym: Regrouping took 480.220 real 480.040 user 0.000 sys
pnml2lts-sym: state vector length is 87; there are 903 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym:
pnml2lts-sym: Invariant violation (/tmp/475/inv_5_) found at depth -1!
pnml2lts-sym:
pnml2lts-sym:
pnml2lts-sym: Invariant violation (/tmp/475/inv_10_) found at depth -1!
pnml2lts-sym:
pnml2lts-sym:
pnml2lts-sym: Invariant violation (/tmp/475/inv_15_) found at depth -1!
pnml2lts-sym:
pnml2lts-sym:
pnml2lts-sym: Invariant violation (/tmp/475/inv_14_) found at depth -1!
pnml2lts-sym:
pnml2lts-sym:
pnml2lts-sym: Invariant violation (/tmp/475/inv_13_) found at depth -1!
pnml2lts-sym:
pnml2lts-sym: Exploration took 115217 group checks and 0 next state calls
pnml2lts-sym: reachability took 1.060 real 4.220 user 0.000 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: state space has 320567601 states, 2225 nodes
pnml2lts-sym: group_next: 43612 nodes total
pnml2lts-sym: group_explored: 5770 nodes, 9282 short vectors total
pnml2lts-sym: max token count: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is ARMCacheCoherence-PT-none, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r009-oct2-167813597300006"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;