fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r007-oct2-167813596000754
Last Updated
May 14, 2023

About the Execution of LoLa+red for BART-PT-002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2406.720 15889.00 28128.00 22.60 TFTFFTTFFTFTTTTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813596000754.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is BART-PT-002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813596000754
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 6.4M
-rw-r--r-- 1 mcc users 191K Feb 26 04:05 CTLCardinality.txt
-rw-r--r-- 1 mcc users 715K Feb 26 04:05 CTLCardinality.xml
-rw-r--r-- 1 mcc users 206K Feb 26 03:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 693K Feb 26 03:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 105K Feb 25 15:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 280K Feb 25 15:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 58K Feb 25 15:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 156K Feb 25 15:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 479K Feb 26 04:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 1.8M Feb 26 04:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 273K Feb 26 04:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 930K Feb 26 04:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 21K Feb 25 15:34 UpperBounds.txt
-rw-r--r-- 1 mcc users 41K Feb 25 15:34 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 534K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-PT-002-CTLFireability-00
FORMULA_NAME BART-PT-002-CTLFireability-01
FORMULA_NAME BART-PT-002-CTLFireability-02
FORMULA_NAME BART-PT-002-CTLFireability-03
FORMULA_NAME BART-PT-002-CTLFireability-04
FORMULA_NAME BART-PT-002-CTLFireability-05
FORMULA_NAME BART-PT-002-CTLFireability-06
FORMULA_NAME BART-PT-002-CTLFireability-07
FORMULA_NAME BART-PT-002-CTLFireability-08
FORMULA_NAME BART-PT-002-CTLFireability-09
FORMULA_NAME BART-PT-002-CTLFireability-10
FORMULA_NAME BART-PT-002-CTLFireability-11
FORMULA_NAME BART-PT-002-CTLFireability-12
FORMULA_NAME BART-PT-002-CTLFireability-13
FORMULA_NAME BART-PT-002-CTLFireability-14
FORMULA_NAME BART-PT-002-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678355799278

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BART-PT-002
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 09:56:41] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-09 09:56:41] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 09:56:41] [INFO ] Load time of PNML (sax parser for PT used): 116 ms
[2023-03-09 09:56:41] [INFO ] Transformed 474 places.
[2023-03-09 09:56:41] [INFO ] Transformed 404 transitions.
[2023-03-09 09:56:41] [INFO ] Found NUPN structural information;
[2023-03-09 09:56:41] [INFO ] Parsed PT model containing 474 places and 404 transitions and 3240 arcs in 207 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 27 ms.
Reduce places removed 210 places and 0 transitions.
Support contains 264 out of 264 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Applied a total of 0 rules in 11 ms. Remains 264 /264 variables (removed 0) and now considering 404/404 (removed 0) transitions.
// Phase 1: matrix 404 rows 264 cols
[2023-03-09 09:56:41] [INFO ] Computed 2 place invariants in 13 ms
[2023-03-09 09:56:42] [INFO ] Implicit Places using invariants in 354 ms returned []
[2023-03-09 09:56:42] [INFO ] Invariant cache hit.
[2023-03-09 09:56:42] [INFO ] Implicit Places using invariants and state equation in 224 ms returned []
Implicit Place search using SMT with State Equation took 609 ms to find 0 implicit places.
[2023-03-09 09:56:42] [INFO ] Invariant cache hit.
[2023-03-09 09:56:42] [INFO ] Dead Transitions using invariants and state equation in 226 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 849 ms. Remains : 264/264 places, 404/404 transitions.
Support contains 264 out of 264 places after structural reductions.
[2023-03-09 09:56:43] [INFO ] Flatten gal took : 62 ms
[2023-03-09 09:56:43] [INFO ] Flatten gal took : 56 ms
[2023-03-09 09:56:43] [INFO ] Input system was already deterministic with 404 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 356 ms. (steps per millisecond=28 ) properties (out of 57) seen :52
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 105 ms. (steps per millisecond=95 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 105 ms. (steps per millisecond=95 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 5) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-09 09:56:44] [INFO ] Invariant cache hit.
[2023-03-09 09:56:44] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-09 09:56:44] [INFO ] After 125ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :0
Fused 4 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 4 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 2 formulas.
FORMULA BART-PT-002-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-002-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 09:56:44] [INFO ] Flatten gal took : 20 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 27 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 404 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Applied a total of 0 rules in 4 ms. Remains 264 /264 variables (removed 0) and now considering 404/404 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 264/264 places, 404/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 18 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 15 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 404 transitions.
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Applied a total of 0 rules in 2 ms. Remains 264 /264 variables (removed 0) and now considering 404/404 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 264/264 places, 404/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 12 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 14 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 404 transitions.
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Applied a total of 0 rules in 11 ms. Remains 264 /264 variables (removed 0) and now considering 404/404 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 264/264 places, 404/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 16 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 14 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 404 transitions.
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Applied a total of 0 rules in 8 ms. Remains 264 /264 variables (removed 0) and now considering 404/404 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 264/264 places, 404/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 13 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 9 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 404 transitions.
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Discarding 64 places :
Symmetric choice reduction at 0 with 64 rule applications. Total rules 64 place count 200 transition count 340
Iterating global reduction 0 with 64 rules applied. Total rules applied 128 place count 200 transition count 340
Discarding 54 places :
Symmetric choice reduction at 0 with 54 rule applications. Total rules 182 place count 146 transition count 286
Iterating global reduction 0 with 54 rules applied. Total rules applied 236 place count 146 transition count 286
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 244 place count 138 transition count 278
Iterating global reduction 0 with 8 rules applied. Total rules applied 252 place count 138 transition count 278
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 258 place count 132 transition count 272
Iterating global reduction 0 with 6 rules applied. Total rules applied 264 place count 132 transition count 272
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 270 place count 126 transition count 266
Iterating global reduction 0 with 6 rules applied. Total rules applied 276 place count 126 transition count 266
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 282 place count 120 transition count 260
Iterating global reduction 0 with 6 rules applied. Total rules applied 288 place count 120 transition count 260
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 294 place count 114 transition count 254
Iterating global reduction 0 with 6 rules applied. Total rules applied 300 place count 114 transition count 254
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 306 place count 108 transition count 248
Iterating global reduction 0 with 6 rules applied. Total rules applied 312 place count 108 transition count 248
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 316 place count 104 transition count 244
Iterating global reduction 0 with 4 rules applied. Total rules applied 320 place count 104 transition count 244
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 324 place count 100 transition count 240
Iterating global reduction 0 with 4 rules applied. Total rules applied 328 place count 100 transition count 240
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 330 place count 98 transition count 238
Iterating global reduction 0 with 2 rules applied. Total rules applied 332 place count 98 transition count 238
Applied a total of 332 rules in 45 ms. Remains 98 /264 variables (removed 166) and now considering 238/404 (removed 166) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 45 ms. Remains : 98/264 places, 238/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 4 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 238 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Graph (trivial) has 88 edges and 264 vertex of which 12 / 264 are part of one of the 2 SCC in 3 ms
Free SCC test removed 10 places
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 3 place count 254 transition count 392
Reduce places removed 2 places and 0 transitions.
Performed 18 Post agglomeration using F-continuation condition.Transition count delta: 18
Iterating post reduction 1 with 20 rules applied. Total rules applied 23 place count 252 transition count 374
Reduce places removed 18 places and 0 transitions.
Iterating post reduction 2 with 18 rules applied. Total rules applied 41 place count 234 transition count 374
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 4 Pre rules applied. Total rules applied 41 place count 234 transition count 370
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 49 place count 230 transition count 370
Discarding 10 places :
Symmetric choice reduction at 3 with 10 rule applications. Total rules 59 place count 220 transition count 360
Iterating global reduction 3 with 10 rules applied. Total rules applied 69 place count 220 transition count 360
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 75 place count 214 transition count 354
Iterating global reduction 3 with 6 rules applied. Total rules applied 81 place count 214 transition count 354
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 87 place count 208 transition count 348
Iterating global reduction 3 with 6 rules applied. Total rules applied 93 place count 208 transition count 348
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 99 place count 202 transition count 342
Iterating global reduction 3 with 6 rules applied. Total rules applied 105 place count 202 transition count 342
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 109 place count 198 transition count 338
Iterating global reduction 3 with 4 rules applied. Total rules applied 113 place count 198 transition count 338
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 117 place count 194 transition count 334
Iterating global reduction 3 with 4 rules applied. Total rules applied 121 place count 194 transition count 334
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 123 place count 192 transition count 332
Iterating global reduction 3 with 2 rules applied. Total rules applied 125 place count 192 transition count 332
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 3 with 28 rules applied. Total rules applied 153 place count 178 transition count 318
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 155 place count 178 transition count 316
Applied a total of 155 rules in 47 ms. Remains 178 /264 variables (removed 86) and now considering 316/404 (removed 88) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 47 ms. Remains : 178/264 places, 316/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 8 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 7 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 316 transitions.
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Applied a total of 0 rules in 6 ms. Remains 264 /264 variables (removed 0) and now considering 404/404 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 264/264 places, 404/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 10 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 22 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 404 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Graph (trivial) has 400 edges and 264 vertex of which 261 / 264 are part of one of the 2 SCC in 1 ms
Free SCC test removed 259 places
Ensure Unique test removed 397 transitions
Reduce isomorphic transitions removed 397 transitions.
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 4 transition count 6
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 3 transition count 5
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 6 place count 2 transition count 4
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 7 place count 2 transition count 3
Applied a total of 7 rules in 4 ms. Remains 2 /264 variables (removed 262) and now considering 3/404 (removed 401) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 2/264 places, 3/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 1 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 0 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Discarding 57 places :
Symmetric choice reduction at 0 with 57 rule applications. Total rules 57 place count 207 transition count 347
Iterating global reduction 0 with 57 rules applied. Total rules applied 114 place count 207 transition count 347
Discarding 46 places :
Symmetric choice reduction at 0 with 46 rule applications. Total rules 160 place count 161 transition count 301
Iterating global reduction 0 with 46 rules applied. Total rules applied 206 place count 161 transition count 301
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 212 place count 155 transition count 295
Iterating global reduction 0 with 6 rules applied. Total rules applied 218 place count 155 transition count 295
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 222 place count 151 transition count 291
Iterating global reduction 0 with 4 rules applied. Total rules applied 226 place count 151 transition count 291
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 230 place count 147 transition count 287
Iterating global reduction 0 with 4 rules applied. Total rules applied 234 place count 147 transition count 287
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 238 place count 143 transition count 283
Iterating global reduction 0 with 4 rules applied. Total rules applied 242 place count 143 transition count 283
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 246 place count 139 transition count 279
Iterating global reduction 0 with 4 rules applied. Total rules applied 250 place count 139 transition count 279
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 253 place count 136 transition count 276
Iterating global reduction 0 with 3 rules applied. Total rules applied 256 place count 136 transition count 276
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 257 place count 135 transition count 275
Iterating global reduction 0 with 1 rules applied. Total rules applied 258 place count 135 transition count 275
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 259 place count 134 transition count 274
Iterating global reduction 0 with 1 rules applied. Total rules applied 260 place count 134 transition count 274
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 261 place count 133 transition count 273
Iterating global reduction 0 with 1 rules applied. Total rules applied 262 place count 133 transition count 273
Applied a total of 262 rules in 22 ms. Remains 133 /264 variables (removed 131) and now considering 273/404 (removed 131) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 133/264 places, 273/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 6 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 273 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Graph (trivial) has 402 edges and 264 vertex of which 262 / 264 are part of one of the 2 SCC in 1 ms
Free SCC test removed 260 places
Ensure Unique test removed 399 transitions
Reduce isomorphic transitions removed 399 transitions.
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 3 transition count 4
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 2 transition count 4
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 4 place count 2 transition count 3
Applied a total of 4 rules in 2 ms. Remains 2 /264 variables (removed 262) and now considering 3/404 (removed 401) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 2/264 places, 3/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 1 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 0 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Discarding 64 places :
Symmetric choice reduction at 0 with 64 rule applications. Total rules 64 place count 200 transition count 340
Iterating global reduction 0 with 64 rules applied. Total rules applied 128 place count 200 transition count 340
Discarding 54 places :
Symmetric choice reduction at 0 with 54 rule applications. Total rules 182 place count 146 transition count 286
Iterating global reduction 0 with 54 rules applied. Total rules applied 236 place count 146 transition count 286
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 244 place count 138 transition count 278
Iterating global reduction 0 with 8 rules applied. Total rules applied 252 place count 138 transition count 278
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 258 place count 132 transition count 272
Iterating global reduction 0 with 6 rules applied. Total rules applied 264 place count 132 transition count 272
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 270 place count 126 transition count 266
Iterating global reduction 0 with 6 rules applied. Total rules applied 276 place count 126 transition count 266
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 282 place count 120 transition count 260
Iterating global reduction 0 with 6 rules applied. Total rules applied 288 place count 120 transition count 260
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 294 place count 114 transition count 254
Iterating global reduction 0 with 6 rules applied. Total rules applied 300 place count 114 transition count 254
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 306 place count 108 transition count 248
Iterating global reduction 0 with 6 rules applied. Total rules applied 312 place count 108 transition count 248
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 316 place count 104 transition count 244
Iterating global reduction 0 with 4 rules applied. Total rules applied 320 place count 104 transition count 244
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 324 place count 100 transition count 240
Iterating global reduction 0 with 4 rules applied. Total rules applied 328 place count 100 transition count 240
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 330 place count 98 transition count 238
Iterating global reduction 0 with 2 rules applied. Total rules applied 332 place count 98 transition count 238
Applied a total of 332 rules in 19 ms. Remains 98 /264 variables (removed 166) and now considering 238/404 (removed 166) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 98/264 places, 238/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 4 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 4 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 238 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Graph (trivial) has 356 edges and 264 vertex of which 114 / 264 are part of one of the 1 SCC in 1 ms
Free SCC test removed 113 places
Ensure Unique test removed 177 transitions
Reduce isomorphic transitions removed 177 transitions.
Drop transitions removed 72 transitions
Trivial Post-agglo rules discarded 72 transitions
Performed 72 trivial Post agglomeration. Transition count delta: 72
Iterating post reduction 0 with 72 rules applied. Total rules applied 73 place count 151 transition count 155
Reduce places removed 72 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 1 with 76 rules applied. Total rules applied 149 place count 79 transition count 151
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 152 place count 76 transition count 151
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 5 Pre rules applied. Total rules applied 152 place count 76 transition count 146
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 162 place count 71 transition count 146
Discarding 8 places :
Symmetric choice reduction at 3 with 8 rule applications. Total rules 170 place count 63 transition count 138
Iterating global reduction 3 with 8 rules applied. Total rules applied 178 place count 63 transition count 138
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 181 place count 63 transition count 135
Discarding 4 places :
Symmetric choice reduction at 4 with 4 rule applications. Total rules 185 place count 59 transition count 131
Iterating global reduction 4 with 4 rules applied. Total rules applied 189 place count 59 transition count 131
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 192 place count 56 transition count 128
Iterating global reduction 4 with 3 rules applied. Total rules applied 195 place count 56 transition count 128
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 198 place count 53 transition count 125
Iterating global reduction 4 with 3 rules applied. Total rules applied 201 place count 53 transition count 125
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 203 place count 51 transition count 123
Iterating global reduction 4 with 2 rules applied. Total rules applied 205 place count 51 transition count 123
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 207 place count 49 transition count 121
Iterating global reduction 4 with 2 rules applied. Total rules applied 209 place count 49 transition count 121
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 210 place count 48 transition count 120
Iterating global reduction 4 with 1 rules applied. Total rules applied 211 place count 48 transition count 120
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 4 with 12 rules applied. Total rules applied 223 place count 42 transition count 114
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 225 place count 42 transition count 112
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 227 place count 41 transition count 111
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 229 place count 41 transition count 109
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 6 with 2 rules applied. Total rules applied 231 place count 40 transition count 108
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 6 with 2 rules applied. Total rules applied 233 place count 40 transition count 106
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 7 with 2 rules applied. Total rules applied 235 place count 39 transition count 105
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 7 with 2 rules applied. Total rules applied 237 place count 39 transition count 103
Drop transitions removed 45 transitions
Redundant transition composition rules discarded 45 transitions
Iterating global reduction 8 with 45 rules applied. Total rules applied 282 place count 39 transition count 58
Drop transitions removed 14 transitions
Trivial Post-agglo rules discarded 14 transitions
Performed 14 trivial Post agglomeration. Transition count delta: 14
Iterating post reduction 8 with 14 rules applied. Total rules applied 296 place count 39 transition count 44
Reduce places removed 14 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 9 with 15 rules applied. Total rules applied 311 place count 25 transition count 43
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 10 with 1 rules applied. Total rules applied 312 place count 24 transition count 43
Drop transitions removed 7 transitions
Redundant transition composition rules discarded 7 transitions
Iterating global reduction 11 with 7 rules applied. Total rules applied 319 place count 24 transition count 36
Drop transitions removed 7 transitions
Trivial Post-agglo rules discarded 7 transitions
Performed 7 trivial Post agglomeration. Transition count delta: 7
Iterating post reduction 11 with 7 rules applied. Total rules applied 326 place count 24 transition count 29
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 12 with 7 rules applied. Total rules applied 333 place count 17 transition count 29
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 13 with 4 rules applied. Total rules applied 337 place count 17 transition count 25
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 13 with 3 rules applied. Total rules applied 340 place count 17 transition count 22
Reduce places removed 3 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 14 with 4 rules applied. Total rules applied 344 place count 14 transition count 21
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 15 with 1 rules applied. Total rules applied 345 place count 13 transition count 21
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 16 with 2 rules applied. Total rules applied 347 place count 13 transition count 19
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 16 with 1 rules applied. Total rules applied 348 place count 13 transition count 18
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 17 with 2 rules applied. Total rules applied 350 place count 12 transition count 17
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 18 with 1 rules applied. Total rules applied 351 place count 11 transition count 17
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 19 with 1 rules applied. Total rules applied 352 place count 11 transition count 16
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 19 with 1 rules applied. Total rules applied 353 place count 11 transition count 15
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 20 with 1 rules applied. Total rules applied 354 place count 10 transition count 15
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 21 with 1 rules applied. Total rules applied 355 place count 10 transition count 15
Applied a total of 355 rules in 24 ms. Remains 10 /264 variables (removed 254) and now considering 15/404 (removed 389) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 10/264 places, 15/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 1 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 1 ms
[2023-03-09 09:56:45] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Discarding 63 places :
Symmetric choice reduction at 0 with 63 rule applications. Total rules 63 place count 201 transition count 341
Iterating global reduction 0 with 63 rules applied. Total rules applied 126 place count 201 transition count 341
Discarding 53 places :
Symmetric choice reduction at 0 with 53 rule applications. Total rules 179 place count 148 transition count 288
Iterating global reduction 0 with 53 rules applied. Total rules applied 232 place count 148 transition count 288
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 240 place count 140 transition count 280
Iterating global reduction 0 with 8 rules applied. Total rules applied 248 place count 140 transition count 280
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 254 place count 134 transition count 274
Iterating global reduction 0 with 6 rules applied. Total rules applied 260 place count 134 transition count 274
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 266 place count 128 transition count 268
Iterating global reduction 0 with 6 rules applied. Total rules applied 272 place count 128 transition count 268
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 278 place count 122 transition count 262
Iterating global reduction 0 with 6 rules applied. Total rules applied 284 place count 122 transition count 262
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 290 place count 116 transition count 256
Iterating global reduction 0 with 6 rules applied. Total rules applied 296 place count 116 transition count 256
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 302 place count 110 transition count 250
Iterating global reduction 0 with 6 rules applied. Total rules applied 308 place count 110 transition count 250
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 312 place count 106 transition count 246
Iterating global reduction 0 with 4 rules applied. Total rules applied 316 place count 106 transition count 246
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 320 place count 102 transition count 242
Iterating global reduction 0 with 4 rules applied. Total rules applied 324 place count 102 transition count 242
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 326 place count 100 transition count 240
Iterating global reduction 0 with 2 rules applied. Total rules applied 328 place count 100 transition count 240
Applied a total of 328 rules in 17 ms. Remains 100 /264 variables (removed 164) and now considering 240/404 (removed 164) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 100/264 places, 240/404 transitions.
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 4 ms
[2023-03-09 09:56:45] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:56:46] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in LTL mode, iteration 0 : 264/264 places, 404/404 transitions.
Discarding 63 places :
Symmetric choice reduction at 0 with 63 rule applications. Total rules 63 place count 201 transition count 341
Iterating global reduction 0 with 63 rules applied. Total rules applied 126 place count 201 transition count 341
Discarding 51 places :
Symmetric choice reduction at 0 with 51 rule applications. Total rules 177 place count 150 transition count 290
Iterating global reduction 0 with 51 rules applied. Total rules applied 228 place count 150 transition count 290
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 235 place count 143 transition count 283
Iterating global reduction 0 with 7 rules applied. Total rules applied 242 place count 143 transition count 283
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 248 place count 137 transition count 277
Iterating global reduction 0 with 6 rules applied. Total rules applied 254 place count 137 transition count 277
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 260 place count 131 transition count 271
Iterating global reduction 0 with 6 rules applied. Total rules applied 266 place count 131 transition count 271
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 272 place count 125 transition count 265
Iterating global reduction 0 with 6 rules applied. Total rules applied 278 place count 125 transition count 265
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 284 place count 119 transition count 259
Iterating global reduction 0 with 6 rules applied. Total rules applied 290 place count 119 transition count 259
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 296 place count 113 transition count 253
Iterating global reduction 0 with 6 rules applied. Total rules applied 302 place count 113 transition count 253
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 306 place count 109 transition count 249
Iterating global reduction 0 with 4 rules applied. Total rules applied 310 place count 109 transition count 249
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 313 place count 106 transition count 246
Iterating global reduction 0 with 3 rules applied. Total rules applied 316 place count 106 transition count 246
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 318 place count 104 transition count 244
Iterating global reduction 0 with 2 rules applied. Total rules applied 320 place count 104 transition count 244
Applied a total of 320 rules in 15 ms. Remains 104 /264 variables (removed 160) and now considering 244/404 (removed 160) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 104/264 places, 244/404 transitions.
[2023-03-09 09:56:46] [INFO ] Flatten gal took : 4 ms
[2023-03-09 09:56:46] [INFO ] Flatten gal took : 4 ms
[2023-03-09 09:56:46] [INFO ] Input system was already deterministic with 244 transitions.
[2023-03-09 09:56:46] [INFO ] Flatten gal took : 24 ms
[2023-03-09 09:56:46] [INFO ] Flatten gal took : 23 ms
[2023-03-09 09:56:46] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 59 ms.
[2023-03-09 09:56:46] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 264 places, 404 transitions and 808 arcs took 3 ms.
Total runtime 4930 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT BART-PT-002
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA BART-PT-002-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-002-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678355815167

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 32 (type EXCL) for 31 BART-PT-002-CTLFireability-10
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 32 (type EXCL) for BART-PT-002-CTLFireability-10
lola: result : false
lola: markings : 1
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 24 BART-PT-002-CTLFireability-09
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 27 (type EXCL) for BART-PT-002-CTLFireability-09
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 BART-PT-002-CTLFireability-08
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for BART-PT-002-CTLFireability-08
lola: result : false
lola: markings : 1
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 24 BART-PT-002-CTLFireability-09
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 29 (type EXCL) for BART-PT-002-CTLFireability-09
lola: result : true
lola: markings : 1
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 7 (type EXCL) for 6 BART-PT-002-CTLFireability-02
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 7 (type EXCL) for BART-PT-002-CTLFireability-02
lola: result : true
lola: markings : 17424
lola: fired transitions : 130605
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 BART-PT-002-CTLFireability-15
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for BART-PT-002-CTLFireability-15
lola: result : true
lola: markings : 17424
lola: fired transitions : 106387
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 BART-PT-002-CTLFireability-14
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for BART-PT-002-CTLFireability-14
lola: result : true
lola: markings : 35
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 BART-PT-002-CTLFireability-11
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for BART-PT-002-CTLFireability-11
lola: result : true
lola: markings : 17424
lola: fired transitions : 53328
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 BART-PT-002-CTLFireability-07
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for BART-PT-002-CTLFireability-07
lola: result : false
lola: markings : 11659
lola: fired transitions : 55359
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 BART-PT-002-CTLFireability-04
lola: time limit : 598 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for BART-PT-002-CTLFireability-04
lola: result : false
lola: markings : 34
lola: fired transitions : 34
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 BART-PT-002-CTLFireability-03
lola: time limit : 718 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for BART-PT-002-CTLFireability-03
lola: result : false
lola: markings : 6671
lola: fired transitions : 14342
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 BART-PT-002-CTLFireability-01
lola: time limit : 898 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for BART-PT-002-CTLFireability-01
lola: result : false
lola: markings : 960
lola: fired transitions : 1090
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 BART-PT-002-CTLFireability-00
lola: time limit : 1197 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for BART-PT-002-CTLFireability-00
lola: result : true
lola: markings : 17108
lola: fired transitions : 67480
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 BART-PT-002-CTLFireability-05
lola: time limit : 1795 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for BART-PT-002-CTLFireability-05
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 BART-PT-002-CTLFireability-13
lola: time limit : 3591 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for BART-PT-002-CTLFireability-13
lola: result : true
lola: markings : 100
lola: fired transitions : 467
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-PT-002-CTLFireability-00: CTL true CTL model checker
BART-PT-002-CTLFireability-01: CTL false CTL model checker
BART-PT-002-CTLFireability-02: CTL true CTL model checker
BART-PT-002-CTLFireability-03: CTL false CTL model checker
BART-PT-002-CTLFireability-04: CTL false CTL model checker
BART-PT-002-CTLFireability-05: EG true state space / EG
BART-PT-002-CTLFireability-07: CTL false CTL model checker
BART-PT-002-CTLFireability-08: AFAG false CTL model checker
BART-PT-002-CTLFireability-09: DISJ true CTL model checker
BART-PT-002-CTLFireability-10: AFAG false CTL model checker
BART-PT-002-CTLFireability-11: CTL true CTL model checker
BART-PT-002-CTLFireability-13: CTL true CTL model checker
BART-PT-002-CTLFireability-14: CTL true CTL model checker
BART-PT-002-CTLFireability-15: CTL true CTL model checker


Time elapsed: 9 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is BART-PT-002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813596000754"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-002.tgz
mv BART-PT-002 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;