Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595900690.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is BART-COL-002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595900690
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 644K
-rw-r--r-- 1 mcc users 7.2K Feb 26 04:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 26 04:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 26 03:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 26 03:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 15:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Feb 26 04:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 149K Feb 26 04:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Feb 26 04:10 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 26 04:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:34 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:34 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 184K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-COL-002-CTLFireability-00
FORMULA_NAME BART-COL-002-CTLFireability-01
FORMULA_NAME BART-COL-002-CTLFireability-02
FORMULA_NAME BART-COL-002-CTLFireability-03
FORMULA_NAME BART-COL-002-CTLFireability-04
FORMULA_NAME BART-COL-002-CTLFireability-05
FORMULA_NAME BART-COL-002-CTLFireability-06
FORMULA_NAME BART-COL-002-CTLFireability-07
FORMULA_NAME BART-COL-002-CTLFireability-08
FORMULA_NAME BART-COL-002-CTLFireability-09
FORMULA_NAME BART-COL-002-CTLFireability-10
FORMULA_NAME BART-COL-002-CTLFireability-11
FORMULA_NAME BART-COL-002-CTLFireability-12
FORMULA_NAME BART-COL-002-CTLFireability-13
FORMULA_NAME BART-COL-002-CTLFireability-14
FORMULA_NAME BART-COL-002-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678354457962

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BART-COL-002
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 09:34:20] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-09 09:34:20] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 09:34:20] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-09 09:34:20] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-09 09:34:20] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 703 ms
[2023-03-09 09:34:20] [INFO ] Detected 3 constant HL places corresponding to 10373 PT places.
[2023-03-09 09:34:20] [INFO ] Imported 4 HL places and 7 HL transitions for a total of 10865 PT places and 2.814459024E9 transition bindings in 78 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 16 ms.
[2023-03-09 09:34:21] [INFO ] Built PT skeleton of HLPN with 4 places and 7 transitions 26 arcs in 7 ms.
[2023-03-09 09:34:21] [INFO ] Skeletonized 1 HLPN properties in 2 ms. Removed 15 properties that had guard overlaps.
Computed a total of 4 stabilizing places and 2 stable transitions
All 16 properties of the HLPN use transition enablings in a way that makes the skeleton too coarse.
Domain [distance(41), speed(6), distance(41)] of place NewDistTable breaks symmetries in sort distance
Arc [2:1*[(MOD (ADD $tsp 1) 6), $ds2]] contains successor/predecessor on variables of sort speed
Symmetric sort wr.t. initial and guards and successors and join/free detected :trainid
Symmetric sort wr.t. initial detected :trainid
Symmetric sort wr.t. initial and guards detected :trainid
Applying symmetric unfolding of full symmetric sort :trainid domain size was 2
[2023-03-09 09:34:22] [INFO ] Unfolded HLPN to a Petri net with 10619 places and 323 transitions 601 arcs in 1467 ms.
[2023-03-09 09:34:22] [INFO ] Unfolded 16 HLPN properties in 2 ms.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
[2023-03-09 09:34:22] [INFO ] Reduced 35 identical enabling conditions.
Deduced a syphon composed of 10215 places in 1 ms
Reduce places removed 10487 places and 121 transitions.
Support contains 132 out of 132 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 6 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
// Phase 1: matrix 202 rows 132 cols
[2023-03-09 09:34:22] [INFO ] Computed 1 place invariants in 13 ms
[2023-03-09 09:34:22] [INFO ] Implicit Places using invariants in 208 ms returned []
[2023-03-09 09:34:22] [INFO ] Invariant cache hit.
[2023-03-09 09:34:22] [INFO ] Implicit Places using invariants and state equation in 151 ms returned []
Implicit Place search using SMT with State Equation took 388 ms to find 0 implicit places.
[2023-03-09 09:34:22] [INFO ] Invariant cache hit.
[2023-03-09 09:34:23] [INFO ] Dead Transitions using invariants and state equation in 188 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 586 ms. Remains : 132/132 places, 202/202 transitions.
Support contains 132 out of 132 places after structural reductions.
[2023-03-09 09:34:23] [INFO ] Flatten gal took : 45 ms
[2023-03-09 09:34:23] [INFO ] Flatten gal took : 77 ms
[2023-03-09 09:34:23] [INFO ] Input system was already deterministic with 202 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 236 ms. (steps per millisecond=42 ) properties (out of 23) seen :20
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-09 09:34:24] [INFO ] Invariant cache hit.
[2023-03-09 09:34:24] [INFO ] After 35ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 3 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA BART-COL-002-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 09:34:24] [INFO ] Flatten gal took : 27 ms
[2023-03-09 09:34:24] [INFO ] Flatten gal took : 41 ms
[2023-03-09 09:34:24] [INFO ] Input system was already deterministic with 202 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 132/132 places, 202/202 transitions.
[2023-03-09 09:34:24] [INFO ] Flatten gal took : 7 ms
[2023-03-09 09:34:24] [INFO ] Flatten gal took : 7 ms
[2023-03-09 09:34:24] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 132/132 places, 202/202 transitions.
[2023-03-09 09:34:24] [INFO ] Flatten gal took : 7 ms
[2023-03-09 09:34:24] [INFO ] Flatten gal took : 8 ms
[2023-03-09 09:34:24] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 132/132 places, 202/202 transitions.
[2023-03-09 09:34:24] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:34:24] [INFO ] Flatten gal took : 6 ms
[2023-03-09 09:34:24] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 3 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 132/132 places, 202/202 transitions.
[2023-03-09 09:34:24] [INFO ] Flatten gal took : 6 ms
[2023-03-09 09:34:24] [INFO ] Flatten gal took : 6 ms
[2023-03-09 09:34:24] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Discarding 32 places :
Symmetric choice reduction at 0 with 32 rule applications. Total rules 32 place count 100 transition count 170
Iterating global reduction 0 with 32 rules applied. Total rules applied 64 place count 100 transition count 170
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 91 place count 73 transition count 143
Iterating global reduction 0 with 27 rules applied. Total rules applied 118 place count 73 transition count 143
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 122 place count 69 transition count 139
Iterating global reduction 0 with 4 rules applied. Total rules applied 126 place count 69 transition count 139
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 129 place count 66 transition count 136
Iterating global reduction 0 with 3 rules applied. Total rules applied 132 place count 66 transition count 136
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 135 place count 63 transition count 133
Iterating global reduction 0 with 3 rules applied. Total rules applied 138 place count 63 transition count 133
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 141 place count 60 transition count 130
Iterating global reduction 0 with 3 rules applied. Total rules applied 144 place count 60 transition count 130
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 147 place count 57 transition count 127
Iterating global reduction 0 with 3 rules applied. Total rules applied 150 place count 57 transition count 127
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 153 place count 54 transition count 124
Iterating global reduction 0 with 3 rules applied. Total rules applied 156 place count 54 transition count 124
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 158 place count 52 transition count 122
Iterating global reduction 0 with 2 rules applied. Total rules applied 160 place count 52 transition count 122
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 162 place count 50 transition count 120
Iterating global reduction 0 with 2 rules applied. Total rules applied 164 place count 50 transition count 120
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 165 place count 49 transition count 119
Iterating global reduction 0 with 1 rules applied. Total rules applied 166 place count 49 transition count 119
Applied a total of 166 rules in 29 ms. Remains 49 /132 variables (removed 83) and now considering 119/202 (removed 83) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 49/132 places, 119/202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 3 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 3 ms
[2023-03-09 09:34:25] [INFO ] Input system was already deterministic with 119 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Graph (trivial) has 44 edges and 132 vertex of which 6 / 132 are part of one of the 1 SCC in 1 ms
Free SCC test removed 5 places
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 127 transition count 196
Reduce places removed 1 places and 0 transitions.
Performed 9 Post agglomeration using F-continuation condition.Transition count delta: 9
Iterating post reduction 1 with 10 rules applied. Total rules applied 12 place count 126 transition count 187
Reduce places removed 9 places and 0 transitions.
Iterating post reduction 2 with 9 rules applied. Total rules applied 21 place count 117 transition count 187
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 21 place count 117 transition count 185
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 25 place count 115 transition count 185
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 30 place count 110 transition count 180
Iterating global reduction 3 with 5 rules applied. Total rules applied 35 place count 110 transition count 180
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 38 place count 107 transition count 177
Iterating global reduction 3 with 3 rules applied. Total rules applied 41 place count 107 transition count 177
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 44 place count 104 transition count 174
Iterating global reduction 3 with 3 rules applied. Total rules applied 47 place count 104 transition count 174
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 50 place count 101 transition count 171
Iterating global reduction 3 with 3 rules applied. Total rules applied 53 place count 101 transition count 171
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 55 place count 99 transition count 169
Iterating global reduction 3 with 2 rules applied. Total rules applied 57 place count 99 transition count 169
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 59 place count 97 transition count 167
Iterating global reduction 3 with 2 rules applied. Total rules applied 61 place count 97 transition count 167
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 62 place count 96 transition count 166
Iterating global reduction 3 with 1 rules applied. Total rules applied 63 place count 96 transition count 166
Performed 7 Post agglomeration using F-continuation condition.Transition count delta: 7
Deduced a syphon composed of 7 places in 0 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 3 with 14 rules applied. Total rules applied 77 place count 89 transition count 159
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 78 place count 89 transition count 158
Applied a total of 78 rules in 36 ms. Remains 89 /132 variables (removed 43) and now considering 158/202 (removed 44) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 37 ms. Remains : 89/132 places, 158/202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 4 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 4 ms
[2023-03-09 09:34:25] [INFO ] Input system was already deterministic with 158 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 0 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 132/132 places, 202/202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 6 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 7 ms
[2023-03-09 09:34:25] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 132/132 places, 202/202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:34:25] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 132/132 places, 202/202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 6 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 6 ms
[2023-03-09 09:34:25] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 132/132 places, 202/202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 4 ms
[2023-03-09 09:34:25] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 132 transition count 200
Reduce places removed 2 places and 0 transitions.
Performed 9 Post agglomeration using F-continuation condition.Transition count delta: 9
Iterating post reduction 1 with 11 rules applied. Total rules applied 13 place count 130 transition count 191
Reduce places removed 9 places and 0 transitions.
Iterating post reduction 2 with 9 rules applied. Total rules applied 22 place count 121 transition count 191
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 4 Pre rules applied. Total rules applied 22 place count 121 transition count 187
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 30 place count 117 transition count 187
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 36 place count 111 transition count 181
Iterating global reduction 3 with 6 rules applied. Total rules applied 42 place count 111 transition count 181
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 43 place count 111 transition count 180
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 46 place count 108 transition count 177
Iterating global reduction 4 with 3 rules applied. Total rules applied 49 place count 108 transition count 177
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 52 place count 105 transition count 174
Iterating global reduction 4 with 3 rules applied. Total rules applied 55 place count 105 transition count 174
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 58 place count 102 transition count 171
Iterating global reduction 4 with 3 rules applied. Total rules applied 61 place count 102 transition count 171
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 63 place count 100 transition count 169
Iterating global reduction 4 with 2 rules applied. Total rules applied 65 place count 100 transition count 169
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 67 place count 98 transition count 167
Iterating global reduction 4 with 2 rules applied. Total rules applied 69 place count 98 transition count 167
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 70 place count 97 transition count 166
Iterating global reduction 4 with 1 rules applied. Total rules applied 71 place count 97 transition count 166
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 4 with 12 rules applied. Total rules applied 83 place count 91 transition count 160
Applied a total of 83 rules in 13 ms. Remains 91 /132 variables (removed 41) and now considering 160/202 (removed 42) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 91/132 places, 160/202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 16 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:34:25] [INFO ] Input system was already deterministic with 160 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Discarding 23 places :
Symmetric choice reduction at 0 with 23 rule applications. Total rules 23 place count 109 transition count 179
Iterating global reduction 0 with 23 rules applied. Total rules applied 46 place count 109 transition count 179
Discarding 19 places :
Symmetric choice reduction at 0 with 19 rule applications. Total rules 65 place count 90 transition count 160
Iterating global reduction 0 with 19 rules applied. Total rules applied 84 place count 90 transition count 160
Applied a total of 84 rules in 4 ms. Remains 90 /132 variables (removed 42) and now considering 160/202 (removed 42) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 90/132 places, 160/202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 4 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 4 ms
[2023-03-09 09:34:25] [INFO ] Input system was already deterministic with 160 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 0 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 132/132 places, 202/202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 6 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:34:25] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 129 transition count 199
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 129 transition count 199
Applied a total of 6 rules in 2 ms. Remains 129 /132 variables (removed 3) and now considering 199/202 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 129/132 places, 199/202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:34:25] [INFO ] Input system was already deterministic with 199 transitions.
Starting structural reductions in LTL mode, iteration 0 : 132/132 places, 202/202 transitions.
Applied a total of 0 rules in 1 ms. Remains 132 /132 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 132/132 places, 202/202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-09 09:34:25] [INFO ] Input system was already deterministic with 202 transitions.
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 16 ms
[2023-03-09 09:34:25] [INFO ] Flatten gal took : 16 ms
[2023-03-09 09:34:25] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 14 ms.
[2023-03-09 09:34:25] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 132 places, 202 transitions and 404 arcs took 0 ms.
Total runtime 5545 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT BART-COL-002
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/379
CTLFireability

FORMULA BART-COL-002-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678354467378

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/379/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/379/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/379/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 1 (type EXCL) for 0 BART-COL-002-CTLFireability-00
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 1 (type EXCL) for BART-COL-002-CTLFireability-00
lola: result : true
lola: markings : 8632
lola: fired transitions : 33981
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 BART-COL-002-CTLFireability-15
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 43 (type EXCL) for BART-COL-002-CTLFireability-15
lola: result : true
lola: markings : 179
lola: fired transitions : 225
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 BART-COL-002-CTLFireability-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for BART-COL-002-CTLFireability-14
lola: result : true
lola: markings : 28
lola: fired transitions : 28
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 BART-COL-002-CTLFireability-13
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for BART-COL-002-CTLFireability-13
lola: result : false
lola: markings : 15
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 BART-COL-002-CTLFireability-12
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 34 (type EXCL) for BART-COL-002-CTLFireability-12
lola: result : false
lola: markings : 6813
lola: fired transitions : 14003
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 BART-COL-002-CTLFireability-10
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for BART-COL-002-CTLFireability-10
lola: result : true
lola: markings : 33
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 BART-COL-002-CTLFireability-09
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for BART-COL-002-CTLFireability-09
lola: result : false
lola: markings : 8778
lola: fired transitions : 44121
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 BART-COL-002-CTLFireability-08
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for BART-COL-002-CTLFireability-08
lola: result : false
lola: markings : 437
lola: fired transitions : 557
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 BART-COL-002-CTLFireability-07
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for BART-COL-002-CTLFireability-07
lola: result : false
lola: markings : 6016
lola: fired transitions : 28130
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 BART-COL-002-CTLFireability-04
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for BART-COL-002-CTLFireability-04
lola: result : false
lola: markings : 32
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 BART-COL-002-CTLFireability-03
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for BART-COL-002-CTLFireability-03
lola: result : false
lola: markings : 3171
lola: fired transitions : 6810
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 BART-COL-002-CTLFireability-02
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for BART-COL-002-CTLFireability-02
lola: result : true
lola: markings : 8778
lola: fired transitions : 65435
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 BART-COL-002-CTLFireability-01
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for BART-COL-002-CTLFireability-01
lola: result : false
lola: markings : 468
lola: fired transitions : 531
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 BART-COL-002-CTLFireability-05
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for BART-COL-002-CTLFireability-05
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 30 BART-COL-002-CTLFireability-11
lola: time limit : 3598 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for BART-COL-002-CTLFireability-11
lola: result : false
lola: markings : 14
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-COL-002-CTLFireability-00: CTL true CTL model checker
BART-COL-002-CTLFireability-01: CTL false CTL model checker
BART-COL-002-CTLFireability-02: CTL true CTL model checker
BART-COL-002-CTLFireability-03: CTL false CTL model checker
BART-COL-002-CTLFireability-04: CTL false CTL model checker
BART-COL-002-CTLFireability-05: EG true state space / EG
BART-COL-002-CTLFireability-07: CTL false CTL model checker
BART-COL-002-CTLFireability-08: CTL false CTL model checker
BART-COL-002-CTLFireability-09: CTL false CTL model checker
BART-COL-002-CTLFireability-10: CTL true CTL model checker
BART-COL-002-CTLFireability-11: SP ACTL false LTL model checker
BART-COL-002-CTLFireability-12: CTL false CTL model checker
BART-COL-002-CTLFireability-13: CTL false CTL model checker
BART-COL-002-CTLFireability-14: CTL true CTL model checker
BART-COL-002-CTLFireability-15: CTL true CTL model checker


Time elapsed: 2 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-COL-002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is BART-COL-002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595900690"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-COL-002.tgz
mv BART-COL-002 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;