Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595900673.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is AutonomousCar-PT-10a, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595900673
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.9M
-rw-r--r-- 1 mcc users 7.7K Feb 25 12:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 25 12:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Feb 25 12:56 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 12:56 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 15:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 15:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 12:59 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 61K Feb 25 12:59 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 12:58 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 114K Feb 25 12:58 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:34 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:34 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1.5M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-00
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-01
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-02
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-03
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-04
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-05
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-06
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-07
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-08
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-09
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-10
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-11
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-12
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-13
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-14
FORMULA_NAME AutonomousCar-PT-10a-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678353687258

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AutonomousCar-PT-10a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 09:21:29] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 09:21:30] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 09:21:30] [INFO ] Load time of PNML (sax parser for PT used): 205 ms
[2023-03-09 09:21:30] [INFO ] Transformed 97 places.
[2023-03-09 09:21:30] [INFO ] Transformed 1921 transitions.
[2023-03-09 09:21:30] [INFO ] Found NUPN structural information;
[2023-03-09 09:21:30] [INFO ] Parsed PT model containing 97 places and 1921 transitions and 29152 arcs in 337 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 18 ms.
Ensure Unique test removed 423 transitions
Reduce redundant transitions removed 423 transitions.
Initial state reduction rules removed 1 formulas.
FORMULA AutonomousCar-PT-10a-CTLCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AutonomousCar-PT-10a-CTLCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 72 out of 97 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 97/97 places, 1498/1498 transitions.
Applied a total of 0 rules in 36 ms. Remains 97 /97 variables (removed 0) and now considering 1498/1498 (removed 0) transitions.
[2023-03-09 09:21:30] [INFO ] Flow matrix only has 1497 transitions (discarded 1 similar events)
// Phase 1: matrix 1497 rows 97 cols
[2023-03-09 09:21:30] [INFO ] Computed 15 place invariants in 24 ms
[2023-03-09 09:21:31] [INFO ] Implicit Places using invariants in 1237 ms returned [1]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 1293 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 96/97 places, 1498/1498 transitions.
Applied a total of 0 rules in 22 ms. Remains 96 /96 variables (removed 0) and now considering 1498/1498 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1353 ms. Remains : 96/97 places, 1498/1498 transitions.
Support contains 72 out of 96 places after structural reductions.
[2023-03-09 09:21:32] [INFO ] Flatten gal took : 444 ms
[2023-03-09 09:21:32] [INFO ] Flatten gal took : 352 ms
[2023-03-09 09:21:33] [INFO ] Input system was already deterministic with 1498 transitions.
Support contains 71 out of 96 places (down from 72) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 461 resets, run finished after 678 ms. (steps per millisecond=14 ) properties (out of 63) seen :46
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 17) seen :0
Running SMT prover for 17 properties.
[2023-03-09 09:21:34] [INFO ] Flow matrix only has 1497 transitions (discarded 1 similar events)
// Phase 1: matrix 1497 rows 96 cols
[2023-03-09 09:21:34] [INFO ] Computed 14 place invariants in 12 ms
[2023-03-09 09:21:34] [INFO ] [Real]Absence check using 14 positive place invariants in 2 ms returned sat
[2023-03-09 09:21:35] [INFO ] After 1388ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:17
[2023-03-09 09:21:35] [INFO ] [Nat]Absence check using 14 positive place invariants in 3 ms returned sat
[2023-03-09 09:21:37] [INFO ] After 1453ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :17
[2023-03-09 09:21:37] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-09 09:21:38] [INFO ] After 1236ms SMT Verify possible using 1 Read/Feed constraints in natural domain returned unsat :0 sat :17
[2023-03-09 09:21:40] [INFO ] Deduced a trap composed of 7 places in 681 ms of which 43 ms to minimize.
[2023-03-09 09:21:40] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 770 ms
[2023-03-09 09:21:41] [INFO ] After 4231ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :16
Attempting to minimize the solution found.
Minimization took 1161 ms.
[2023-03-09 09:21:42] [INFO ] After 7030ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :16
Fused 17 Parikh solutions to 16 different solutions.
Parikh walk visited 0 properties in 2539 ms.
Support contains 26 out of 96 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Drop transitions removed 7 transitions
Trivial Post-agglo rules discarded 7 transitions
Performed 7 trivial Post agglomeration. Transition count delta: 7
Iterating post reduction 0 with 9 rules applied. Total rules applied 9 place count 96 transition count 1489
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 16 place count 89 transition count 1489
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 16 place count 89 transition count 1488
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 18 place count 88 transition count 1488
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 24 place count 82 transition count 1422
Iterating global reduction 2 with 6 rules applied. Total rules applied 30 place count 82 transition count 1422
Free-agglomeration rule applied 9 times.
Iterating global reduction 2 with 9 rules applied. Total rules applied 39 place count 82 transition count 1413
Reduce places removed 9 places and 0 transitions.
Ensure Unique test removed 70 transitions
Reduce isomorphic transitions removed 70 transitions.
Iterating post reduction 2 with 79 rules applied. Total rules applied 118 place count 73 transition count 1343
Applied a total of 118 rules in 349 ms. Remains 73 /96 variables (removed 23) and now considering 1343/1498 (removed 155) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 350 ms. Remains : 73/96 places, 1343/1498 transitions.
Finished random walk after 6691 steps, including 129 resets, run visited all 16 properties in 121 ms. (steps per millisecond=55 )
Successfully simplified 1 atomic propositions for a total of 14 simplifications.
[2023-03-09 09:21:46] [INFO ] Flatten gal took : 225 ms
[2023-03-09 09:21:46] [INFO ] Flatten gal took : 263 ms
[2023-03-09 09:21:46] [INFO ] Input system was already deterministic with 1498 transitions.
Computed a total of 2 stabilizing places and 2 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 90 transition count 1442
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 90 transition count 1442
Applied a total of 12 rules in 15 ms. Remains 90 /96 variables (removed 6) and now considering 1442/1498 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 90/96 places, 1442/1498 transitions.
[2023-03-09 09:21:47] [INFO ] Flatten gal took : 148 ms
[2023-03-09 09:21:47] [INFO ] Flatten gal took : 146 ms
[2023-03-09 09:21:47] [INFO ] Input system was already deterministic with 1442 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 11 transitions
Trivial Post-agglo rules discarded 11 transitions
Performed 11 trivial Post agglomeration. Transition count delta: 11
Iterating post reduction 0 with 11 rules applied. Total rules applied 11 place count 95 transition count 1486
Reduce places removed 11 places and 0 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 22 place count 84 transition count 1486
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 33 place count 73 transition count 1375
Iterating global reduction 2 with 11 rules applied. Total rules applied 44 place count 73 transition count 1375
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 48 place count 71 transition count 1373
Applied a total of 48 rules in 225 ms. Remains 71 /96 variables (removed 25) and now considering 1373/1498 (removed 125) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 226 ms. Remains : 71/96 places, 1373/1498 transitions.
[2023-03-09 09:21:47] [INFO ] Flatten gal took : 180 ms
[2023-03-09 09:21:48] [INFO ] Flatten gal took : 201 ms
[2023-03-09 09:21:48] [INFO ] Input system was already deterministic with 1373 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 86 transition count 1398
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 86 transition count 1398
Applied a total of 20 rules in 18 ms. Remains 86 /96 variables (removed 10) and now considering 1398/1498 (removed 100) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 86/96 places, 1398/1498 transitions.
[2023-03-09 09:21:48] [INFO ] Flatten gal took : 134 ms
[2023-03-09 09:21:48] [INFO ] Flatten gal took : 143 ms
[2023-03-09 09:21:49] [INFO ] Input system was already deterministic with 1398 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Drop transitions removed 7 transitions
Trivial Post-agglo rules discarded 7 transitions
Performed 7 trivial Post agglomeration. Transition count delta: 7
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 96 transition count 1491
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 14 place count 89 transition count 1491
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 20 place count 83 transition count 1425
Iterating global reduction 2 with 6 rules applied. Total rules applied 26 place count 83 transition count 1425
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 28 place count 82 transition count 1424
Applied a total of 28 rules in 158 ms. Remains 82 /96 variables (removed 14) and now considering 1424/1498 (removed 74) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 159 ms. Remains : 82/96 places, 1424/1498 transitions.
[2023-03-09 09:21:49] [INFO ] Flatten gal took : 192 ms
[2023-03-09 09:21:49] [INFO ] Flatten gal took : 201 ms
[2023-03-09 09:21:50] [INFO ] Input system was already deterministic with 1424 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 11 transitions
Trivial Post-agglo rules discarded 11 transitions
Performed 11 trivial Post agglomeration. Transition count delta: 11
Iterating post reduction 0 with 11 rules applied. Total rules applied 11 place count 95 transition count 1486
Reduce places removed 11 places and 0 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 22 place count 84 transition count 1486
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 33 place count 73 transition count 1375
Iterating global reduction 2 with 11 rules applied. Total rules applied 44 place count 73 transition count 1375
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 48 place count 71 transition count 1373
Applied a total of 48 rules in 174 ms. Remains 71 /96 variables (removed 25) and now considering 1373/1498 (removed 125) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 175 ms. Remains : 71/96 places, 1373/1498 transitions.
[2023-03-09 09:21:50] [INFO ] Flatten gal took : 178 ms
[2023-03-09 09:21:50] [INFO ] Flatten gal took : 180 ms
[2023-03-09 09:21:51] [INFO ] Input system was already deterministic with 1373 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 0 with 9 rules applied. Total rules applied 9 place count 96 transition count 1489
Reduce places removed 9 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 11 rules applied. Total rules applied 20 place count 87 transition count 1487
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 22 place count 85 transition count 1487
Discarding 10 places :
Symmetric choice reduction at 3 with 10 rule applications. Total rules 32 place count 75 transition count 1387
Iterating global reduction 3 with 10 rules applied. Total rules applied 42 place count 75 transition count 1387
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 44 place count 74 transition count 1386
Applied a total of 44 rules in 118 ms. Remains 74 /96 variables (removed 22) and now considering 1386/1498 (removed 112) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 118 ms. Remains : 74/96 places, 1386/1498 transitions.
[2023-03-09 09:21:51] [INFO ] Flatten gal took : 167 ms
[2023-03-09 09:21:51] [INFO ] Flatten gal took : 149 ms
[2023-03-09 09:21:52] [INFO ] Input system was already deterministic with 1386 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 95 transition count 1491
Reduce places removed 6 places and 0 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 1 with 9 rules applied. Total rules applied 15 place count 89 transition count 1488
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 18 place count 86 transition count 1488
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 24 place count 80 transition count 1432
Iterating global reduction 3 with 6 rules applied. Total rules applied 30 place count 80 transition count 1432
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 34 place count 78 transition count 1430
Applied a total of 34 rules in 173 ms. Remains 78 /96 variables (removed 18) and now considering 1430/1498 (removed 68) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 186 ms. Remains : 78/96 places, 1430/1498 transitions.
[2023-03-09 09:21:52] [INFO ] Flatten gal took : 188 ms
[2023-03-09 09:21:52] [INFO ] Flatten gal took : 187 ms
[2023-03-09 09:21:53] [INFO ] Input system was already deterministic with 1430 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 87 transition count 1409
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 87 transition count 1409
Applied a total of 18 rules in 13 ms. Remains 87 /96 variables (removed 9) and now considering 1409/1498 (removed 89) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 87/96 places, 1409/1498 transitions.
[2023-03-09 09:21:53] [INFO ] Flatten gal took : 146 ms
[2023-03-09 09:21:53] [INFO ] Flatten gal took : 154 ms
[2023-03-09 09:21:53] [INFO ] Input system was already deterministic with 1409 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 85 transition count 1387
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 85 transition count 1387
Applied a total of 22 rules in 12 ms. Remains 85 /96 variables (removed 11) and now considering 1387/1498 (removed 111) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 85/96 places, 1387/1498 transitions.
[2023-03-09 09:21:53] [INFO ] Flatten gal took : 131 ms
[2023-03-09 09:21:54] [INFO ] Flatten gal took : 137 ms
[2023-03-09 09:21:54] [INFO ] Input system was already deterministic with 1387 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded 8 transitions
Performed 8 trivial Post agglomeration. Transition count delta: 8
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 96 transition count 1490
Reduce places removed 8 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 10 rules applied. Total rules applied 18 place count 88 transition count 1488
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 20 place count 86 transition count 1488
Discarding 9 places :
Symmetric choice reduction at 3 with 9 rule applications. Total rules 29 place count 77 transition count 1399
Iterating global reduction 3 with 9 rules applied. Total rules applied 38 place count 77 transition count 1399
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 40 place count 76 transition count 1398
Applied a total of 40 rules in 109 ms. Remains 76 /96 variables (removed 20) and now considering 1398/1498 (removed 100) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 109 ms. Remains : 76/96 places, 1398/1498 transitions.
[2023-03-09 09:21:54] [INFO ] Flatten gal took : 139 ms
[2023-03-09 09:21:54] [INFO ] Flatten gal took : 140 ms
[2023-03-09 09:21:55] [INFO ] Input system was already deterministic with 1398 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 96 transition count 1493
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 91 transition count 1493
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 10 place count 91 transition count 1492
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 12 place count 90 transition count 1492
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 20 place count 82 transition count 1414
Iterating global reduction 2 with 8 rules applied. Total rules applied 28 place count 82 transition count 1414
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 30 place count 81 transition count 1413
Applied a total of 30 rules in 156 ms. Remains 81 /96 variables (removed 15) and now considering 1413/1498 (removed 85) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 156 ms. Remains : 81/96 places, 1413/1498 transitions.
[2023-03-09 09:21:55] [INFO ] Flatten gal took : 134 ms
[2023-03-09 09:21:55] [INFO ] Flatten gal took : 139 ms
[2023-03-09 09:21:55] [INFO ] Input system was already deterministic with 1413 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Drop transitions removed 10 transitions
Trivial Post-agglo rules discarded 10 transitions
Performed 10 trivial Post agglomeration. Transition count delta: 10
Iterating post reduction 0 with 10 rules applied. Total rules applied 10 place count 96 transition count 1488
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 20 place count 86 transition count 1488
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 27 place count 79 transition count 1421
Iterating global reduction 2 with 7 rules applied. Total rules applied 34 place count 79 transition count 1421
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 38 place count 77 transition count 1419
Applied a total of 38 rules in 147 ms. Remains 77 /96 variables (removed 19) and now considering 1419/1498 (removed 79) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 159 ms. Remains : 77/96 places, 1419/1498 transitions.
[2023-03-09 09:21:56] [INFO ] Flatten gal took : 232 ms
[2023-03-09 09:21:56] [INFO ] Flatten gal took : 191 ms
[2023-03-09 09:21:56] [INFO ] Input system was already deterministic with 1419 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 10 transitions
Trivial Post-agglo rules discarded 10 transitions
Performed 10 trivial Post agglomeration. Transition count delta: 10
Iterating post reduction 0 with 10 rules applied. Total rules applied 10 place count 95 transition count 1487
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 20 place count 85 transition count 1487
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 30 place count 75 transition count 1377
Iterating global reduction 2 with 10 rules applied. Total rules applied 40 place count 75 transition count 1377
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 44 place count 73 transition count 1375
Applied a total of 44 rules in 112 ms. Remains 73 /96 variables (removed 23) and now considering 1375/1498 (removed 123) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 112 ms. Remains : 73/96 places, 1375/1498 transitions.
[2023-03-09 09:21:57] [INFO ] Flatten gal took : 174 ms
[2023-03-09 09:21:57] [INFO ] Flatten gal took : 183 ms
[2023-03-09 09:21:57] [INFO ] Input system was already deterministic with 1375 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 1498/1498 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 88 transition count 1410
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 88 transition count 1410
Applied a total of 16 rules in 24 ms. Remains 88 /96 variables (removed 8) and now considering 1410/1498 (removed 88) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 88/96 places, 1410/1498 transitions.
[2023-03-09 09:21:58] [INFO ] Flatten gal took : 186 ms
[2023-03-09 09:21:58] [INFO ] Flatten gal took : 183 ms
[2023-03-09 09:21:58] [INFO ] Input system was already deterministic with 1410 transitions.
[2023-03-09 09:21:58] [INFO ] Flatten gal took : 215 ms
[2023-03-09 09:21:59] [INFO ] Flatten gal took : 212 ms
[2023-03-09 09:21:59] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2023-03-09 09:21:59] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 96 places, 1498 transitions and 25101 arcs took 17 ms.
Total runtime 29290 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT AutonomousCar-PT-10a
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/379

FORMULA AutonomousCar-PT-10a-CTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-10a-CTLCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-10a-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-10a-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-10a-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-10a-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-10a-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-10a-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-10a-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-10a-CTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-10a-CTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-10a-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678353927275

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/379/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/379/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/379/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 7 (type EXCL) for 6 AutonomousCar-PT-10a-CTLCardinality-03
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 7 (type EXCL) for AutonomousCar-PT-10a-CTLCardinality-03
lola: result : true
lola: markings : 33
lola: fired transitions : 33
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 AutonomousCar-PT-10a-CTLCardinality-01
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for AutonomousCar-PT-10a-CTLCardinality-01
lola: result : true
lola: markings : 2787
lola: fired transitions : 16702
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 44 (type EXCL) for 43 AutonomousCar-PT-10a-CTLCardinality-15
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 44 (type EXCL) for AutonomousCar-PT-10a-CTLCardinality-15
lola: result : true
lola: markings : 238
lola: fired transitions : 528
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 AutonomousCar-PT-10a-CTLCardinality-10
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 29 (type EXCL) for AutonomousCar-PT-10a-CTLCardinality-10
lola: result : true
lola: markings : 45838
lola: fired transitions : 437495
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 AutonomousCar-PT-10a-CTLCardinality-09
lola: time limit : 327 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AutonomousCar-PT-10a-CTLCardinality-01: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-03: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-10: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-15: CTL true CTL model checker

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AutonomousCar-PT-10a-CTLCardinality-05: AGAF 0 1 0 0 1 0 0 0
AutonomousCar-PT-10a-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
AutonomousCar-PT-10a-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
AutonomousCar-PT-10a-CTLCardinality-09: CTL 0 0 1 0 1 0 0 0
AutonomousCar-PT-10a-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
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AutonomousCar-PT-10a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
AutonomousCar-PT-10a-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 3/327 1/32 AutonomousCar-PT-10a-CTLCardinality-09 134680 m, 26936 m/sec, 1336050 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 8/327 2/32 AutonomousCar-PT-10a-CTLCardinality-09 346982 m, 42460 m/sec, 3350504 t fired, .

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AutonomousCar-PT-10a-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
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26 CTL EXCL 13/327 3/32 AutonomousCar-PT-10a-CTLCardinality-09 579573 m, 46518 m/sec, 5436661 t fired, .

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35 CTL EXCL 65/873 31/32 AutonomousCar-PT-10a-CTLCardinality-12 7435514 m, 114813 m/sec, 56199387 t fired, .

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AutonomousCar-PT-10a-CTLCardinality-00: CTL true CTL model checker
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AutonomousCar-PT-10a-CTLCardinality-03: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-05: AGAF false state space /EFEG
AutonomousCar-PT-10a-CTLCardinality-06: DISJ true tscc_search
AutonomousCar-PT-10a-CTLCardinality-09: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-10: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-13: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-14: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-15: CTL true CTL model checker

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AutonomousCar-PT-10a-CTLCardinality-00: CTL true CTL model checker
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AutonomousCar-PT-10a-CTLCardinality-03: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-05: AGAF false state space /EFEG
AutonomousCar-PT-10a-CTLCardinality-06: DISJ true tscc_search
AutonomousCar-PT-10a-CTLCardinality-07: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-09: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-10: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-13: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-14: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-15: CTL true CTL model checker

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AutonomousCar-PT-10a-CTLCardinality-00: CTL true CTL model checker
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AutonomousCar-PT-10a-CTLCardinality-03: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-05: AGAF false state space /EFEG
AutonomousCar-PT-10a-CTLCardinality-06: DISJ true tscc_search
AutonomousCar-PT-10a-CTLCardinality-07: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-09: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-10: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-13: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-14: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-15: CTL true CTL model checker

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AutonomousCar-PT-10a-CTLCardinality-00: CTL true CTL model checker
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AutonomousCar-PT-10a-CTLCardinality-03: CTL true CTL model checker
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AutonomousCar-PT-10a-CTLCardinality-06: DISJ true tscc_search
AutonomousCar-PT-10a-CTLCardinality-07: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-09: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-10: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-13: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-14: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-15: CTL true CTL model checker

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32 CTL EXCL 15/1711 18/32 AutonomousCar-PT-10a-CTLCardinality-11 4206760 m, 274060 m/sec, 9522542 t fired, .

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AutonomousCar-PT-10a-CTLCardinality-00: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-01: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-03: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-05: AGAF false state space /EFEG
AutonomousCar-PT-10a-CTLCardinality-06: DISJ true tscc_search
AutonomousCar-PT-10a-CTLCardinality-07: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-09: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-10: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-13: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-14: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-15: CTL true CTL model checker

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AutonomousCar-PT-10a-CTLCardinality-00: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-01: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-03: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-05: AGAF false state space /EFEG
AutonomousCar-PT-10a-CTLCardinality-06: DISJ true tscc_search
AutonomousCar-PT-10a-CTLCardinality-07: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-09: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-10: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-13: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-14: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-15: CTL true CTL model checker

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AutonomousCar-PT-10a-CTLCardinality-06: DISJ true tscc_search
AutonomousCar-PT-10a-CTLCardinality-07: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-09: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-10: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-13: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-14: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-15: CTL true CTL model checker

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AutonomousCar-PT-10a-CTLCardinality-00: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-01: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-03: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-04: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-05: AGAF false state space /EFEG
AutonomousCar-PT-10a-CTLCardinality-06: DISJ true tscc_search
AutonomousCar-PT-10a-CTLCardinality-07: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-09: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-10: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-11: CTL unknown AGGR
AutonomousCar-PT-10a-CTLCardinality-12: CTL unknown AGGR
AutonomousCar-PT-10a-CTLCardinality-13: CTL false CTL model checker
AutonomousCar-PT-10a-CTLCardinality-14: CTL true CTL model checker
AutonomousCar-PT-10a-CTLCardinality-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutonomousCar-PT-10a"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is AutonomousCar-PT-10a, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595900673"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AutonomousCar-PT-10a.tgz
mv AutonomousCar-PT-10a execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;