Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595400402.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is AutoFlight-PT-03a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595400402
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 452K
-rw-r--r-- 1 mcc users 5.8K Feb 25 18:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K Feb 25 18:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K Feb 25 18:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 18:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 15:32 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:32 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.4K Feb 25 18:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 73K Feb 25 18:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 18:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 101K Feb 25 18:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:32 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:32 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 23K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-00
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-01
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-02
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-03
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-04
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-05
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-06
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-07
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-08
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-09
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-10
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-11
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-12
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-13
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-14
FORMULA_NAME AutoFlight-PT-03a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678348204721

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AutoFlight-PT-03a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 07:50:07] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-09 07:50:07] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 07:50:07] [INFO ] Load time of PNML (sax parser for PT used): 37 ms
[2023-03-09 07:50:07] [INFO ] Transformed 82 places.
[2023-03-09 07:50:07] [INFO ] Transformed 80 transitions.
[2023-03-09 07:50:07] [INFO ] Found NUPN structural information;
[2023-03-09 07:50:07] [INFO ] Parsed PT model containing 82 places and 80 transitions and 260 arcs in 147 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
Ensure Unique test removed 15 transitions
Reduce redundant transitions removed 15 transitions.
Support contains 68 out of 82 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 82/82 places, 65/65 transitions.
Applied a total of 0 rules in 11 ms. Remains 82 /82 variables (removed 0) and now considering 65/65 (removed 0) transitions.
// Phase 1: matrix 65 rows 82 cols
[2023-03-09 07:50:07] [INFO ] Computed 22 place invariants in 10 ms
[2023-03-09 07:50:08] [INFO ] Implicit Places using invariants in 815 ms returned []
[2023-03-09 07:50:08] [INFO ] Invariant cache hit.
[2023-03-09 07:50:08] [INFO ] State equation strengthened by 15 read => feed constraints.
[2023-03-09 07:50:08] [INFO ] Implicit Places using invariants and state equation in 168 ms returned [27, 67]
Discarding 2 places :
Implicit Place search using SMT with State Equation took 1014 ms to find 2 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 80/82 places, 65/65 transitions.
Applied a total of 0 rules in 2 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1028 ms. Remains : 80/82 places, 65/65 transitions.
Support contains 68 out of 80 places after structural reductions.
[2023-03-09 07:50:08] [INFO ] Flatten gal took : 25 ms
[2023-03-09 07:50:08] [INFO ] Flatten gal took : 18 ms
[2023-03-09 07:50:08] [INFO ] Input system was already deterministic with 65 transitions.
Incomplete random walk after 10000 steps, including 367 resets, run finished after 433 ms. (steps per millisecond=23 ) properties (out of 74) seen :55
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 10 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 19) seen :1
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 18) seen :1
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1000 steps, including 8 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Running SMT prover for 17 properties.
// Phase 1: matrix 65 rows 80 cols
[2023-03-09 07:50:09] [INFO ] Computed 20 place invariants in 2 ms
[2023-03-09 07:50:09] [INFO ] [Real]Absence check using 20 positive place invariants in 4 ms returned sat
[2023-03-09 07:50:09] [INFO ] After 61ms SMT Verify possible using state equation in real domain returned unsat :8 sat :1 real:8
[2023-03-09 07:50:09] [INFO ] State equation strengthened by 14 read => feed constraints.
[2023-03-09 07:50:09] [INFO ] After 5ms SMT Verify possible using 14 Read/Feed constraints in real domain returned unsat :8 sat :0 real:9
[2023-03-09 07:50:09] [INFO ] After 173ms SMT Verify possible using all constraints in real domain returned unsat :8 sat :0 real:9
[2023-03-09 07:50:09] [INFO ] [Nat]Absence check using 20 positive place invariants in 4 ms returned sat
[2023-03-09 07:50:09] [INFO ] After 55ms SMT Verify possible using state equation in natural domain returned unsat :8 sat :9
[2023-03-09 07:50:09] [INFO ] After 38ms SMT Verify possible using 14 Read/Feed constraints in natural domain returned unsat :8 sat :9
[2023-03-09 07:50:09] [INFO ] Deduced a trap composed of 36 places in 36 ms of which 4 ms to minimize.
[2023-03-09 07:50:09] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 46 ms
[2023-03-09 07:50:09] [INFO ] Deduced a trap composed of 34 places in 26 ms of which 1 ms to minimize.
[2023-03-09 07:50:09] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 1 trap constraints in 30 ms
[2023-03-09 07:50:09] [INFO ] After 181ms SMT Verify possible using trap constraints in natural domain returned unsat :9 sat :8
Attempting to minimize the solution found.
Minimization took 39 ms.
[2023-03-09 07:50:09] [INFO ] After 361ms SMT Verify possible using all constraints in natural domain returned unsat :9 sat :8
Fused 17 Parikh solutions to 8 different solutions.
Parikh walk visited 7 properties in 9 ms.
Support contains 2 out of 80 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 80/80 places, 65/65 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 80 transition count 59
Reduce places removed 6 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 7 rules applied. Total rules applied 13 place count 74 transition count 58
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 14 place count 73 transition count 58
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 5 Pre rules applied. Total rules applied 14 place count 73 transition count 53
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 24 place count 68 transition count 53
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 1 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 34 place count 63 transition count 48
Free-agglomeration rule applied 6 times.
Iterating global reduction 3 with 6 rules applied. Total rules applied 40 place count 63 transition count 42
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 3 with 6 rules applied. Total rules applied 46 place count 57 transition count 42
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 4 with 1 rules applied. Total rules applied 47 place count 56 transition count 41
Reduce places removed 13 places and 0 transitions.
Drop transitions removed 19 transitions
Trivial Post-agglo rules discarded 19 transitions
Performed 19 trivial Post agglomeration. Transition count delta: 19
Iterating post reduction 4 with 32 rules applied. Total rules applied 79 place count 43 transition count 22
Reduce places removed 19 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 5 with 20 rules applied. Total rules applied 99 place count 24 transition count 21
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 100 place count 23 transition count 21
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 7 with 6 Pre rules applied. Total rules applied 100 place count 23 transition count 15
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 7 with 12 rules applied. Total rules applied 112 place count 17 transition count 15
Applied a total of 112 rules in 25 ms. Remains 17 /80 variables (removed 63) and now considering 15/65 (removed 50) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 25 ms. Remains : 17/80 places, 15/65 transitions.
Finished random walk after 55 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=55 )
Successfully simplified 9 atomic propositions for a total of 16 simplifications.
FORMULA AutoFlight-PT-03a-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 07:50:09] [INFO ] Flatten gal took : 7 ms
[2023-03-09 07:50:09] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA AutoFlight-PT-03a-CTLFireability-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 6 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Support contains 55 out of 80 places (down from 57) after GAL structural reductions.
Computed a total of 6 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 2 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 4 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 80 transition count 59
Reduce places removed 6 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 7 rules applied. Total rules applied 13 place count 74 transition count 58
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 14 place count 73 transition count 58
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 5 Pre rules applied. Total rules applied 14 place count 73 transition count 53
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 24 place count 68 transition count 53
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 32 place count 64 transition count 49
Applied a total of 32 rules in 8 ms. Remains 64 /80 variables (removed 16) and now considering 49/65 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 64/80 places, 49/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 49 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 2 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 2 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 4 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 2 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 4 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 2 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 4 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 5 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 5 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 4 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 65/65 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 65/65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Input system was already deterministic with 65 transitions.
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:50:10] [INFO ] Flatten gal took : 4 ms
[2023-03-09 07:50:10] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-09 07:50:10] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 80 places, 65 transitions and 224 arcs took 0 ms.
Total runtime 3123 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT AutoFlight-PT-03a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/369
CTLFireability

FORMULA AutoFlight-PT-03a-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutoFlight-PT-03a-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678348213608

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/369/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/369/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/369/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 18 (type EXCL) for 15 AutoFlight-PT-03a-CTLFireability-06
lola: time limit : 109 sec
lola: memory limit: 32 pages
lola: FINISHED task # 18 (type EXCL) for AutoFlight-PT-03a-CTLFireability-06
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 10 (type EXCL) for 9 AutoFlight-PT-03a-CTLFireability-04
lola: time limit : 112 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 72 (type FNDP) for 22 AutoFlight-PT-03a-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type EQUN) for 22 AutoFlight-PT-03a-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 75 (type SRCH) for 22 AutoFlight-PT-03a-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 75 (type SRCH) for AutoFlight-PT-03a-CTLFireability-07
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 72 (type FNDP) for AutoFlight-PT-03a-CTLFireability-07
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 73 (type EQUN) for AutoFlight-PT-03a-CTLFireability-07 (obsolete)
lola: FINISHED task # 73 (type EQUN) for AutoFlight-PT-03a-CTLFireability-07
lola: result : unknown
lola: FINISHED task # 10 (type EXCL) for AutoFlight-PT-03a-CTLFireability-04
lola: result : true
lola: markings : 157681
lola: fired transitions : 2113131
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 68 (type EXCL) for 63 AutoFlight-PT-03a-CTLFireability-15
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 68 (type EXCL) for AutoFlight-PT-03a-CTLFireability-15
lola: result : true
lola: markings : 955
lola: fired transitions : 1687
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 66 (type EXCL) for 63 AutoFlight-PT-03a-CTLFireability-15
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type EXCL) for AutoFlight-PT-03a-CTLFireability-15
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 61 (type EXCL) for 60 AutoFlight-PT-03a-CTLFireability-14
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 61 (type EXCL) for AutoFlight-PT-03a-CTLFireability-14
lola: result : false
lola: markings : 157050
lola: fired transitions : 1682417
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 58 (type EXCL) for 57 AutoFlight-PT-03a-CTLFireability-13
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 58 (type EXCL) for AutoFlight-PT-03a-CTLFireability-13
lola: result : true
lola: markings : 1282
lola: fired transitions : 2438
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 55 (type EXCL) for 54 AutoFlight-PT-03a-CTLFireability-12
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: FINISHED task # 55 (type EXCL) for AutoFlight-PT-03a-CTLFireability-12
lola: result : false
lola: markings : 3382
lola: fired transitions : 13684
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 51 AutoFlight-PT-03a-CTLFireability-11
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for AutoFlight-PT-03a-CTLFireability-11
lola: result : false
lola: markings : 62
lola: fired transitions : 146
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 AutoFlight-PT-03a-CTLFireability-10
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for AutoFlight-PT-03a-CTLFireability-10
lola: result : true
lola: markings : 3484
lola: fired transitions : 20352
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 AutoFlight-PT-03a-CTLFireability-08
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for AutoFlight-PT-03a-CTLFireability-08
lola: result : false
lola: markings : 15
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 22 AutoFlight-PT-03a-CTLFireability-07
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for AutoFlight-PT-03a-CTLFireability-07
lola: result : false
lola: markings : 15
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 22 AutoFlight-PT-03a-CTLFireability-07
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for AutoFlight-PT-03a-CTLFireability-07
lola: result : false
lola: markings : 97
lola: fired transitions : 110
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 AutoFlight-PT-03a-CTLFireability-05
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for AutoFlight-PT-03a-CTLFireability-05
lola: result : false
lola: markings : 36
lola: fired transitions : 73
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 AutoFlight-PT-03a-CTLFireability-03
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for AutoFlight-PT-03a-CTLFireability-03
lola: result : true
lola: markings : 113
lola: fired transitions : 184
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 AutoFlight-PT-03a-CTLFireability-00
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for AutoFlight-PT-03a-CTLFireability-00
lola: result : false
lola: markings : 387
lola: fired transitions : 515
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 70 (type EXCL) for 22 AutoFlight-PT-03a-CTLFireability-07
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 70 (type EXCL) for AutoFlight-PT-03a-CTLFireability-07
lola: result : true
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 15 AutoFlight-PT-03a-CTLFireability-06
lola: time limit : 1798 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for AutoFlight-PT-03a-CTLFireability-06
lola: result : true
lola: markings : 4481
lola: fired transitions : 31333
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 AutoFlight-PT-03a-CTLFireability-01
lola: time limit : 3597 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for AutoFlight-PT-03a-CTLFireability-01
lola: result : false
lola: markings : 198
lola: fired transitions : 270
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AutoFlight-PT-03a-CTLFireability-00: CTL false CTL model checker
AutoFlight-PT-03a-CTLFireability-01: CTL false CTL model checker
AutoFlight-PT-03a-CTLFireability-03: CTL true CTL model checker
AutoFlight-PT-03a-CTLFireability-04: CTL true CTL model checker
AutoFlight-PT-03a-CTLFireability-05: CTL false CTL model checker
AutoFlight-PT-03a-CTLFireability-06: DISJ true CTL model checker
AutoFlight-PT-03a-CTLFireability-07: CONJ false state space / EG
AutoFlight-PT-03a-CTLFireability-08: CTL false CTL model checker
AutoFlight-PT-03a-CTLFireability-10: CTL true CTL model checker
AutoFlight-PT-03a-CTLFireability-11: CTL false CTL model checker
AutoFlight-PT-03a-CTLFireability-12: CTL false CTL model checker
AutoFlight-PT-03a-CTLFireability-13: CTL true CTL model checker
AutoFlight-PT-03a-CTLFireability-14: CTL false CTL model checker
AutoFlight-PT-03a-CTLFireability-15: CONJ true CONJ


Time elapsed: 3 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-03a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is AutoFlight-PT-03a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595400402"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-03a.tgz
mv AutoFlight-PT-03a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;