Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595400354.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Angiogenesis-PT-25, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595400354
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 508K
-rw-r--r-- 1 mcc users 7.8K Feb 26 14:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Feb 26 14:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 14:49 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 26 14:49 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 15:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Feb 26 14:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 148K Feb 26 14:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Feb 26 14:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 14:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 33K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-00
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-01
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-02
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-03
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-04
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-05
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-06
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-07
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-08
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-09
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-10
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-11
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-12
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-13
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-14
FORMULA_NAME Angiogenesis-PT-25-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678347636825

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Angiogenesis-PT-25
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 07:40:39] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-09 07:40:39] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 07:40:39] [INFO ] Load time of PNML (sax parser for PT used): 37 ms
[2023-03-09 07:40:39] [INFO ] Transformed 39 places.
[2023-03-09 07:40:39] [INFO ] Transformed 64 transitions.
[2023-03-09 07:40:39] [INFO ] Parsed PT model containing 39 places and 64 transitions and 185 arcs in 98 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Support contains 37 out of 39 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 64/64 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 38 transition count 64
Applied a total of 1 rules in 10 ms. Remains 38 /39 variables (removed 1) and now considering 64/64 (removed 0) transitions.
// Phase 1: matrix 64 rows 38 cols
[2023-03-09 07:40:39] [INFO ] Computed 7 place invariants in 7 ms
[2023-03-09 07:40:39] [INFO ] Implicit Places using invariants in 275 ms returned []
[2023-03-09 07:40:39] [INFO ] Invariant cache hit.
[2023-03-09 07:40:39] [INFO ] Implicit Places using invariants and state equation in 130 ms returned []
Implicit Place search using SMT with State Equation took 433 ms to find 0 implicit places.
[2023-03-09 07:40:39] [INFO ] Invariant cache hit.
[2023-03-09 07:40:39] [INFO ] Dead Transitions using invariants and state equation in 113 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 38/39 places, 64/64 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 559 ms. Remains : 38/39 places, 64/64 transitions.
Support contains 37 out of 38 places after structural reductions.
[2023-03-09 07:40:39] [INFO ] Flatten gal took : 26 ms
[2023-03-09 07:40:40] [INFO ] Flatten gal took : 11 ms
[2023-03-09 07:40:40] [INFO ] Input system was already deterministic with 64 transitions.
Support contains 36 out of 38 places (down from 37) after GAL structural reductions.
Incomplete random walk after 10003 steps, including 2 resets, run finished after 154 ms. (steps per millisecond=64 ) properties (out of 59) seen :27
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 32) seen :2
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 30) seen :4
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 26) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 25) seen :4
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 21) seen :4
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 17) seen :0
Running SMT prover for 17 properties.
[2023-03-09 07:40:40] [INFO ] Invariant cache hit.
[2023-03-09 07:40:40] [INFO ] [Real]Absence check using 7 positive place invariants in 2 ms returned sat
[2023-03-09 07:40:40] [INFO ] After 72ms SMT Verify possible using state equation in real domain returned unsat :0 sat :6 real:11
[2023-03-09 07:40:40] [INFO ] After 115ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :0 real:17
[2023-03-09 07:40:40] [INFO ] After 203ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:17
[2023-03-09 07:40:40] [INFO ] [Nat]Absence check using 7 positive place invariants in 2 ms returned sat
[2023-03-09 07:40:40] [INFO ] After 77ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :17
[2023-03-09 07:40:40] [INFO ] After 147ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :17
Attempting to minimize the solution found.
Minimization took 79 ms.
[2023-03-09 07:40:40] [INFO ] After 317ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :17
Finished Parikh walk after 251 steps, including 1 resets, run visited all 1 properties in 1 ms. (steps per millisecond=251 )
Parikh walk visited 17 properties in 105 ms.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 6 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 6 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 4 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 4 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 38 transition count 64
Applied a total of 2 rules in 7 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 38/38 places, 64/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 38 transition count 63
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 36 transition count 63
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 5 place count 36 transition count 63
Applied a total of 5 rules in 6 ms. Remains 36 /38 variables (removed 2) and now considering 63/64 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 36/38 places, 63/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 0 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 38/38 places, 64/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 14 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 0 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 38/38 places, 64/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 38 transition count 63
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 36 transition count 63
Partial Post-agglomeration rule applied 7 times.
Drop transitions removed 7 transitions
Iterating global reduction 0 with 7 rules applied. Total rules applied 10 place count 36 transition count 63
Applied a total of 10 rules in 4 ms. Remains 36 /38 variables (removed 2) and now considering 63/64 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 36/38 places, 63/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 38 transition count 63
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 36 transition count 63
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 5 place count 36 transition count 63
Applied a total of 5 rules in 5 ms. Remains 36 /38 variables (removed 2) and now considering 63/64 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 36/38 places, 63/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 11 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 64/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 4 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 0 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 38/38 places, 64/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Applied a total of 0 rules in 0 ms. Remains 38 /38 variables (removed 0) and now considering 64/64 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 38/38 places, 64/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 38 transition count 63
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 36 transition count 63
Applied a total of 3 rules in 3 ms. Remains 36 /38 variables (removed 2) and now considering 63/64 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 36/38 places, 63/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 63 transitions.
Finished random walk after 4757 steps, including 1 resets, run visited all 1 properties in 5 ms. (steps per millisecond=951 )
FORMULA Angiogenesis-PT-25-CTLFireability-14 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 64/64 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 38 transition count 63
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 36 transition count 63
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 5 place count 36 transition count 63
Applied a total of 5 rules in 4 ms. Remains 36 /38 variables (removed 2) and now considering 63/64 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 36/38 places, 63/64 transitions.
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:40:41] [INFO ] Input system was already deterministic with 63 transitions.
Incomplete random walk after 10005 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=1667 ) properties (out of 1) seen :0
Finished Best-First random walk after 2215 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=738 )
FORMULA Angiogenesis-PT-25-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:40:41] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-09 07:40:41] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 38 places, 64 transitions and 184 arcs took 0 ms.
Total runtime 2386 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Angiogenesis-PT-25
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA Angiogenesis-PT-25-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-25-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-25-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-25-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-25-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-25-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678347807083

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: LAUNCH task # 23 (type EXCL) for 18 Angiogenesis-PT-25-CTLFireability-06
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for Angiogenesis-PT-25-CTLFireability-06
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 13 (type EXCL) for 12 Angiogenesis-PT-25-CTLFireability-04
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 13 (type EXCL) for Angiogenesis-PT-25-CTLFireability-04
lola: result : true
lola: markings : 2635788
lola: fired transitions : 6835969
lola: time used : 5.000000
lola: memory pages used : 12
lola: LAUNCH task # 44 (type EXCL) for 43 Angiogenesis-PT-25-CTLFireability-13
lola: time limit : 276 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-25-CTLFireability-04: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-25-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-25-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 0/276 2/32 Angiogenesis-PT-25-CTLFireability-13 353522 m, 70704 m/sec, 580480 t fired, .

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Angiogenesis-PT-25-CTLFireability-04: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-25-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-25-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 5/276 12/32 Angiogenesis-PT-25-CTLFireability-13 2602586 m, 449812 m/sec, 7239613 t fired, .

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lola: FINISHED task # 44 (type EXCL) for Angiogenesis-PT-25-CTLFireability-13
lola: result : true
lola: markings : 2609328
lola: fired transitions : 12057938
lola: time used : 9.000000
lola: memory pages used : 12
lola: LAUNCH task # 41 (type EXCL) for 40 Angiogenesis-PT-25-CTLFireability-12
lola: time limit : 298 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-25-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-25-CTLFireability-13: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-25-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-25-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 1/298 5/32 Angiogenesis-PT-25-CTLFireability-12 1044188 m, 208837 m/sec, 1662451 t fired, .

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lola: FINISHED task # 41 (type EXCL) for Angiogenesis-PT-25-CTLFireability-12
lola: result : true
lola: markings : 2607987
lola: fired transitions : 4150679
lola: time used : 3.000000
lola: memory pages used : 12
lola: LAUNCH task # 38 (type EXCL) for 37 Angiogenesis-PT-25-CTLFireability-11
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for Angiogenesis-PT-25-CTLFireability-11
lola: result : true
lola: markings : 2403791
lola: fired transitions : 3757995
lola: time used : 3.000000
lola: memory pages used : 11
lola: LAUNCH task # 35 (type EXCL) for 34 Angiogenesis-PT-25-CTLFireability-10
lola: time limit : 358 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-25-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-25-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-25-CTLFireability-12: CTL true CTL model checker
Angiogenesis-PT-25-CTLFireability-13: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-25-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-25-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-25-CTLFireability-10: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 0/358 1/32 Angiogenesis-PT-25-CTLFireability-10 30878 m, 6175 m/sec, 121495 t fired, .

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Angiogenesis-PT-25-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-25-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-25-CTLFireability-12: CTL true CTL model checker
Angiogenesis-PT-25-CTLFireability-13: CTL true CTL model checker

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32 CTL EXCL 10/1160 15/32 Angiogenesis-PT-25-CTLFireability-09 3391025 m, 341557 m/sec, 16515774 t fired, .

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32 CTL EXCL 15/1160 22/32 Angiogenesis-PT-25-CTLFireability-09 5051656 m, 332126 m/sec, 24682256 t fired, .

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32 CTL EXCL 20/1160 29/32 Angiogenesis-PT-25-CTLFireability-09 6679211 m, 325511 m/sec, 32693929 t fired, .

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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Angiogenesis-PT-25"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Angiogenesis-PT-25, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595400354"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Angiogenesis-PT-25.tgz
mv Angiogenesis-PT-25 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;