About the Execution of LoLa+red for AirplaneLD-PT-1000
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2493.439 | 186487.00 | 239217.00 | 89.30 | FFFTTTFTFTTFTFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595300294.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is AirplaneLD-PT-1000, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595300294
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 21M
-rw-r--r-- 1 mcc users 589K Feb 26 12:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 1.9M Feb 26 12:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 235K Feb 26 11:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 1.3M Feb 26 11:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 425K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 1.1M Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 103K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 450K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 1.6M Feb 26 13:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 5.3M Feb 26 13:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 554K Feb 26 12:58 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 3.0M Feb 26 12:58 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 84K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 168K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 4.3M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-00
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-01
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-02
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-03
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-04
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-05
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-06
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-07
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-08
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-09
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-10
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-11
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-12
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-13
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-14
FORMULA_NAME AirplaneLD-PT-1000-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678346227209
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-1000
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 07:17:10] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 07:17:10] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 07:17:10] [INFO ] Load time of PNML (sax parser for PT used): 482 ms
[2023-03-09 07:17:11] [INFO ] Transformed 7019 places.
[2023-03-09 07:17:11] [INFO ] Transformed 8008 transitions.
[2023-03-09 07:17:11] [INFO ] Parsed PT model containing 7019 places and 8008 transitions and 30528 arcs in 783 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 1341 ms.
Working with output stream class java.io.PrintStream
Reduce places removed 3002 places and 0 transitions.
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 1258 resets, run finished after 4710 ms. (steps per millisecond=2 ) properties (out of 13) seen :2
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 704 ms. (steps per millisecond=14 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 686 ms. (steps per millisecond=14 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 766 ms. (steps per millisecond=13 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=1111 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 119 ms. (steps per millisecond=84 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 201 ms. (steps per millisecond=49 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=1428 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=1428 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=1666 ) properties (out of 11) seen :1
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 10) seen :1
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
// Phase 1: matrix 8008 rows 4017 cols
[2023-03-09 07:17:21] [INFO ] Computed 3 place invariants in 1740 ms
[2023-03-09 07:17:27] [INFO ] After 1952ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:9
[2023-03-09 07:17:29] [INFO ] [Nat]Absence check using 2 positive place invariants in 3 ms returned sat
[2023-03-09 07:17:29] [INFO ] [Nat]Absence check using 2 positive and 1 generalized place invariants in 2 ms returned sat
[2023-03-09 07:17:35] [INFO ] After 8344ms SMT Verify possible using all constraints in natural domain returned unsat :9 sat :0
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 9 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 25402 ms.
starting LoLA
BK_INPUT AirplaneLD-PT-1000
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-1000-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678346413696
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 49 (type SKEL/FNDP) for 3 AirplaneLD-PT-1000-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 3 AirplaneLD-PT-1000-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SKEL/SRCH) for 3 AirplaneLD-PT-1000-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 3 AirplaneLD-PT-1000-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 52 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-01
lola: result : false
lola: markings : 29
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 50 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 53 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-01 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 56 (type SKEL/FNDP) for 6 AirplaneLD-PT-1000-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/EQUN) for 6 AirplaneLD-PT-1000-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/SRCH) for 6 AirplaneLD-PT-1000-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 6 AirplaneLD-PT-1000-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 60 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-02
lola: result : false
lola: markings : 105
lola: fired transitions : 104
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 56 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 57 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 59 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-02 (obsolete)
lola: FINISHED task # 56 (type SKEL/FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 529
lola: tried executions : 109
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 50 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-01
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 63 (type SKEL/FNDP) for 12 AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SKEL/EQUN) for 12 AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/SRCH) for 12 AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 67 (type SKEL/SRCH) for 12 AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 57 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 66 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 63 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 64 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 67 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-04 (obsolete)
lola: FINISHED task # 63 (type SKEL/FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-64.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 64 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 71 (type SKEL/FNDP) for 15 AirplaneLD-PT-1000-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/EQUN) for 15 AirplaneLD-PT-1000-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/SRCH) for 15 AirplaneLD-PT-1000-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SKEL/SRCH) for 15 AirplaneLD-PT-1000-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 74 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-05
lola: result : false
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 71 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 72 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 75 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-05 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-72.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 72 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-05
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 78 (type SKEL/FNDP) for 18 AirplaneLD-PT-1000-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type SKEL/EQUN) for 18 AirplaneLD-PT-1000-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 81 (type SKEL/SRCH) for 18 AirplaneLD-PT-1000-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/SRCH) for 18 AirplaneLD-PT-1000-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 81 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-06
lola: result : false
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 78 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 79 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 82 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-06 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-79.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 79 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-06
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH INITIAL
lola: LAUNCH task # 25 (type CNST) for 24 AirplaneLD-PT-1000-ReachabilityCardinality-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 AirplaneLD-PT-1000-ReachabilityCardinality-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 AirplaneLD-PT-1000-ReachabilityCardinality-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH task # 86 (type SKEL/FNDP) for 21 AirplaneLD-PT-1000-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 30 AirplaneLD-PT-1000-ReachabilityCardinality-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 10 (type CNST) for AirplaneLD-PT-1000-ReachabilityCardinality-03
lola: result : true
lola: FINISHED task # 25 (type CNST) for AirplaneLD-PT-1000-ReachabilityCardinality-08
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 94 (type SKEL/FNDP) for 27 AirplaneLD-PT-1000-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 31 (type CNST) for AirplaneLD-PT-1000-ReachabilityCardinality-10
lola: result : true
lola: LAUNCH task # 87 (type SKEL/EQUN) for 21 AirplaneLD-PT-1000-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 1 (type CNST) for AirplaneLD-PT-1000-ReachabilityCardinality-00
lola: result : false
lola: LAUNCH task # 95 (type SKEL/EQUN) for 27 AirplaneLD-PT-1000-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-95.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 87 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 86 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 97 (type SKEL/SRCH) for 27 AirplaneLD-PT-1000-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SKEL/SRCH) for 27 AirplaneLD-PT-1000-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 86 (type SKEL/FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 30348
lola: tried executions : 10150
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 98 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-09
lola: result : false
lola: markings : 120
lola: fired transitions : 127
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 95 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 94 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 97 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-09 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 94 (type SKEL/FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 10014
lola: tried executions : 3904
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 102 (type SKEL/FNDP) for 36 AirplaneLD-PT-1000-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SKEL/EQUN) for 36 AirplaneLD-PT-1000-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 105 (type SKEL/SRCH) for 36 AirplaneLD-PT-1000-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SKEL/SRCH) for 36 AirplaneLD-PT-1000-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 106 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-12
lola: result : false
lola: markings : 136
lola: fired transitions : 139
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 102 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 103 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 105 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-12 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 110 (type SKEL/FNDP) for 33 AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type SKEL/EQUN) for 33 AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SKEL/SRCH) for 33 AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type SKEL/SRCH) for 33 AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 113 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 110 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 111 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 114 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-11 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-111.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 103 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-12
lola: result : false
lola: FINISHED task # 110 (type SKEL/FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 111 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 118 (type SKEL/FNDP) for 39 AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type SKEL/EQUN) for 39 AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SKEL/SRCH) for 39 AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/SRCH) for 39 AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 121 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 118 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 119 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 122 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-13 (obsolete)
lola: FINISHED task # 122 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: result : true
lola: markings : 32
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 118 (type SKEL/FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-119.sara.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 127 (type SKEL/FNDP) for 42 AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 128 (type SKEL/EQUN) for 42 AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type SKEL/SRCH) for 42 AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SKEL/SRCH) for 42 AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 119 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-128.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 130 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 127 (type SKEL/FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 128 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 131 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-14 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 128 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: result : unknown
lola: LAUNCH task # 134 (type SKEL/FNDP) for 45 AirplaneLD-PT-1000-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type SKEL/EQUN) for 45 AirplaneLD-PT-1000-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SKEL/SRCH) for 45 AirplaneLD-PT-1000-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 138 (type SKEL/SRCH) for 45 AirplaneLD-PT-1000-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 138 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-15
lola: result : false
lola: markings : 331
lola: fired transitions : 356
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 137 (type SKEL/SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-15
lola: result : false
lola: markings : 34
lola: fired transitions : 46
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 134 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 135 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-15 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-135.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 135 (type SKEL/EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-15
lola: result : false
lola: planning for AirplaneLD-PT-1000-ReachabilityCardinality-01 stopped (result already fixed).
lola: planning for AirplaneLD-PT-1000-ReachabilityCardinality-05 stopped (result already fixed).
lola: planning for AirplaneLD-PT-1000-ReachabilityCardinality-02 stopped (result already fixed).
lola: planning for AirplaneLD-PT-1000-ReachabilityCardinality-09 stopped (result already fixed).
lola: planning for AirplaneLD-PT-1000-ReachabilityCardinality-07 stopped (result already fixed).
lola: planning for AirplaneLD-PT-1000-ReachabilityCardinality-06 stopped (result already fixed).
lola: planning for AirplaneLD-PT-1000-ReachabilityCardinality-15 stopped (result already fixed).
lola: planning for AirplaneLD-PT-1000-ReachabilityCardinality-12 stopped (result already fixed).
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-1000-ReachabilityCardinality-00: INITIAL false preprocessing
AirplaneLD-PT-1000-ReachabilityCardinality-01: EF false skeleton: tandem / insertion
AirplaneLD-PT-1000-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
AirplaneLD-PT-1000-ReachabilityCardinality-03: INITIAL true preprocessing
AirplaneLD-PT-1000-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
AirplaneLD-PT-1000-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
AirplaneLD-PT-1000-ReachabilityCardinality-07: AG true skeleton: state equation
AirplaneLD-PT-1000-ReachabilityCardinality-08: INITIAL false preprocessing
AirplaneLD-PT-1000-ReachabilityCardinality-09: AG true skeleton: state equation
AirplaneLD-PT-1000-ReachabilityCardinality-10: INITIAL true preprocessing
AirplaneLD-PT-1000-ReachabilityCardinality-12: AG true skeleton: tandem / relaxed
AirplaneLD-PT-1000-ReachabilityCardinality-15: AG true skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-1000-ReachabilityCardinality-04: EF 0 0 0 0 3 0 0 2
AirplaneLD-PT-1000-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
AirplaneLD-PT-1000-ReachabilityCardinality-13: AG 0 0 0 0 4 0 0 1
AirplaneLD-PT-1000-ReachabilityCardinality-14: AG 0 0 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 156 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 145 (type EXCL) for 42 AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: time limit : 860 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 141 (type FNDP) for 42 AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 142 (type EQUN) for 42 AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SRCH) for 42 AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 144 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 141 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 142 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 145 (type EXCL) for AirplaneLD-PT-1000-ReachabilityCardinality-14 (obsolete)
lola: FINISHED task # 142 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: result : unknown
lola: FINISHED task # 141 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 152 (type EXCL) for 33 AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: time limit : 1147 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 148 (type FNDP) for 33 AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type EQUN) for 33 AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 151 (type SRCH) for 33 AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 151 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 148 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 149 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 152 (type EXCL) for AirplaneLD-PT-1000-ReachabilityCardinality-11 (obsolete)
lola: FINISHED task # 148 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-149.sara.
lola: FINISHED task # 149 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-11
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 159 (type EXCL) for 39 AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: time limit : 1721 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 155 (type FNDP) for 39 AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type EQUN) for 39 AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 158 (type SRCH) for 39 AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 155 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 156 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 158 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 159 (type EXCL) for AirplaneLD-PT-1000-ReachabilityCardinality-13 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-156.sara.
lola: FINISHED task # 156 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-13
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 165 (type EXCL) for 12 AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: time limit : 3442 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 161 (type FNDP) for 12 AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 162 (type EQUN) for 12 AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 164 (type SRCH) for 12 AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 165 (type EXCL) for AirplaneLD-PT-1000-ReachabilityCardinality-04
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 161 (type FNDP) for AirplaneLD-PT-1000-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 162 (type EQUN) for AirplaneLD-PT-1000-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 164 (type SRCH) for AirplaneLD-PT-1000-ReachabilityCardinality-04 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-1000-ReachabilityCardinality-00: INITIAL false preprocessing
AirplaneLD-PT-1000-ReachabilityCardinality-01: EF false skeleton: tandem / insertion
AirplaneLD-PT-1000-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
AirplaneLD-PT-1000-ReachabilityCardinality-03: INITIAL true preprocessing
AirplaneLD-PT-1000-ReachabilityCardinality-04: EF true tandem / relaxed
AirplaneLD-PT-1000-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
AirplaneLD-PT-1000-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
AirplaneLD-PT-1000-ReachabilityCardinality-07: AG true skeleton: state equation
AirplaneLD-PT-1000-ReachabilityCardinality-08: INITIAL false preprocessing
AirplaneLD-PT-1000-ReachabilityCardinality-09: AG true skeleton: state equation
AirplaneLD-PT-1000-ReachabilityCardinality-10: INITIAL true preprocessing
AirplaneLD-PT-1000-ReachabilityCardinality-11: AG false tandem / insertion
AirplaneLD-PT-1000-ReachabilityCardinality-12: AG true skeleton: tandem / relaxed
AirplaneLD-PT-1000-ReachabilityCardinality-13: AG false findpath
AirplaneLD-PT-1000-ReachabilityCardinality-14: AG false tandem / insertion
AirplaneLD-PT-1000-ReachabilityCardinality-15: AG true skeleton: tandem / insertion
Time elapsed: 158 secs. Pages in use: 2
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-162.sara.
sara: place or transition ordering is non-deterministic
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-1000"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is AirplaneLD-PT-1000, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595300294"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-1000.tgz
mv AirplaneLD-PT-1000 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;