Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595200265.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is AirplaneLD-PT-0100, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595200265
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.9M
-rw-r--r-- 1 mcc users 37K Feb 26 11:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 153K Feb 26 11:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 55K Feb 26 11:12 CTLFireability.txt
-rw-r--r-- 1 mcc users 325K Feb 26 11:12 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 39K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 110K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 17K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 83K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 200K Feb 26 11:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 806K Feb 26 11:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 89K Feb 26 11:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 542K Feb 26 11:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 6.1K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 13K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 433K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-00
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-01
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-02
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-03
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-04
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-05
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-06
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-07
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-08
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-09
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-10
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-11
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-12
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-13
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-14
FORMULA_NAME AirplaneLD-PT-0100-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678345206619

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-0100
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 07:00:08] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 07:00:08] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 07:00:09] [INFO ] Load time of PNML (sax parser for PT used): 108 ms
[2023-03-09 07:00:09] [INFO ] Transformed 719 places.
[2023-03-09 07:00:09] [INFO ] Transformed 808 transitions.
[2023-03-09 07:00:09] [INFO ] Parsed PT model containing 719 places and 808 transitions and 3078 arcs in 210 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 15 ms.
Reduce places removed 302 places and 0 transitions.
Initial state reduction rules removed 1 formulas.
FORMULA AirplaneLD-PT-0100-CTLCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0100-CTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 324 out of 417 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 417/417 places, 808/808 transitions.
Discarding 91 places :
Symmetric choice reduction at 0 with 91 rule applications. Total rules 91 place count 326 transition count 717
Iterating global reduction 0 with 91 rules applied. Total rules applied 182 place count 326 transition count 717
Ensure Unique test removed 91 transitions
Reduce isomorphic transitions removed 91 transitions.
Iterating post reduction 0 with 91 rules applied. Total rules applied 273 place count 326 transition count 626
Applied a total of 273 rules in 26 ms. Remains 326 /417 variables (removed 91) and now considering 626/808 (removed 182) transitions.
// Phase 1: matrix 626 rows 326 cols
[2023-03-09 07:00:09] [INFO ] Computed 3 place invariants in 24 ms
[2023-03-09 07:00:09] [INFO ] Implicit Places using invariants in 249 ms returned []
[2023-03-09 07:00:09] [INFO ] Invariant cache hit.
[2023-03-09 07:00:09] [INFO ] Implicit Places using invariants and state equation in 328 ms returned []
Implicit Place search using SMT with State Equation took 608 ms to find 0 implicit places.
[2023-03-09 07:00:09] [INFO ] Invariant cache hit.
[2023-03-09 07:00:10] [INFO ] Dead Transitions using invariants and state equation in 386 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 326/417 places, 626/808 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1023 ms. Remains : 326/417 places, 626/808 transitions.
Support contains 324 out of 326 places after structural reductions.
[2023-03-09 07:00:10] [INFO ] Flatten gal took : 96 ms
[2023-03-09 07:00:10] [INFO ] Flatten gal took : 44 ms
[2023-03-09 07:00:10] [INFO ] Input system was already deterministic with 626 transitions.
FORMULA AirplaneLD-PT-0100-CTLCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 1260 resets, run finished after 516 ms. (steps per millisecond=19 ) properties (out of 41) seen :22
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 1 ms. (steps per millisecond=1001 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 1 ms. (steps per millisecond=1001 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 1 ms. (steps per millisecond=1001 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 1 ms. (steps per millisecond=1001 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 1 ms. (steps per millisecond=1001 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 1 ms. (steps per millisecond=1001 ) properties (out of 19) seen :0
Running SMT prover for 19 properties.
[2023-03-09 07:00:11] [INFO ] Invariant cache hit.
[2023-03-09 07:00:11] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-09 07:00:11] [INFO ] [Real]Absence check using 2 positive and 1 generalized place invariants in 0 ms returned sat
[2023-03-09 07:00:11] [INFO ] After 443ms SMT Verify possible using all constraints in real domain returned unsat :8 sat :0 real:11
[2023-03-09 07:00:12] [INFO ] [Nat]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-03-09 07:00:12] [INFO ] [Nat]Absence check using 2 positive and 1 generalized place invariants in 27 ms returned sat
[2023-03-09 07:00:12] [INFO ] After 519ms SMT Verify possible using all constraints in natural domain returned unsat :19 sat :0
Fused 19 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 19 atomic propositions for a total of 13 simplifications.
FORMULA AirplaneLD-PT-0100-CTLCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0100-CTLCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 07:00:12] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 30 ms
FORMULA AirplaneLD-PT-0100-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0100-CTLCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 22 ms
[2023-03-09 07:00:12] [INFO ] Input system was already deterministic with 626 transitions.
Computed a total of 326 stabilizing places and 626 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 326 transition count 626
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA AirplaneLD-PT-0100-CTLCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 326/326 places, 626/626 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 323 transition count 626
Discarding 106 places :
Symmetric choice reduction at 1 with 106 rule applications. Total rules 109 place count 217 transition count 520
Iterating global reduction 1 with 106 rules applied. Total rules applied 215 place count 217 transition count 520
Ensure Unique test removed 106 transitions
Reduce isomorphic transitions removed 106 transitions.
Iterating post reduction 1 with 106 rules applied. Total rules applied 321 place count 217 transition count 414
Applied a total of 321 rules in 9 ms. Remains 217 /326 variables (removed 109) and now considering 414/626 (removed 212) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 217/326 places, 414/626 transitions.
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 12 ms
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 14 ms
[2023-03-09 07:00:12] [INFO ] Input system was already deterministic with 414 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 326/326 places, 626/626 transitions.
Graph (complete) has 800 edges and 326 vertex of which 2 are kept as prefixes of interest. Removing 324 places using SCC suffix rule.3 ms
Discarding 324 places :
Also discarding 417 output transitions
Drop transitions removed 417 transitions
Ensure Unique test removed 207 transitions
Reduce isomorphic transitions removed 207 transitions.
Iterating post reduction 0 with 207 rules applied. Total rules applied 208 place count 2 transition count 2
Applied a total of 208 rules in 14 ms. Remains 2 /326 variables (removed 324) and now considering 2/626 (removed 624) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 2/326 places, 2/626 transitions.
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 1 ms
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 0 ms
[2023-03-09 07:00:12] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 326/326 places, 626/626 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 325 transition count 626
Discarding 303 places :
Symmetric choice reduction at 1 with 303 rule applications. Total rules 304 place count 22 transition count 323
Iterating global reduction 1 with 303 rules applied. Total rules applied 607 place count 22 transition count 323
Ensure Unique test removed 303 transitions
Reduce isomorphic transitions removed 303 transitions.
Iterating post reduction 1 with 303 rules applied. Total rules applied 910 place count 22 transition count 20
Applied a total of 910 rules in 8 ms. Remains 22 /326 variables (removed 304) and now considering 20/626 (removed 606) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 20 ms. Remains : 22/326 places, 20/626 transitions.
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 1 ms
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 1 ms
[2023-03-09 07:00:12] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 326/326 places, 626/626 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 323 transition count 626
Discarding 304 places :
Symmetric choice reduction at 1 with 304 rule applications. Total rules 307 place count 19 transition count 322
Iterating global reduction 1 with 304 rules applied. Total rules applied 611 place count 19 transition count 322
Ensure Unique test removed 304 transitions
Reduce isomorphic transitions removed 304 transitions.
Iterating post reduction 1 with 304 rules applied. Total rules applied 915 place count 19 transition count 18
Applied a total of 915 rules in 4 ms. Remains 19 /326 variables (removed 307) and now considering 18/626 (removed 608) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 19/326 places, 18/626 transitions.
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 1 ms
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 1 ms
[2023-03-09 07:00:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 326/326 places, 626/626 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 323 transition count 626
Discarding 304 places :
Symmetric choice reduction at 1 with 304 rule applications. Total rules 307 place count 19 transition count 322
Iterating global reduction 1 with 304 rules applied. Total rules applied 611 place count 19 transition count 322
Ensure Unique test removed 304 transitions
Reduce isomorphic transitions removed 304 transitions.
Iterating post reduction 1 with 304 rules applied. Total rules applied 915 place count 19 transition count 18
Applied a total of 915 rules in 6 ms. Remains 19 /326 variables (removed 307) and now considering 18/626 (removed 608) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 19/326 places, 18/626 transitions.
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 1 ms
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 1 ms
[2023-03-09 07:00:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 326/326 places, 626/626 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 323 transition count 626
Discarding 297 places :
Symmetric choice reduction at 1 with 297 rule applications. Total rules 300 place count 26 transition count 329
Iterating global reduction 1 with 297 rules applied. Total rules applied 597 place count 26 transition count 329
Ensure Unique test removed 297 transitions
Reduce isomorphic transitions removed 297 transitions.
Iterating post reduction 1 with 297 rules applied. Total rules applied 894 place count 26 transition count 32
Applied a total of 894 rules in 17 ms. Remains 26 /326 variables (removed 300) and now considering 32/626 (removed 594) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 26/326 places, 32/626 transitions.
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 1 ms
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 1 ms
[2023-03-09 07:00:12] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 326/326 places, 626/626 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 323 transition count 626
Discarding 303 places :
Symmetric choice reduction at 1 with 303 rule applications. Total rules 306 place count 20 transition count 323
Iterating global reduction 1 with 303 rules applied. Total rules applied 609 place count 20 transition count 323
Ensure Unique test removed 303 transitions
Reduce isomorphic transitions removed 303 transitions.
Iterating post reduction 1 with 303 rules applied. Total rules applied 912 place count 20 transition count 20
Applied a total of 912 rules in 5 ms. Remains 20 /326 variables (removed 306) and now considering 20/626 (removed 606) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 20/326 places, 20/626 transitions.
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 0 ms
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 0 ms
[2023-03-09 07:00:12] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 326/326 places, 626/626 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 323 transition count 626
Discarding 297 places :
Symmetric choice reduction at 1 with 297 rule applications. Total rules 300 place count 26 transition count 329
Iterating global reduction 1 with 297 rules applied. Total rules applied 597 place count 26 transition count 329
Ensure Unique test removed 297 transitions
Reduce isomorphic transitions removed 297 transitions.
Iterating post reduction 1 with 297 rules applied. Total rules applied 894 place count 26 transition count 32
Applied a total of 894 rules in 5 ms. Remains 26 /326 variables (removed 300) and now considering 32/626 (removed 594) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 26/326 places, 32/626 transitions.
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 1 ms
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 6 ms
[2023-03-09 07:00:12] [INFO ] Input system was already deterministic with 32 transitions.
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 17 ms
[2023-03-09 07:00:12] [INFO ] Flatten gal took : 30 ms
[2023-03-09 07:00:12] [INFO ] Export to MCC of 8 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-09 07:00:12] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 326 places, 626 transitions and 1724 arcs took 5 ms.
Total runtime 3989 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT AirplaneLD-PT-0100
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/380

FORMULA AirplaneLD-PT-0100-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0100-CTLCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0100-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0100-CTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0100-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0100-CTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0100-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0100-CTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678345213700

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/380/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/380/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/380/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 32 (type SKEL/SRCH) for 3 AirplaneLD-PT-0100-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 32 (type SKEL/SRCH) for AirplaneLD-PT-0100-CTLCardinality-03
lola: result : true
lola: markings : 10
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 1 (type EXCL) for 0 AirplaneLD-PT-0100-CTLCardinality-01
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 35 (type FNDP) for 6 AirplaneLD-PT-0100-CTLCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 35 (type FNDP) for AirplaneLD-PT-0100-CTLCardinality-05
lola: result : true
lola: fired transitions : 9
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 1 (type EXCL) for AirplaneLD-PT-0100-CTLCardinality-01
lola: result : true
lola: markings : 1515
lola: fired transitions : 3312
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: LAUNCH task # 30 (type EXCL) for 25 AirplaneLD-PT-0100-CTLCardinality-15
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 39 (type SKEL/SRCH) for 22 AirplaneLD-PT-0100-CTLCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 39 (type SKEL/SRCH) for AirplaneLD-PT-0100-CTLCardinality-14
lola: result : true
lola: markings : 9
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:797
lola: FINISHED task # 30 (type EXCL) for AirplaneLD-PT-0100-CTLCardinality-15
lola: result : true
lola: markings : 6853
lola: fired transitions : 30630
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 22 AirplaneLD-PT-0100-CTLCardinality-14
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for AirplaneLD-PT-0100-CTLCardinality-14
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 AirplaneLD-PT-0100-CTLCardinality-08
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for AirplaneLD-PT-0100-CTLCardinality-08
lola: result : true
lola: markings : 27363
lola: fired transitions : 67429
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 13 AirplaneLD-PT-0100-CTLCardinality-06
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for AirplaneLD-PT-0100-CTLCardinality-06
lola: result : false
lola: markings : 30150
lola: fired transitions : 47185
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 AirplaneLD-PT-0100-CTLCardinality-07
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for AirplaneLD-PT-0100-CTLCardinality-07
lola: result : true
lola: markings : 9
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 AirplaneLD-PT-0100-CTLCardinality-03
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for AirplaneLD-PT-0100-CTLCardinality-03
lola: result : true
lola: markings : 11
lola: fired transitions : 22
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0100-CTLCardinality-01: CTL true CTL model checker
AirplaneLD-PT-0100-CTLCardinality-03: EGEF true CTL model checker
AirplaneLD-PT-0100-CTLCardinality-05: CONJ false findpath
AirplaneLD-PT-0100-CTLCardinality-06: CTL false CTL model checker
AirplaneLD-PT-0100-CTLCardinality-07: EG true state space / EG
AirplaneLD-PT-0100-CTLCardinality-08: CTL true CTL model checker
AirplaneLD-PT-0100-CTLCardinality-14: AXAF false state space /EXEG
AirplaneLD-PT-0100-CTLCardinality-15: DISJ true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0100"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is AirplaneLD-PT-0100, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595200265"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0100.tgz
mv AirplaneLD-PT-0100 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;