About the Execution of LoLa+red for AirplaneLD-PT-0010
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
209.815 | 5124.00 | 11929.00 | 35.30 | FTFTFFTFTFFTTFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595200241.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is AirplaneLD-PT-0010, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595200241
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 568K
-rw-r--r-- 1 mcc users 12K Feb 26 11:11 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K Feb 26 11:11 CTLCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 26 11:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 68K Feb 26 11:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 6.2K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 31K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 11:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 99K Feb 26 11:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 26 11:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Feb 26 11:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 48K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-00
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-01
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-02
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-03
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-04
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-05
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-06
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-07
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-08
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-09
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-10
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-11
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-12
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-13
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-14
FORMULA_NAME AirplaneLD-PT-0010-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1678344955103
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-0010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 06:55:57] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 06:55:57] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 06:55:58] [INFO ] Load time of PNML (sax parser for PT used): 35 ms
[2023-03-09 06:55:58] [INFO ] Transformed 89 places.
[2023-03-09 06:55:58] [INFO ] Transformed 88 transitions.
[2023-03-09 06:55:58] [INFO ] Parsed PT model containing 89 places and 88 transitions and 333 arcs in 114 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 10 ms.
Reduce places removed 32 places and 0 transitions.
Support contains 44 out of 57 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 57/57 places, 88/88 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 46 transition count 77
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 46 transition count 77
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 0 with 11 rules applied. Total rules applied 33 place count 46 transition count 66
Applied a total of 33 rules in 9 ms. Remains 46 /57 variables (removed 11) and now considering 66/88 (removed 22) transitions.
// Phase 1: matrix 66 rows 46 cols
[2023-03-09 06:55:58] [INFO ] Computed 3 place invariants in 5 ms
[2023-03-09 06:55:58] [INFO ] Implicit Places using invariants in 282 ms returned []
[2023-03-09 06:55:58] [INFO ] Invariant cache hit.
[2023-03-09 06:55:58] [INFO ] Implicit Places using invariants and state equation in 174 ms returned []
Implicit Place search using SMT with State Equation took 493 ms to find 0 implicit places.
[2023-03-09 06:55:58] [INFO ] Invariant cache hit.
[2023-03-09 06:55:58] [INFO ] Dead Transitions using invariants and state equation in 92 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 46/57 places, 66/88 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 596 ms. Remains : 46/57 places, 66/88 transitions.
Support contains 44 out of 46 places after structural reductions.
[2023-03-09 06:55:58] [INFO ] Initial state reduction rules for CTL removed 3 formulas.
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 28 ms
FORMULA AirplaneLD-PT-0010-CTLCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0010-CTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0010-CTLCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 8 ms
[2023-03-09 06:55:59] [INFO ] Input system was already deterministic with 66 transitions.
Support contains 40 out of 46 places (down from 44) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 1241 resets, run finished after 281 ms. (steps per millisecond=35 ) properties (out of 43) seen :11
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 1 ms. (steps per millisecond=1001 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 1 ms. (steps per millisecond=1001 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 1 ms. (steps per millisecond=1001 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 1 ms. (steps per millisecond=1001 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1000 steps, including 10 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 32) seen :0
Running SMT prover for 32 properties.
[2023-03-09 06:55:59] [INFO ] Invariant cache hit.
[2023-03-09 06:55:59] [INFO ] [Real]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-03-09 06:55:59] [INFO ] [Real]Absence check using 2 positive and 1 generalized place invariants in 0 ms returned sat
[2023-03-09 06:55:59] [INFO ] After 176ms SMT Verify possible using all constraints in real domain returned unsat :31 sat :0 real:1
[2023-03-09 06:55:59] [INFO ] [Nat]Absence check using 2 positive place invariants in 9 ms returned sat
[2023-03-09 06:55:59] [INFO ] [Nat]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-09 06:55:59] [INFO ] After 49ms SMT Verify possible using all constraints in natural domain returned unsat :32 sat :0
Fused 32 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 32 atomic propositions for a total of 13 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA AirplaneLD-PT-0010-CTLCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0010-CTLCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0010-CTLCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0010-CTLCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0010-CTLCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 06:55:59] [INFO ] Initial state reduction rules for CTL removed 4 formulas.
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 6 ms
FORMULA AirplaneLD-PT-0010-CTLCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0010-CTLCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0010-CTLCardinality-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA AirplaneLD-PT-0010-CTLCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 5 ms
[2023-03-09 06:55:59] [INFO ] Input system was already deterministic with 66 transitions.
Support contains 8 out of 46 places (down from 32) after GAL structural reductions.
Computed a total of 46 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 46 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA AirplaneLD-PT-0010-CTLCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 66/66 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 45 transition count 66
Discarding 23 places :
Symmetric choice reduction at 1 with 23 rule applications. Total rules 24 place count 22 transition count 43
Iterating global reduction 1 with 23 rules applied. Total rules applied 47 place count 22 transition count 43
Ensure Unique test removed 23 transitions
Reduce isomorphic transitions removed 23 transitions.
Iterating post reduction 1 with 23 rules applied. Total rules applied 70 place count 22 transition count 20
Applied a total of 70 rules in 2 ms. Remains 22 /46 variables (removed 24) and now considering 20/66 (removed 46) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 22/46 places, 20/66 transitions.
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 2 ms
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 1 ms
[2023-03-09 06:55:59] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 46/46 places, 66/66 transitions.
Graph (complete) has 101 edges and 46 vertex of which 32 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.0 ms
Discarding 14 places :
Also discarding 10 output transitions
Drop transitions removed 10 transitions
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 0 with 9 rules applied. Total rules applied 10 place count 32 transition count 47
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 25 place count 17 transition count 32
Iterating global reduction 1 with 15 rules applied. Total rules applied 40 place count 17 transition count 32
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 1 with 15 rules applied. Total rules applied 55 place count 17 transition count 17
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 55 place count 17 transition count 16
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 57 place count 16 transition count 16
Applied a total of 57 rules in 11 ms. Remains 16 /46 variables (removed 30) and now considering 16/66 (removed 50) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 16/46 places, 16/66 transitions.
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 1 ms
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 1 ms
[2023-03-09 06:55:59] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 66/66 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 43 transition count 66
Discarding 23 places :
Symmetric choice reduction at 1 with 23 rule applications. Total rules 26 place count 20 transition count 43
Iterating global reduction 1 with 23 rules applied. Total rules applied 49 place count 20 transition count 43
Ensure Unique test removed 23 transitions
Reduce isomorphic transitions removed 23 transitions.
Iterating post reduction 1 with 23 rules applied. Total rules applied 72 place count 20 transition count 20
Applied a total of 72 rules in 4 ms. Remains 20 /46 variables (removed 26) and now considering 20/66 (removed 46) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 20/46 places, 20/66 transitions.
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 1 ms
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 1 ms
[2023-03-09 06:55:59] [INFO ] Input system was already deterministic with 20 transitions.
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 4 ms
[2023-03-09 06:55:59] [INFO ] Flatten gal took : 17 ms
[2023-03-09 06:55:59] [INFO ] Export to MCC of 3 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-09 06:55:59] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 46 places, 66 transitions and 185 arcs took 0 ms.
Total runtime 1989 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT AirplaneLD-PT-0010
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/378
FORMULA AirplaneLD-PT-0010-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0010-CTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0010-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678344960227
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/378/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/378/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/378/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:227
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: LAUNCH task # 1 (type EXCL) for 0 AirplaneLD-PT-0010-CTLCardinality-06
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for AirplaneLD-PT-0010-CTLCardinality-06
lola: result : true
lola: markings : 11
lola: fired transitions : 29
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 AirplaneLD-PT-0010-CTLCardinality-11
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for AirplaneLD-PT-0010-CTLCardinality-11
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 AirplaneLD-PT-0010-CTLCardinality-08
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for AirplaneLD-PT-0010-CTLCardinality-08
lola: result : true
lola: markings : 20835
lola: fired transitions : 132591
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0010-CTLCardinality-06: CTL true CTL model checker
AirplaneLD-PT-0010-CTLCardinality-08: CTL true CTL model checker
AirplaneLD-PT-0010-CTLCardinality-11: EU true state space /EU
Time elapsed: 0 secs. Pages in use: 1
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0010"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is AirplaneLD-PT-0010, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595200241"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0010.tgz
mv AirplaneLD-PT-0010 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;