About the Execution of LoLa+red for AirplaneLD-COL-1000
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16227.783 | 81605.00 | 226505.00 | 3027.50 | FFFTTTFTFTFTFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595200222.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is AirplaneLD-COL-1000, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595200222
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 588K
-rw-r--r-- 1 mcc users 7.2K Feb 26 12:10 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 26 12:10 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 26 11:51 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 26 11:51 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 13:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 99K Feb 26 13:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 26 12:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 26 12:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 181K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-00
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-01
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-02
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-03
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-04
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-05
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-06
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-07
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-08
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-09
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-10
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-11
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-12
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-13
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-14
FORMULA_NAME AirplaneLD-COL-1000-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678344434034
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-COL-1000
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 06:47:16] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 06:47:16] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 06:47:16] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-09 06:47:16] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-09 06:47:17] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 671 ms
[2023-03-09 06:47:17] [INFO ] Detected 3 constant HL places corresponding to 3002 PT places.
[2023-03-09 06:47:17] [INFO ] Imported 20 HL places and 15 HL transitions for a total of 7019 PT places and 12012.0 transition bindings in 21 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 18 ms.
Working with output stream class java.io.PrintStream
[2023-03-09 06:47:17] [INFO ] Built PT skeleton of HLPN with 20 places and 15 transitions 56 arcs in 4 ms.
[2023-03-09 06:47:17] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Remains 16 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 17 stabilizing places and 15 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 17 transition count 15
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
[2023-03-09 06:47:17] [INFO ] Flatten gal took : 15 ms
[2023-03-09 06:47:17] [INFO ] Flatten gal took : 3 ms
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-00 FALSE TECHNIQUES CPN_APPROX
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-08 FALSE TECHNIQUES CPN_APPROX
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-15 TRUE TECHNIQUES CPN_APPROX
Symmetric sort wr.t. initial and guards and successors and join/free detected :Altitude
Symmetric sort wr.t. initial detected :Altitude
Transition t3_2 : guard parameter $A(Altitude:2000) in guard (OR (GEQ $A 999) (EQ $A 1999))introduces in Altitude(2000) partition with 2 elements
Transition t3_1 : guard parameter $A(Altitude:2000) in guard (AND (LT $A 999) (NEQ $A 1999))introduces in Altitude(2000) partition with 2 elements
Sort wr.t. initial and guards Altitude has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Altitude domain size was 2000 reducing to 2 values.
For transition t3_2:(OR (GEQ $A 999) (EQ $A 1999)) -> (EQ $A 1)
For transition t3_1:(AND (LT $A 999) (NEQ $A 1999)) -> (EQ $A 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Speed
Symmetric sort wr.t. initial detected :Speed
Transition t5_2 : guard parameter $S(Speed:1000) in guard (OR (LEQ $S 499) (EQ $S 999))introduces in Speed(1000) partition with 2 elements
Transition t5_1 : guard parameter $S(Speed:1000) in guard (AND (GT $S 499) (NEQ $S 999))introduces in Speed(1000) partition with 2 elements
Transition t4_2 : guard parameter $S(Speed:1000) in guard (OR (LEQ $S 499) (EQ $S 999))introduces in Speed(1000) partition with 2 elements
Transition t4_1 : guard parameter $S(Speed:1000) in guard (AND (GT $S 499) (NEQ $S 999))introduces in Speed(1000) partition with 2 elements
Sort wr.t. initial and guards Speed has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Speed domain size was 1000 reducing to 2 values.
For transition t5_2:(OR (LEQ $S 499) (EQ $S 999)) -> (EQ $S 1)
For transition t5_1:(AND (GT $S 499) (NEQ $S 999)) -> (EQ $S 0)
For transition t4_2:(OR (LEQ $S 499) (EQ $S 999)) -> (EQ $S 1)
For transition t4_1:(AND (GT $S 499) (NEQ $S 999)) -> (EQ $S 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Signal
Arc [19:1*[1]] contains constants of sort Signal
Transition t5_2 : constants on arcs in [[19:1*[1]]] introduces in Signal(2) partition with 1 elements that refines current partition to 2 subsets.
Symmetric sort wr.t. initial and guards and successors and join/free detected :Weight
Symmetric sort wr.t. initial detected :Weight
Transition t2_2 : guard parameter $W(Weight:2) in guard (EQ $W 1)introduces in Weight(2) partition with 2 elements
[2023-03-09 06:47:17] [INFO ] Unfolded HLPN to a Petri net with 29 places and 20 transitions 56 arcs in 50 ms.
[2023-03-09 06:47:17] [INFO ] Unfolded 16 HLPN properties in 0 ms.
Reduce places removed 6 places and 0 transitions.
Incomplete random walk after 10000 steps, including 1261 resets, run finished after 490 ms. (steps per millisecond=20 ) properties (out of 13) seen :2
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 248 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 219 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 254 resets, run finished after 99 ms. (steps per millisecond=101 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 235 resets, run finished after 57 ms. (steps per millisecond=175 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 240 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 245 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 246 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 241 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 238 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 242 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 246 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
// Phase 1: matrix 20 rows 23 cols
[2023-03-09 06:47:18] [INFO ] Computed 3 place invariants in 3 ms
[2023-03-09 06:47:18] [INFO ] After 195ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-09 06:47:18] [INFO ] [Nat]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-09 06:47:18] [INFO ] [Nat]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-09 06:47:19] [INFO ] After 140ms SMT Verify possible using all constraints in natural domain returned unsat :11 sat :0
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 11 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 2651 ms.
starting LoLA
BK_INPUT AirplaneLD-COL-1000
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-1000-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678344515639
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 68 (type SKEL/FNDP) for 24 AirplaneLD-COL-1000-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/EQUN) for 24 AirplaneLD-COL-1000-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SKEL/SRCH) for 24 AirplaneLD-COL-1000-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/SRCH) for 24 AirplaneLD-COL-1000-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 71 (type SKEL/SRCH) for AirplaneLD-COL-1000-ReachabilityCardinality-08
lola: result : false
lola: markings : 69
lola: fired transitions : 155
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 68 (type FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 69 (type EQUN) for AirplaneLD-COL-1000-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 72 (type SRCH) for AirplaneLD-COL-1000-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 55 (type SKEL/FNDP) for 42 AirplaneLD-COL-1000-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 42 AirplaneLD-COL-1000-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 94 (type SKEL/SRCH) for 42 AirplaneLD-COL-1000-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type SKEL/SRCH) for 42 AirplaneLD-COL-1000-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 68 (type SKEL/FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 865
lola: tried executions : 130
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 94 (type SKEL/SRCH) for AirplaneLD-COL-1000-ReachabilityCardinality-14
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 95 (type SKEL/SRCH) for AirplaneLD-COL-1000-ReachabilityCardinality-14
lola: result : false
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 55 (type FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 58 (type EQUN) for AirplaneLD-COL-1000-ReachabilityCardinality-14 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 118 (type SKEL/SRCH) for 12 AirplaneLD-COL-1000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SKEL/SRCH) for 12 AirplaneLD-COL-1000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type SKEL/FNDP) for 0 AirplaneLD-COL-1000-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SKEL/EQUN) for 0 AirplaneLD-COL-1000-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 55 (type SKEL/FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-14
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: result : unknown
lola: fired transitions : 21925
lola: tried executions : 10964
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 58 (type SKEL/EQUN) for AirplaneLD-COL-1000-ReachabilityCardinality-14
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 139 (type SKEL/SRCH) for AirplaneLD-COL-1000-ReachabilityCardinality-04
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 118 (type SRCH) for AirplaneLD-COL-1000-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 96 (type SKEL/FNDP) for 3 AirplaneLD-COL-1000-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type SKEL/EQUN) for 3 AirplaneLD-COL-1000-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-69.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-121.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 69 (type SKEL/EQUN) for AirplaneLD-COL-1000-ReachabilityCardinality-08
lola: result : false
lola: FINISHED task # 121 (type SKEL/EQUN) for AirplaneLD-COL-1000-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 108 (type FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-00 (obsolete)
lola: TR BINDINGS DONE
lola: Places: 7019, Transitions: 8008
lola: LAUNCH task # 133 (type SKEL/FNDP) for 45 AirplaneLD-COL-1000-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 145 (type SKEL/EQUN) for 45 AirplaneLD-COL-1000-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 108 (type SKEL/FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 118221
lola: tried executions : 118222
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-145.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 145 (type SKEL/EQUN) for AirplaneLD-COL-1000-ReachabilityCardinality-15
lola: result : unknown
lola: LAUNCH task # 111 (type SKEL/FNDP) for 36 AirplaneLD-COL-1000-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans t2_1
lola: @ trans SampleRW
lola: @ trans getAlt
lola: @ trans t3_2
lola: @ trans t4_1
lola: @ trans t1_2
lola: @ trans t1_1
lola: @ trans SpeedLW
lola: @ trans t5_2
lola: @ trans t5_1
lola: @ trans t2_2
lola: @ trans t3_1
lola: @ trans SampleLW
lola: @ trans SpeedRW
lola: @ trans t4_2
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-97.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF 0 3 2 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
96 EF FNDP 5/240 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-01 9336641 t fired, 3112214 attempts, .
97 EF STEQ 5/240 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-01 sara is running.
111 EF FNDP 5/240 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 7047192 t fired, 7047193 attempts, .
133 EF FNDP 5/257 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 38028438 t fired, 38028439 attempts, .
Time elapsed: 5 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: FINISHED task # 97 (type SKEL/EQUN) for AirplaneLD-COL-1000-ReachabilityCardinality-01
lola: result : false
lola: CANCELED task # 96 (type FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 104 (type SKEL/FNDP) for 9 AirplaneLD-COL-1000-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 136 (type SKEL/EQUN) for 9 AirplaneLD-COL-1000-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 96 (type SKEL/FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 12863185
lola: tried executions : 4287730
lola: time used : 7.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG 0 3 2 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 3/256 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-03 13526389 t fired, 2002054 attempts, .
111 EF FNDP 10/269 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 16289211 t fired, 16289212 attempts, .
133 EF FNDP 10/269 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 91594188 t fired, 91594189 attempts, .
136 EF STEQ 3/256 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-03 sara not yet started (preprocessing).
Time elapsed: 10 secs. Pages in use: 2
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG 0 3 2 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 8/253 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-03 34293397 t fired, 5075882 attempts, .
111 EF FNDP 15/266 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 26717507 t fired, 26717509 attempts, .
133 EF FNDP 15/266 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 151735859 t fired, 151735853 attempts, .
136 EF STEQ 8/253 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-03 sara not yet started (preprocessing).
Time elapsed: 15 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG 0 3 2 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 13/248 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-03 55066256 t fired, 8150653 attempts, .
111 EF FNDP 20/261 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 37083398 t fired, 37083400 attempts, .
133 EF FNDP 20/261 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 213317022 t fired, 213317023 attempts, .
136 EF STEQ 13/248 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-03 sara not yet started (preprocessing).
Time elapsed: 20 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-136.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 136 (type SKEL/EQUN) for AirplaneLD-COL-1000-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 104 (type FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 99 (type SKEL/FNDP) for 30 AirplaneLD-COL-1000-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SKEL/EQUN) for 30 AirplaneLD-COL-1000-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 104 (type SKEL/FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 61830597
lola: tried executions : 9151870
lola: time used : 15.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG true skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF 0 3 2 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
99 EF FNDP 3/275 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 28562698 t fired, 14281350 attempts, .
111 EF FNDP 25/278 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 46899794 t fired, 46899795 attempts, .
112 EF STEQ 3/298 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 sara not yet started (preprocessing).
133 EF FNDP 25/278 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 269173069 t fired, 269173070 attempts, .
Time elapsed: 25 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG true skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF 0 3 2 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
99 EF FNDP 8/272 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 73569320 t fired, 36784659 attempts, .
111 EF FNDP 30/275 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 57024970 t fired, 57024972 attempts, .
112 EF STEQ 8/295 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 sara not yet started (preprocessing).
133 EF FNDP 30/275 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 326863099 t fired, 326863100 attempts, .
Time elapsed: 30 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG true skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF 0 3 2 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
99 EF FNDP 15/267 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 97356164 t fired, 48678063 attempts, .
111 EF FNDP 40/270 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 62525257 t fired, 62525258 attempts, .
112 EF STEQ 18/290 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 sara not yet started (preprocessing).
133 EF FNDP 40/270 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 355519569 t fired, 355519570 attempts, .
Time elapsed: 40 secs. Pages in use: 2
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG true skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF 0 3 2 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
99 EF FNDP 23/257 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 102540000 t fired, 51270001 attempts, .
111 EF FNDP 45/260 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 63772086 t fired, 63772088 attempts, .
112 EF STEQ 23/280 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 sara not yet started (preprocessing).
133 EF FNDP 45/260 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 361047368 t fired, 361047369 attempts, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG true skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF 0 3 2 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
99 EF FNDP 28/252 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 107705050 t fired, 53852526 attempts, .
111 EF FNDP 50/255 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 65227715 t fired, 65227716 attempts, .
112 EF STEQ 28/275 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 sara not yet started (preprocessing).
133 EF FNDP 50/255 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 367476544 t fired, 367476545 attempts, .
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# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-112.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG true skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF 0 3 2 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
99 EF FNDP 33/247 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 119354604 t fired, 59677303 attempts, .
111 EF FNDP 55/250 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 67410496 t fired, 67410497 attempts, .
112 EF STEQ 33/270 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-10 sara is running.
133 EF FNDP 55/250 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 378076848 t fired, 378076849 attempts, .
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lola: FINISHED task # 112 (type SKEL/EQUN) for AirplaneLD-COL-1000-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 99 (type FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 57 (type SKEL/FNDP) for 27 AirplaneLD-COL-1000-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/FNDP) for 15 AirplaneLD-COL-1000-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 99 (type SKEL/FNDP) for AirplaneLD-COL-1000-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 119529417
lola: tried executions : 59764710
lola: time used : 33.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG true skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 EF FNDP 5/322 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-09 6446268 t fired, 3223135 attempts, .
59 EF FNDP 5/322 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-05 6505036 t fired, 3252519 attempts, .
111 EF FNDP 60/272 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 70077564 t fired, 70077565 attempts, .
133 EF FNDP 60/272 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 389434913 t fired, 389434914 attempts, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG true skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 EF FNDP 10/317 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-09 11537844 t fired, 5768923 attempts, .
59 EF FNDP 10/317 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-05 11430728 t fired, 5715365 attempts, .
111 EF FNDP 65/267 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 72044201 t fired, 72044202 attempts, .
133 EF FNDP 65/267 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 396761877 t fired, 396761878 attempts, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG true skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 EF FNDP 15/312 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-09 18931586 t fired, 9465794 attempts, .
59 EF FNDP 15/312 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-05 18314554 t fired, 9157278 attempts, .
111 EF FNDP 70/262 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 74469513 t fired, 74469515 attempts, .
133 EF FNDP 70/262 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 407464734 t fired, 407464721 attempts, .
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# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-1000-ReachabilityCardinality-00: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-01: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-03: AG true skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-COL-1000-ReachabilityCardinality-10: EF false skeleton: state equation
AirplaneLD-COL-1000-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-1000-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 4
AirplaneLD-COL-1000-ReachabilityCardinality-05: AG 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-06: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-09: AG 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-12: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-1000-ReachabilityCardinality-15: AG 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 EF FNDP 20/307 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-09 23656866 t fired, 11828434 attempts, .
59 EF FNDP 20/307 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-05 23077686 t fired, 11538844 attempts, .
111 EF FNDP 75/257 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-12 76326196 t fired, 76326197 attempts, .
133 EF FNDP 75/257 0/5 AirplaneLD-COL-1000-ReachabilityCardinality-15 414864126 t fired, 414864127 attempts, .
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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 453 Killed lola --conf=$BIN_DIR/configfiles/reachabilitycardinalityconf --formula=$DIR/ReachabilityCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-1000"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is AirplaneLD-COL-1000, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595200222"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-1000.tgz
mv AirplaneLD-COL-1000 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;