fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r007-oct2-167813595100138
Last Updated
May 14, 2023

About the Execution of LoLa+red for ASLink-PT-09a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2208.535 720650.00 773713.00 30.10 TT?F??T?FFFTFF?T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595100138.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ASLink-PT-09a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595100138
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 7.3K Feb 26 13:10 CTLCardinality.txt
-rw-r--r-- 1 mcc users 80K Feb 26 13:10 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 26 13:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 26 13:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 13:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 167K Feb 26 13:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Feb 26 13:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K Feb 26 13:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 839K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ASLink-PT-09a-CTLFireability-00
FORMULA_NAME ASLink-PT-09a-CTLFireability-01
FORMULA_NAME ASLink-PT-09a-CTLFireability-02
FORMULA_NAME ASLink-PT-09a-CTLFireability-03
FORMULA_NAME ASLink-PT-09a-CTLFireability-04
FORMULA_NAME ASLink-PT-09a-CTLFireability-05
FORMULA_NAME ASLink-PT-09a-CTLFireability-06
FORMULA_NAME ASLink-PT-09a-CTLFireability-07
FORMULA_NAME ASLink-PT-09a-CTLFireability-08
FORMULA_NAME ASLink-PT-09a-CTLFireability-09
FORMULA_NAME ASLink-PT-09a-CTLFireability-10
FORMULA_NAME ASLink-PT-09a-CTLFireability-11
FORMULA_NAME ASLink-PT-09a-CTLFireability-12
FORMULA_NAME ASLink-PT-09a-CTLFireability-13
FORMULA_NAME ASLink-PT-09a-CTLFireability-14
FORMULA_NAME ASLink-PT-09a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678341953759

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ASLink-PT-09a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 06:05:55] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-09 06:05:55] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 06:05:55] [INFO ] Load time of PNML (sax parser for PT used): 156 ms
[2023-03-09 06:05:55] [INFO ] Transformed 1991 places.
[2023-03-09 06:05:55] [INFO ] Transformed 2919 transitions.
[2023-03-09 06:05:55] [INFO ] Found NUPN structural information;
[2023-03-09 06:05:55] [INFO ] Parsed PT model containing 1991 places and 2919 transitions and 10953 arcs in 258 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Ensure Unique test removed 31 transitions
Reduce redundant transitions removed 31 transitions.
Support contains 220 out of 1991 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1991/1991 places, 2888/2888 transitions.
Ensure Unique test removed 34 places
Discarding 14 places :
Implicit places reduction removed 14 places
Iterating post reduction 0 with 48 rules applied. Total rules applied 48 place count 1943 transition count 2888
Discarding 9 places :
Symmetric choice reduction at 1 with 9 rule applications. Total rules 57 place count 1934 transition count 2854
Ensure Unique test removed 1 places
Iterating global reduction 1 with 10 rules applied. Total rules applied 67 place count 1933 transition count 2854
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 69 place count 1933 transition count 2852
Applied a total of 69 rules in 411 ms. Remains 1933 /1991 variables (removed 58) and now considering 2852/2888 (removed 36) transitions.
// Phase 1: matrix 2852 rows 1933 cols
[2023-03-09 06:05:56] [INFO ] Computed 335 place invariants in 149 ms
[2023-03-09 06:05:58] [INFO ] Implicit Places using invariants in 1826 ms returned [1, 19, 20, 23, 33, 51, 69, 198, 215, 221, 241, 259, 404, 409, 430, 448, 577, 593, 598, 599, 600, 618, 636, 784, 789, 790, 791, 809, 827, 956, 972, 977, 978, 979, 997, 1015, 1144, 1160, 1165, 1166, 1186, 1204, 1334, 1350, 1355, 1376, 1394, 1523, 1539, 1546, 1564, 1582, 1716, 1729, 1734, 1736, 1771, 1773, 1795, 1796, 1797, 1814, 1822, 1830, 1836, 1842, 1848, 1854, 1862, 1868, 1874]
Discarding 71 places :
Implicit Place search using SMT only with invariants took 1862 ms to find 71 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 1862/1991 places, 2852/2888 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 1851 transition count 2841
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 1851 transition count 2841
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 29 place count 1844 transition count 2834
Iterating global reduction 0 with 7 rules applied. Total rules applied 36 place count 1844 transition count 2834
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 39 place count 1841 transition count 2831
Iterating global reduction 0 with 3 rules applied. Total rules applied 42 place count 1841 transition count 2831
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 43 place count 1840 transition count 2830
Iterating global reduction 0 with 1 rules applied. Total rules applied 44 place count 1840 transition count 2830
Applied a total of 44 rules in 286 ms. Remains 1840 /1862 variables (removed 22) and now considering 2830/2852 (removed 22) transitions.
// Phase 1: matrix 2830 rows 1840 cols
[2023-03-09 06:05:58] [INFO ] Computed 264 place invariants in 71 ms
[2023-03-09 06:05:59] [INFO ] Implicit Places using invariants in 778 ms returned []
[2023-03-09 06:05:59] [INFO ] Invariant cache hit.
[2023-03-09 06:06:01] [INFO ] Implicit Places using invariants and state equation in 1665 ms returned []
Implicit Place search using SMT with State Equation took 2450 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 1840/1991 places, 2830/2888 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 5010 ms. Remains : 1840/1991 places, 2830/2888 transitions.
Support contains 220 out of 1840 places after structural reductions.
[2023-03-09 06:06:01] [INFO ] Flatten gal took : 207 ms
[2023-03-09 06:06:01] [INFO ] Flatten gal took : 144 ms
[2023-03-09 06:06:02] [INFO ] Input system was already deterministic with 2830 transitions.
Support contains 217 out of 1840 places (down from 220) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 45 resets, run finished after 486 ms. (steps per millisecond=20 ) properties (out of 93) seen :36
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Running SMT prover for 57 properties.
[2023-03-09 06:06:02] [INFO ] Invariant cache hit.
[2023-03-09 06:06:05] [INFO ] [Real]Absence check using 56 positive place invariants in 34 ms returned sat
[2023-03-09 06:06:06] [INFO ] [Real]Absence check using 56 positive and 208 generalized place invariants in 83 ms returned sat
[2023-03-09 06:06:06] [INFO ] After 3497ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:57
[2023-03-09 06:06:09] [INFO ] [Nat]Absence check using 56 positive place invariants in 46 ms returned sat
[2023-03-09 06:06:09] [INFO ] [Nat]Absence check using 56 positive and 208 generalized place invariants in 158 ms returned sat
[2023-03-09 06:06:31] [INFO ] After 18832ms SMT Verify possible using state equation in natural domain returned unsat :14 sat :42
[2023-03-09 06:06:31] [INFO ] After 18842ms SMT Verify possible using trap constraints in natural domain returned unsat :14 sat :42
Attempting to minimize the solution found.
Minimization took 3 ms.
[2023-03-09 06:06:31] [INFO ] After 25037ms SMT Verify possible using all constraints in natural domain returned unsat :14 sat :42
Fused 57 Parikh solutions to 4 different solutions.
Parikh walk visited 0 properties in 324 ms.
Support contains 120 out of 1840 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 2 places
Discarding 3 places :
Implicit places reduction removed 3 places
Drop transitions removed 281 transitions
Trivial Post-agglo rules discarded 281 transitions
Performed 281 trivial Post agglomeration. Transition count delta: 281
Iterating post reduction 0 with 286 rules applied. Total rules applied 286 place count 1835 transition count 2549
Reduce places removed 281 places and 0 transitions.
Performed 21 Post agglomeration using F-continuation condition.Transition count delta: 21
Iterating post reduction 1 with 302 rules applied. Total rules applied 588 place count 1554 transition count 2528
Reduce places removed 21 places and 0 transitions.
Iterating post reduction 2 with 21 rules applied. Total rules applied 609 place count 1533 transition count 2528
Performed 209 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 209 Pre rules applied. Total rules applied 609 place count 1533 transition count 2319
Deduced a syphon composed of 209 places in 4 ms
Ensure Unique test removed 71 places
Reduce places removed 280 places and 0 transitions.
Iterating global reduction 3 with 489 rules applied. Total rules applied 1098 place count 1253 transition count 2319
Discarding 3 places :
Implicit places reduction removed 3 places
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 3 with 12 rules applied. Total rules applied 1110 place count 1250 transition count 2310
Reduce places removed 9 places and 0 transitions.
Iterating post reduction 4 with 9 rules applied. Total rules applied 1119 place count 1241 transition count 2310
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 12 Pre rules applied. Total rules applied 1119 place count 1241 transition count 2298
Deduced a syphon composed of 12 places in 3 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 5 with 24 rules applied. Total rules applied 1143 place count 1229 transition count 2298
Discarding 3 places :
Symmetric choice reduction at 5 with 3 rule applications. Total rules 1146 place count 1226 transition count 2295
Iterating global reduction 5 with 3 rules applied. Total rules applied 1149 place count 1226 transition count 2295
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 5 with 1 rules applied. Total rules applied 1150 place count 1226 transition count 2294
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 1151 place count 1225 transition count 2294
Discarding 2 places :
Symmetric choice reduction at 7 with 2 rule applications. Total rules 1153 place count 1223 transition count 2292
Iterating global reduction 7 with 2 rules applied. Total rules applied 1155 place count 1223 transition count 2292
Performed 93 Post agglomeration using F-continuation condition.Transition count delta: 93
Deduced a syphon composed of 93 places in 3 ms
Ensure Unique test removed 1 places
Reduce places removed 94 places and 0 transitions.
Iterating global reduction 7 with 187 rules applied. Total rules applied 1342 place count 1129 transition count 2199
Discarding 1 places :
Symmetric choice reduction at 7 with 1 rule applications. Total rules 1343 place count 1128 transition count 2198
Iterating global reduction 7 with 1 rules applied. Total rules applied 1344 place count 1128 transition count 2198
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 7 with 1 rules applied. Total rules applied 1345 place count 1128 transition count 2197
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 1346 place count 1127 transition count 2197
Discarding 1 places :
Symmetric choice reduction at 9 with 1 rule applications. Total rules 1347 place count 1126 transition count 2196
Iterating global reduction 9 with 1 rules applied. Total rules applied 1348 place count 1126 transition count 2196
Free-agglomeration rule applied 2 times.
Iterating global reduction 9 with 2 rules applied. Total rules applied 1350 place count 1126 transition count 2194
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 9 with 2 rules applied. Total rules applied 1352 place count 1124 transition count 2194
Free-agglomeration rule (complex) applied 42 times.
Iterating global reduction 10 with 42 rules applied. Total rules applied 1394 place count 1124 transition count 2154
Ensure Unique test removed 1 places
Reduce places removed 43 places and 0 transitions.
Iterating post reduction 10 with 43 rules applied. Total rules applied 1437 place count 1081 transition count 2154
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 11 with 1 rules applied. Total rules applied 1438 place count 1081 transition count 2153
Partial Free-agglomeration rule applied 33 times.
Drop transitions removed 33 transitions
Iterating global reduction 11 with 33 rules applied. Total rules applied 1471 place count 1081 transition count 2153
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 11 with 2 rules applied. Total rules applied 1473 place count 1081 transition count 2153
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 11 with 1 rules applied. Total rules applied 1474 place count 1081 transition count 2152
Applied a total of 1474 rules in 749 ms. Remains 1081 /1840 variables (removed 759) and now considering 2152/2830 (removed 678) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 750 ms. Remains : 1081/1840 places, 2152/2830 transitions.
Incomplete random walk after 10000 steps, including 103 resets, run finished after 332 ms. (steps per millisecond=30 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 43) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 43) seen :0
Interrupted probabilistic random walk after 89715 steps, run timeout after 3001 ms. (steps per millisecond=29 ) properties seen :{2=1, 3=1, 10=1, 19=1, 37=1, 40=1, 41=1}
Probabilistic random walk after 89715 steps, saw 85184 distinct states, run finished after 3002 ms. (steps per millisecond=29 ) properties seen :7
Running SMT prover for 36 properties.
// Phase 1: matrix 2152 rows 1081 cols
[2023-03-09 06:06:35] [INFO ] Computed 183 place invariants in 20 ms
[2023-03-09 06:06:36] [INFO ] After 739ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:36
[2023-03-09 06:06:37] [INFO ] [Nat]Absence check using 43 positive place invariants in 24 ms returned sat
[2023-03-09 06:06:37] [INFO ] [Nat]Absence check using 43 positive and 140 generalized place invariants in 73 ms returned sat
[2023-03-09 06:07:01] [INFO ] After 22599ms SMT Verify possible using state equation in natural domain returned unsat :20 sat :14
[2023-03-09 06:07:01] [INFO ] State equation strengthened by 51 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-09 06:07:01] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-09 06:07:01] [INFO ] After 25038ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:36
Fused 36 Parikh solutions to 8 different solutions.
Parikh walk visited 0 properties in 387 ms.
Support contains 59 out of 1081 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1081/1081 places, 2152/2152 transitions.
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 0 with 9 rules applied. Total rules applied 9 place count 1081 transition count 2143
Reduce places removed 9 places and 0 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 18 place count 1072 transition count 2143
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 18 place count 1072 transition count 2141
Deduced a syphon composed of 2 places in 2 ms
Ensure Unique test removed 1 places
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 5 rules applied. Total rules applied 23 place count 1069 transition count 2141
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 23 place count 1069 transition count 2140
Deduced a syphon composed of 1 places in 7 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 25 place count 1068 transition count 2140
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 28 place count 1065 transition count 2120
Iterating global reduction 2 with 3 rules applied. Total rules applied 31 place count 1065 transition count 2120
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 2 with 3 rules applied. Total rules applied 34 place count 1062 transition count 2120
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 7 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 44 place count 1057 transition count 2115
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 46 place count 1055 transition count 2113
Iterating global reduction 3 with 2 rules applied. Total rules applied 48 place count 1055 transition count 2113
Free-agglomeration rule applied 4 times.
Iterating global reduction 3 with 4 rules applied. Total rules applied 52 place count 1055 transition count 2109
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 3 with 4 rules applied. Total rules applied 56 place count 1051 transition count 2109
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 4 with 1 rules applied. Total rules applied 57 place count 1051 transition count 2108
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 58 place count 1050 transition count 2108
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 59 place count 1050 transition count 2107
Partial Free-agglomeration rule applied 4 times.
Drop transitions removed 4 transitions
Iterating global reduction 5 with 4 rules applied. Total rules applied 63 place count 1050 transition count 2107
Applied a total of 63 rules in 323 ms. Remains 1050 /1081 variables (removed 31) and now considering 2107/2152 (removed 45) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 323 ms. Remains : 1050/1081 places, 2107/2152 transitions.
Incomplete random walk after 10000 steps, including 111 resets, run finished after 349 ms. (steps per millisecond=28 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 16) seen :0
Interrupted probabilistic random walk after 158664 steps, run timeout after 3001 ms. (steps per millisecond=52 ) properties seen :{}
Probabilistic random walk after 158664 steps, saw 54702 distinct states, run finished after 3002 ms. (steps per millisecond=52 ) properties seen :0
Running SMT prover for 16 properties.
// Phase 1: matrix 2107 rows 1050 cols
[2023-03-09 06:07:05] [INFO ] Computed 179 place invariants in 18 ms
[2023-03-09 06:07:06] [INFO ] After 510ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:16
[2023-03-09 06:07:06] [INFO ] [Nat]Absence check using 39 positive place invariants in 9 ms returned sat
[2023-03-09 06:07:06] [INFO ] [Nat]Absence check using 39 positive and 140 generalized place invariants in 38 ms returned sat
[2023-03-09 06:07:31] [INFO ] After 24285ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :12
[2023-03-09 06:07:31] [INFO ] State equation strengthened by 59 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-09 06:07:31] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-09 06:07:31] [INFO ] After 25022ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:16
Fused 16 Parikh solutions to 10 different solutions.
Parikh walk visited 2 properties in 374 ms.
Support contains 55 out of 1050 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1050/1050 places, 2107/2107 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 3 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 1049 transition count 2106
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 0 with 1 rules applied. Total rules applied 3 place count 1049 transition count 2105
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 4 place count 1048 transition count 2105
Applied a total of 4 rules in 81 ms. Remains 1048 /1050 variables (removed 2) and now considering 2105/2107 (removed 2) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 82 ms. Remains : 1048/1050 places, 2105/2107 transitions.
Incomplete random walk after 10000 steps, including 105 resets, run finished after 288 ms. (steps per millisecond=34 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 13 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 11 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10000 steps, including 12 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 12 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 11 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 12 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 48 ms. (steps per millisecond=208 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 12 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 12 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 11 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 13) seen :1
Incomplete Best-First random walk after 10001 steps, including 12 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 10 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 12) seen :0
Interrupted probabilistic random walk after 160217 steps, run timeout after 3001 ms. (steps per millisecond=53 ) properties seen :{}
Probabilistic random walk after 160217 steps, saw 55140 distinct states, run finished after 3001 ms. (steps per millisecond=53 ) properties seen :0
Running SMT prover for 12 properties.
// Phase 1: matrix 2105 rows 1048 cols
[2023-03-09 06:07:35] [INFO ] Computed 179 place invariants in 17 ms
[2023-03-09 06:07:36] [INFO ] After 245ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:12
[2023-03-09 06:07:36] [INFO ] [Nat]Absence check using 37 positive place invariants in 10 ms returned sat
[2023-03-09 06:07:36] [INFO ] [Nat]Absence check using 37 positive and 142 generalized place invariants in 64 ms returned sat
[2023-03-09 06:07:46] [INFO ] After 10057ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :7
[2023-03-09 06:07:46] [INFO ] State equation strengthened by 59 read => feed constraints.
[2023-03-09 06:07:50] [INFO ] After 3426ms SMT Verify possible using 59 Read/Feed constraints in natural domain returned unsat :5 sat :7
[2023-03-09 06:07:56] [INFO ] After 9646ms SMT Verify possible using trap constraints in natural domain returned unsat :5 sat :7
Attempting to minimize the solution found.
Minimization took 4607 ms.
[2023-03-09 06:08:01] [INFO ] After 25022ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :6
Fused 12 Parikh solutions to 7 different solutions.
Parikh walk visited 0 properties in 593 ms.
Support contains 39 out of 1048 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1048/1048 places, 2105/2105 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 1047 transition count 2099
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 1047 transition count 2099
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 1046 transition count 2099
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 3 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 1 with 6 rules applied. Total rules applied 9 place count 1043 transition count 2096
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 10 place count 1042 transition count 2095
Iterating global reduction 1 with 1 rules applied. Total rules applied 11 place count 1042 transition count 2095
Free-agglomeration rule applied 1 times.
Iterating global reduction 1 with 1 rules applied. Total rules applied 12 place count 1042 transition count 2094
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 13 place count 1041 transition count 2094
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 2 with 1 rules applied. Total rules applied 14 place count 1041 transition count 2093
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 15 place count 1040 transition count 2093
Partial Free-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 17 place count 1040 transition count 2093
Applied a total of 17 rules in 253 ms. Remains 1040 /1048 variables (removed 8) and now considering 2093/2105 (removed 12) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 253 ms. Remains : 1040/1048 places, 2093/2105 transitions.
Successfully simplified 40 atomic propositions for a total of 16 simplifications.
FORMULA ASLink-PT-09a-CTLFireability-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ASLink-PT-09a-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ASLink-PT-09a-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ASLink-PT-09a-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 06:08:02] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-09 06:08:02] [INFO ] Flatten gal took : 98 ms
FORMULA ASLink-PT-09a-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 06:08:02] [INFO ] Flatten gal took : 90 ms
[2023-03-09 06:08:02] [INFO ] Input system was already deterministic with 2830 transitions.
Support contains 60 out of 1840 places (down from 89) after GAL structural reductions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 2 places
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 321 transitions
Trivial Post-agglo rules discarded 321 transitions
Performed 321 trivial Post agglomeration. Transition count delta: 321
Iterating post reduction 0 with 325 rules applied. Total rules applied 325 place count 1834 transition count 2509
Reduce places removed 321 places and 0 transitions.
Iterating post reduction 1 with 321 rules applied. Total rules applied 646 place count 1513 transition count 2509
Performed 217 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 217 Pre rules applied. Total rules applied 646 place count 1513 transition count 2292
Deduced a syphon composed of 217 places in 3 ms
Ensure Unique test removed 76 places
Reduce places removed 293 places and 0 transitions.
Iterating global reduction 2 with 510 rules applied. Total rules applied 1156 place count 1220 transition count 2292
Discarding 5 places :
Implicit places reduction removed 5 places
Drop transitions removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 2 with 18 rules applied. Total rules applied 1174 place count 1215 transition count 2279
Reduce places removed 13 places and 0 transitions.
Iterating post reduction 3 with 13 rules applied. Total rules applied 1187 place count 1202 transition count 2279
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 16 Pre rules applied. Total rules applied 1187 place count 1202 transition count 2263
Deduced a syphon composed of 16 places in 3 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 4 with 32 rules applied. Total rules applied 1219 place count 1186 transition count 2263
Discarding 8 places :
Symmetric choice reduction at 4 with 8 rule applications. Total rules 1227 place count 1178 transition count 2227
Iterating global reduction 4 with 8 rules applied. Total rules applied 1235 place count 1178 transition count 2227
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 4 with 9 rules applied. Total rules applied 1244 place count 1174 transition count 2222
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 5 with 5 rules applied. Total rules applied 1249 place count 1169 transition count 2222
Discarding 3 places :
Symmetric choice reduction at 6 with 3 rule applications. Total rules 1252 place count 1166 transition count 2212
Iterating global reduction 6 with 3 rules applied. Total rules applied 1255 place count 1166 transition count 2212
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1256 place count 1165 transition count 2204
Iterating global reduction 6 with 1 rules applied. Total rules applied 1257 place count 1165 transition count 2204
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1258 place count 1164 transition count 2196
Iterating global reduction 6 with 1 rules applied. Total rules applied 1259 place count 1164 transition count 2196
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1260 place count 1163 transition count 2188
Iterating global reduction 6 with 1 rules applied. Total rules applied 1261 place count 1163 transition count 2188
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1262 place count 1162 transition count 2180
Iterating global reduction 6 with 1 rules applied. Total rules applied 1263 place count 1162 transition count 2180
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1264 place count 1161 transition count 2172
Iterating global reduction 6 with 1 rules applied. Total rules applied 1265 place count 1161 transition count 2172
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1266 place count 1160 transition count 2164
Iterating global reduction 6 with 1 rules applied. Total rules applied 1267 place count 1160 transition count 2164
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1268 place count 1159 transition count 2156
Iterating global reduction 6 with 1 rules applied. Total rules applied 1269 place count 1159 transition count 2156
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1270 place count 1158 transition count 2148
Iterating global reduction 6 with 1 rules applied. Total rules applied 1271 place count 1158 transition count 2148
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1272 place count 1157 transition count 2140
Iterating global reduction 6 with 1 rules applied. Total rules applied 1273 place count 1157 transition count 2140
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1274 place count 1156 transition count 2132
Iterating global reduction 6 with 1 rules applied. Total rules applied 1275 place count 1156 transition count 2132
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1276 place count 1155 transition count 2124
Iterating global reduction 6 with 1 rules applied. Total rules applied 1277 place count 1155 transition count 2124
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1278 place count 1154 transition count 2116
Iterating global reduction 6 with 1 rules applied. Total rules applied 1279 place count 1154 transition count 2116
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1280 place count 1153 transition count 2108
Iterating global reduction 6 with 1 rules applied. Total rules applied 1281 place count 1153 transition count 2108
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1282 place count 1152 transition count 2100
Iterating global reduction 6 with 1 rules applied. Total rules applied 1283 place count 1152 transition count 2100
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1284 place count 1151 transition count 2092
Iterating global reduction 6 with 1 rules applied. Total rules applied 1285 place count 1151 transition count 2092
Performed 60 Post agglomeration using F-continuation condition.Transition count delta: 60
Deduced a syphon composed of 60 places in 3 ms
Ensure Unique test removed 1 places
Reduce places removed 61 places and 0 transitions.
Iterating global reduction 6 with 121 rules applied. Total rules applied 1406 place count 1090 transition count 2032
Discarding 4 places :
Symmetric choice reduction at 6 with 4 rule applications. Total rules 1410 place count 1086 transition count 2028
Iterating global reduction 6 with 4 rules applied. Total rules applied 1414 place count 1086 transition count 2028
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 6 with 1 rules applied. Total rules applied 1415 place count 1086 transition count 2027
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 1416 place count 1085 transition count 2027
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1417 place count 1084 transition count 2026
Iterating global reduction 8 with 1 rules applied. Total rules applied 1418 place count 1084 transition count 2026
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 8 with 2 rules applied. Total rules applied 1420 place count 1084 transition count 2026
Applied a total of 1420 rules in 686 ms. Remains 1084 /1840 variables (removed 756) and now considering 2026/2830 (removed 804) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 686 ms. Remains : 1084/1840 places, 2026/2830 transitions.
[2023-03-09 06:08:03] [INFO ] Flatten gal took : 62 ms
[2023-03-09 06:08:03] [INFO ] Flatten gal took : 65 ms
[2023-03-09 06:08:03] [INFO ] Input system was already deterministic with 2026 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 2 places
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 1834 transition count 2830
Discarding 7 places :
Symmetric choice reduction at 1 with 7 rule applications. Total rules 13 place count 1827 transition count 2795
Iterating global reduction 1 with 7 rules applied. Total rules applied 20 place count 1827 transition count 2795
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 23 place count 1824 transition count 2785
Iterating global reduction 1 with 3 rules applied. Total rules applied 26 place count 1824 transition count 2785
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 29 place count 1821 transition count 2775
Iterating global reduction 1 with 3 rules applied. Total rules applied 32 place count 1821 transition count 2775
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 34 place count 1819 transition count 2766
Iterating global reduction 1 with 2 rules applied. Total rules applied 36 place count 1819 transition count 2766
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 38 place count 1817 transition count 2757
Iterating global reduction 1 with 2 rules applied. Total rules applied 40 place count 1817 transition count 2757
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 42 place count 1815 transition count 2748
Iterating global reduction 1 with 2 rules applied. Total rules applied 44 place count 1815 transition count 2748
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 46 place count 1813 transition count 2739
Iterating global reduction 1 with 2 rules applied. Total rules applied 48 place count 1813 transition count 2739
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 50 place count 1811 transition count 2730
Iterating global reduction 1 with 2 rules applied. Total rules applied 52 place count 1811 transition count 2730
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 53 place count 1810 transition count 2722
Iterating global reduction 1 with 1 rules applied. Total rules applied 54 place count 1810 transition count 2722
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 55 place count 1809 transition count 2714
Iterating global reduction 1 with 1 rules applied. Total rules applied 56 place count 1809 transition count 2714
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 57 place count 1808 transition count 2706
Iterating global reduction 1 with 1 rules applied. Total rules applied 58 place count 1808 transition count 2706
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 59 place count 1807 transition count 2698
Iterating global reduction 1 with 1 rules applied. Total rules applied 60 place count 1807 transition count 2698
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 61 place count 1806 transition count 2690
Iterating global reduction 1 with 1 rules applied. Total rules applied 62 place count 1806 transition count 2690
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 63 place count 1805 transition count 2682
Iterating global reduction 1 with 1 rules applied. Total rules applied 64 place count 1805 transition count 2682
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 65 place count 1804 transition count 2674
Iterating global reduction 1 with 1 rules applied. Total rules applied 66 place count 1804 transition count 2674
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 67 place count 1803 transition count 2666
Iterating global reduction 1 with 1 rules applied. Total rules applied 68 place count 1803 transition count 2666
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 69 place count 1802 transition count 2658
Iterating global reduction 1 with 1 rules applied. Total rules applied 70 place count 1802 transition count 2658
Applied a total of 70 rules in 954 ms. Remains 1802 /1840 variables (removed 38) and now considering 2658/2830 (removed 172) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 955 ms. Remains : 1802/1840 places, 2658/2830 transitions.
[2023-03-09 06:08:04] [INFO ] Flatten gal took : 69 ms
[2023-03-09 06:08:04] [INFO ] Flatten gal took : 77 ms
[2023-03-09 06:08:04] [INFO ] Input system was already deterministic with 2658 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 2 places
Reduce places removed 3 places and 1 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 320 transitions
Trivial Post-agglo rules discarded 320 transitions
Performed 320 trivial Post agglomeration. Transition count delta: 320
Iterating post reduction 0 with 324 rules applied. Total rules applied 324 place count 1833 transition count 2509
Reduce places removed 329 places and 0 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 1 with 334 rules applied. Total rules applied 658 place count 1504 transition count 2504
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 663 place count 1499 transition count 2504
Performed 238 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 238 Pre rules applied. Total rules applied 663 place count 1499 transition count 2266
Deduced a syphon composed of 238 places in 3 ms
Ensure Unique test removed 76 places
Reduce places removed 314 places and 0 transitions.
Iterating global reduction 3 with 552 rules applied. Total rules applied 1215 place count 1185 transition count 2266
Discarding 15 places :
Implicit places reduction removed 15 places
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 3 with 46 rules applied. Total rules applied 1261 place count 1170 transition count 2235
Reduce places removed 34 places and 0 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 4 with 36 rules applied. Total rules applied 1297 place count 1136 transition count 2233
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 1299 place count 1134 transition count 2233
Performed 31 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 31 Pre rules applied. Total rules applied 1299 place count 1134 transition count 2202
Deduced a syphon composed of 31 places in 3 ms
Reduce places removed 31 places and 0 transitions.
Iterating global reduction 6 with 62 rules applied. Total rules applied 1361 place count 1103 transition count 2202
Discarding 17 places :
Symmetric choice reduction at 6 with 17 rule applications. Total rules 1378 place count 1086 transition count 2157
Iterating global reduction 6 with 17 rules applied. Total rules applied 1395 place count 1086 transition count 2157
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 6 with 18 rules applied. Total rules applied 1413 place count 1082 transition count 2143
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 7 with 5 rules applied. Total rules applied 1418 place count 1077 transition count 2143
Discarding 3 places :
Symmetric choice reduction at 8 with 3 rule applications. Total rules 1421 place count 1074 transition count 2133
Iterating global reduction 8 with 3 rules applied. Total rules applied 1424 place count 1074 transition count 2133
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1425 place count 1073 transition count 2125
Iterating global reduction 8 with 1 rules applied. Total rules applied 1426 place count 1073 transition count 2125
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1427 place count 1072 transition count 2117
Iterating global reduction 8 with 1 rules applied. Total rules applied 1428 place count 1072 transition count 2117
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1429 place count 1071 transition count 2109
Iterating global reduction 8 with 1 rules applied. Total rules applied 1430 place count 1071 transition count 2109
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1431 place count 1070 transition count 2101
Iterating global reduction 8 with 1 rules applied. Total rules applied 1432 place count 1070 transition count 2101
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1433 place count 1069 transition count 2093
Iterating global reduction 8 with 1 rules applied. Total rules applied 1434 place count 1069 transition count 2093
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1435 place count 1068 transition count 2085
Iterating global reduction 8 with 1 rules applied. Total rules applied 1436 place count 1068 transition count 2085
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1437 place count 1067 transition count 2077
Iterating global reduction 8 with 1 rules applied. Total rules applied 1438 place count 1067 transition count 2077
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1439 place count 1066 transition count 2069
Iterating global reduction 8 with 1 rules applied. Total rules applied 1440 place count 1066 transition count 2069
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1441 place count 1065 transition count 2061
Iterating global reduction 8 with 1 rules applied. Total rules applied 1442 place count 1065 transition count 2061
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1443 place count 1064 transition count 2053
Iterating global reduction 8 with 1 rules applied. Total rules applied 1444 place count 1064 transition count 2053
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1445 place count 1063 transition count 2045
Iterating global reduction 8 with 1 rules applied. Total rules applied 1446 place count 1063 transition count 2045
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1447 place count 1062 transition count 2037
Iterating global reduction 8 with 1 rules applied. Total rules applied 1448 place count 1062 transition count 2037
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1449 place count 1061 transition count 2029
Iterating global reduction 8 with 1 rules applied. Total rules applied 1450 place count 1061 transition count 2029
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1451 place count 1060 transition count 2021
Iterating global reduction 8 with 1 rules applied. Total rules applied 1452 place count 1060 transition count 2021
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1453 place count 1059 transition count 2013
Iterating global reduction 8 with 1 rules applied. Total rules applied 1454 place count 1059 transition count 2013
Performed 52 Post agglomeration using F-continuation condition.Transition count delta: 52
Deduced a syphon composed of 52 places in 3 ms
Ensure Unique test removed 1 places
Reduce places removed 53 places and 0 transitions.
Iterating global reduction 8 with 105 rules applied. Total rules applied 1559 place count 1006 transition count 1961
Discarding 5 places :
Symmetric choice reduction at 8 with 5 rule applications. Total rules 1564 place count 1001 transition count 1956
Iterating global reduction 8 with 5 rules applied. Total rules applied 1569 place count 1001 transition count 1956
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 8 with 1 rules applied. Total rules applied 1570 place count 1001 transition count 1955
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 9 with 1 rules applied. Total rules applied 1571 place count 1000 transition count 1955
Discarding 1 places :
Symmetric choice reduction at 10 with 1 rule applications. Total rules 1572 place count 999 transition count 1954
Iterating global reduction 10 with 1 rules applied. Total rules applied 1573 place count 999 transition count 1954
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 10 with 1 rules applied. Total rules applied 1574 place count 999 transition count 1954
Discarding 1 places :
Symmetric choice reduction at 10 with 1 rule applications. Total rules 1575 place count 998 transition count 1953
Iterating global reduction 10 with 1 rules applied. Total rules applied 1576 place count 998 transition count 1953
Applied a total of 1576 rules in 758 ms. Remains 998 /1840 variables (removed 842) and now considering 1953/2830 (removed 877) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 770 ms. Remains : 998/1840 places, 1953/2830 transitions.
[2023-03-09 06:08:05] [INFO ] Flatten gal took : 56 ms
[2023-03-09 06:08:05] [INFO ] Flatten gal took : 60 ms
[2023-03-09 06:08:05] [INFO ] Input system was already deterministic with 1953 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 2 places
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 1834 transition count 2830
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 12 place count 1828 transition count 2796
Iterating global reduction 1 with 6 rules applied. Total rules applied 18 place count 1828 transition count 2796
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 20 place count 1826 transition count 2787
Iterating global reduction 1 with 2 rules applied. Total rules applied 22 place count 1826 transition count 2787
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 24 place count 1824 transition count 2778
Iterating global reduction 1 with 2 rules applied. Total rules applied 26 place count 1824 transition count 2778
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 27 place count 1823 transition count 2770
Iterating global reduction 1 with 1 rules applied. Total rules applied 28 place count 1823 transition count 2770
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 29 place count 1822 transition count 2762
Iterating global reduction 1 with 1 rules applied. Total rules applied 30 place count 1822 transition count 2762
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 31 place count 1821 transition count 2754
Iterating global reduction 1 with 1 rules applied. Total rules applied 32 place count 1821 transition count 2754
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 33 place count 1820 transition count 2746
Iterating global reduction 1 with 1 rules applied. Total rules applied 34 place count 1820 transition count 2746
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 35 place count 1819 transition count 2738
Iterating global reduction 1 with 1 rules applied. Total rules applied 36 place count 1819 transition count 2738
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 37 place count 1818 transition count 2730
Iterating global reduction 1 with 1 rules applied. Total rules applied 38 place count 1818 transition count 2730
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 39 place count 1817 transition count 2722
Iterating global reduction 1 with 1 rules applied. Total rules applied 40 place count 1817 transition count 2722
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 41 place count 1816 transition count 2714
Iterating global reduction 1 with 1 rules applied. Total rules applied 42 place count 1816 transition count 2714
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 43 place count 1815 transition count 2706
Iterating global reduction 1 with 1 rules applied. Total rules applied 44 place count 1815 transition count 2706
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 45 place count 1814 transition count 2698
Iterating global reduction 1 with 1 rules applied. Total rules applied 46 place count 1814 transition count 2698
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 47 place count 1813 transition count 2690
Iterating global reduction 1 with 1 rules applied. Total rules applied 48 place count 1813 transition count 2690
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 49 place count 1812 transition count 2682
Iterating global reduction 1 with 1 rules applied. Total rules applied 50 place count 1812 transition count 2682
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 51 place count 1811 transition count 2674
Iterating global reduction 1 with 1 rules applied. Total rules applied 52 place count 1811 transition count 2674
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 53 place count 1810 transition count 2666
Iterating global reduction 1 with 1 rules applied. Total rules applied 54 place count 1810 transition count 2666
Applied a total of 54 rules in 1123 ms. Remains 1810 /1840 variables (removed 30) and now considering 2666/2830 (removed 164) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1123 ms. Remains : 1810/1840 places, 2666/2830 transitions.
[2023-03-09 06:08:07] [INFO ] Flatten gal took : 70 ms
[2023-03-09 06:08:07] [INFO ] Flatten gal took : 78 ms
[2023-03-09 06:08:07] [INFO ] Input system was already deterministic with 2666 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 2 places
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 1834 transition count 2830
Discarding 7 places :
Symmetric choice reduction at 1 with 7 rule applications. Total rules 13 place count 1827 transition count 2795
Iterating global reduction 1 with 7 rules applied. Total rules applied 20 place count 1827 transition count 2795
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 23 place count 1824 transition count 2785
Iterating global reduction 1 with 3 rules applied. Total rules applied 26 place count 1824 transition count 2785
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 29 place count 1821 transition count 2775
Iterating global reduction 1 with 3 rules applied. Total rules applied 32 place count 1821 transition count 2775
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 34 place count 1819 transition count 2766
Iterating global reduction 1 with 2 rules applied. Total rules applied 36 place count 1819 transition count 2766
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 38 place count 1817 transition count 2757
Iterating global reduction 1 with 2 rules applied. Total rules applied 40 place count 1817 transition count 2757
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 42 place count 1815 transition count 2748
Iterating global reduction 1 with 2 rules applied. Total rules applied 44 place count 1815 transition count 2748
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 46 place count 1813 transition count 2739
Iterating global reduction 1 with 2 rules applied. Total rules applied 48 place count 1813 transition count 2739
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 50 place count 1811 transition count 2730
Iterating global reduction 1 with 2 rules applied. Total rules applied 52 place count 1811 transition count 2730
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 53 place count 1810 transition count 2722
Iterating global reduction 1 with 1 rules applied. Total rules applied 54 place count 1810 transition count 2722
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 55 place count 1809 transition count 2714
Iterating global reduction 1 with 1 rules applied. Total rules applied 56 place count 1809 transition count 2714
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 57 place count 1808 transition count 2706
Iterating global reduction 1 with 1 rules applied. Total rules applied 58 place count 1808 transition count 2706
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 59 place count 1807 transition count 2698
Iterating global reduction 1 with 1 rules applied. Total rules applied 60 place count 1807 transition count 2698
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 61 place count 1806 transition count 2690
Iterating global reduction 1 with 1 rules applied. Total rules applied 62 place count 1806 transition count 2690
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 63 place count 1805 transition count 2682
Iterating global reduction 1 with 1 rules applied. Total rules applied 64 place count 1805 transition count 2682
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 65 place count 1804 transition count 2674
Iterating global reduction 1 with 1 rules applied. Total rules applied 66 place count 1804 transition count 2674
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 67 place count 1803 transition count 2666
Iterating global reduction 1 with 1 rules applied. Total rules applied 68 place count 1803 transition count 2666
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 69 place count 1802 transition count 2658
Iterating global reduction 1 with 1 rules applied. Total rules applied 70 place count 1802 transition count 2658
Applied a total of 70 rules in 997 ms. Remains 1802 /1840 variables (removed 38) and now considering 2658/2830 (removed 172) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 997 ms. Remains : 1802/1840 places, 2658/2830 transitions.
[2023-03-09 06:08:08] [INFO ] Flatten gal took : 64 ms
[2023-03-09 06:08:08] [INFO ] Flatten gal took : 68 ms
[2023-03-09 06:08:08] [INFO ] Input system was already deterministic with 2658 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 2 places
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 320 transitions
Trivial Post-agglo rules discarded 320 transitions
Performed 320 trivial Post agglomeration. Transition count delta: 320
Iterating post reduction 0 with 324 rules applied. Total rules applied 324 place count 1834 transition count 2510
Reduce places removed 320 places and 0 transitions.
Iterating post reduction 1 with 320 rules applied. Total rules applied 644 place count 1514 transition count 2510
Performed 217 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 217 Pre rules applied. Total rules applied 644 place count 1514 transition count 2293
Deduced a syphon composed of 217 places in 3 ms
Ensure Unique test removed 76 places
Reduce places removed 293 places and 0 transitions.
Iterating global reduction 2 with 510 rules applied. Total rules applied 1154 place count 1221 transition count 2293
Discarding 5 places :
Implicit places reduction removed 5 places
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 2 with 14 rules applied. Total rules applied 1168 place count 1216 transition count 2284
Reduce places removed 9 places and 0 transitions.
Iterating post reduction 3 with 9 rules applied. Total rules applied 1177 place count 1207 transition count 2284
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 16 Pre rules applied. Total rules applied 1177 place count 1207 transition count 2268
Deduced a syphon composed of 16 places in 4 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 4 with 32 rules applied. Total rules applied 1209 place count 1191 transition count 2268
Discarding 8 places :
Symmetric choice reduction at 4 with 8 rule applications. Total rules 1217 place count 1183 transition count 2232
Iterating global reduction 4 with 8 rules applied. Total rules applied 1225 place count 1183 transition count 2232
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 4 with 9 rules applied. Total rules applied 1234 place count 1179 transition count 2227
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 5 with 5 rules applied. Total rules applied 1239 place count 1174 transition count 2227
Discarding 3 places :
Symmetric choice reduction at 6 with 3 rule applications. Total rules 1242 place count 1171 transition count 2217
Iterating global reduction 6 with 3 rules applied. Total rules applied 1245 place count 1171 transition count 2217
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1246 place count 1170 transition count 2209
Iterating global reduction 6 with 1 rules applied. Total rules applied 1247 place count 1170 transition count 2209
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1248 place count 1169 transition count 2201
Iterating global reduction 6 with 1 rules applied. Total rules applied 1249 place count 1169 transition count 2201
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1250 place count 1168 transition count 2193
Iterating global reduction 6 with 1 rules applied. Total rules applied 1251 place count 1168 transition count 2193
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1252 place count 1167 transition count 2185
Iterating global reduction 6 with 1 rules applied. Total rules applied 1253 place count 1167 transition count 2185
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1254 place count 1166 transition count 2177
Iterating global reduction 6 with 1 rules applied. Total rules applied 1255 place count 1166 transition count 2177
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1256 place count 1165 transition count 2169
Iterating global reduction 6 with 1 rules applied. Total rules applied 1257 place count 1165 transition count 2169
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1258 place count 1164 transition count 2161
Iterating global reduction 6 with 1 rules applied. Total rules applied 1259 place count 1164 transition count 2161
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1260 place count 1163 transition count 2153
Iterating global reduction 6 with 1 rules applied. Total rules applied 1261 place count 1163 transition count 2153
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1262 place count 1162 transition count 2145
Iterating global reduction 6 with 1 rules applied. Total rules applied 1263 place count 1162 transition count 2145
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1264 place count 1161 transition count 2137
Iterating global reduction 6 with 1 rules applied. Total rules applied 1265 place count 1161 transition count 2137
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1266 place count 1160 transition count 2129
Iterating global reduction 6 with 1 rules applied. Total rules applied 1267 place count 1160 transition count 2129
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1268 place count 1159 transition count 2121
Iterating global reduction 6 with 1 rules applied. Total rules applied 1269 place count 1159 transition count 2121
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1270 place count 1158 transition count 2113
Iterating global reduction 6 with 1 rules applied. Total rules applied 1271 place count 1158 transition count 2113
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1272 place count 1157 transition count 2105
Iterating global reduction 6 with 1 rules applied. Total rules applied 1273 place count 1157 transition count 2105
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 1274 place count 1156 transition count 2097
Iterating global reduction 6 with 1 rules applied. Total rules applied 1275 place count 1156 transition count 2097
Performed 62 Post agglomeration using F-continuation condition.Transition count delta: 62
Deduced a syphon composed of 62 places in 2 ms
Ensure Unique test removed 1 places
Reduce places removed 63 places and 0 transitions.
Iterating global reduction 6 with 125 rules applied. Total rules applied 1400 place count 1093 transition count 2035
Discarding 5 places :
Symmetric choice reduction at 6 with 5 rule applications. Total rules 1405 place count 1088 transition count 2030
Iterating global reduction 6 with 5 rules applied. Total rules applied 1410 place count 1088 transition count 2030
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 6 with 1 rules applied. Total rules applied 1411 place count 1088 transition count 2029
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 1412 place count 1087 transition count 2029
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1413 place count 1086 transition count 2028
Iterating global reduction 8 with 1 rules applied. Total rules applied 1414 place count 1086 transition count 2028
Applied a total of 1414 rules in 673 ms. Remains 1086 /1840 variables (removed 754) and now considering 2028/2830 (removed 802) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 673 ms. Remains : 1086/1840 places, 2028/2830 transitions.
[2023-03-09 06:08:09] [INFO ] Flatten gal took : 59 ms
[2023-03-09 06:08:09] [INFO ] Flatten gal took : 68 ms
[2023-03-09 06:08:09] [INFO ] Input system was already deterministic with 2028 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 2 places
Reduce places removed 3 places and 1 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 320 transitions
Trivial Post-agglo rules discarded 320 transitions
Performed 320 trivial Post agglomeration. Transition count delta: 320
Iterating post reduction 0 with 324 rules applied. Total rules applied 324 place count 1833 transition count 2509
Reduce places removed 329 places and 0 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 1 with 334 rules applied. Total rules applied 658 place count 1504 transition count 2504
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 663 place count 1499 transition count 2504
Performed 239 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 239 Pre rules applied. Total rules applied 663 place count 1499 transition count 2265
Deduced a syphon composed of 239 places in 2 ms
Ensure Unique test removed 76 places
Reduce places removed 315 places and 0 transitions.
Iterating global reduction 3 with 554 rules applied. Total rules applied 1217 place count 1184 transition count 2265
Discarding 15 places :
Implicit places reduction removed 15 places
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 3 with 46 rules applied. Total rules applied 1263 place count 1169 transition count 2234
Reduce places removed 34 places and 0 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 4 with 36 rules applied. Total rules applied 1299 place count 1135 transition count 2232
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 1301 place count 1133 transition count 2232
Performed 31 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 31 Pre rules applied. Total rules applied 1301 place count 1133 transition count 2201
Deduced a syphon composed of 31 places in 3 ms
Reduce places removed 31 places and 0 transitions.
Iterating global reduction 6 with 62 rules applied. Total rules applied 1363 place count 1102 transition count 2201
Discarding 16 places :
Symmetric choice reduction at 6 with 16 rule applications. Total rules 1379 place count 1086 transition count 2157
Iterating global reduction 6 with 16 rules applied. Total rules applied 1395 place count 1086 transition count 2157
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 6 with 18 rules applied. Total rules applied 1413 place count 1082 transition count 2143
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 7 with 5 rules applied. Total rules applied 1418 place count 1077 transition count 2143
Discarding 2 places :
Symmetric choice reduction at 8 with 2 rule applications. Total rules 1420 place count 1075 transition count 2134
Iterating global reduction 8 with 2 rules applied. Total rules applied 1422 place count 1075 transition count 2134
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1423 place count 1074 transition count 2126
Iterating global reduction 8 with 1 rules applied. Total rules applied 1424 place count 1074 transition count 2126
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1425 place count 1073 transition count 2118
Iterating global reduction 8 with 1 rules applied. Total rules applied 1426 place count 1073 transition count 2118
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1427 place count 1072 transition count 2110
Iterating global reduction 8 with 1 rules applied. Total rules applied 1428 place count 1072 transition count 2110
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1429 place count 1071 transition count 2102
Iterating global reduction 8 with 1 rules applied. Total rules applied 1430 place count 1071 transition count 2102
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1431 place count 1070 transition count 2094
Iterating global reduction 8 with 1 rules applied. Total rules applied 1432 place count 1070 transition count 2094
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1433 place count 1069 transition count 2086
Iterating global reduction 8 with 1 rules applied. Total rules applied 1434 place count 1069 transition count 2086
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1435 place count 1068 transition count 2078
Iterating global reduction 8 with 1 rules applied. Total rules applied 1436 place count 1068 transition count 2078
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1437 place count 1067 transition count 2070
Iterating global reduction 8 with 1 rules applied. Total rules applied 1438 place count 1067 transition count 2070
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1439 place count 1066 transition count 2062
Iterating global reduction 8 with 1 rules applied. Total rules applied 1440 place count 1066 transition count 2062
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1441 place count 1065 transition count 2054
Iterating global reduction 8 with 1 rules applied. Total rules applied 1442 place count 1065 transition count 2054
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1443 place count 1064 transition count 2046
Iterating global reduction 8 with 1 rules applied. Total rules applied 1444 place count 1064 transition count 2046
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1445 place count 1063 transition count 2038
Iterating global reduction 8 with 1 rules applied. Total rules applied 1446 place count 1063 transition count 2038
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1447 place count 1062 transition count 2030
Iterating global reduction 8 with 1 rules applied. Total rules applied 1448 place count 1062 transition count 2030
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1449 place count 1061 transition count 2022
Iterating global reduction 8 with 1 rules applied. Total rules applied 1450 place count 1061 transition count 2022
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 1451 place count 1060 transition count 2014
Iterating global reduction 8 with 1 rules applied. Total rules applied 1452 place count 1060 transition count 2014
Performed 52 Post agglomeration using F-continuation condition.Transition count delta: 52
Deduced a syphon composed of 52 places in 3 ms
Reduce places removed 52 places and 0 transitions.
Iterating global reduction 8 with 104 rules applied. Total rules applied 1556 place count 1008 transition count 1962
Discarding 5 places :
Symmetric choice reduction at 8 with 5 rule applications. Total rules 1561 place count 1003 transition count 1957
Iterating global reduction 8 with 5 rules applied. Total rules applied 1566 place count 1003 transition count 1957
Applied a total of 1566 rules in 551 ms. Remains 1003 /1840 variables (removed 837) and now considering 1957/2830 (removed 873) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 551 ms. Remains : 1003/1840 places, 1957/2830 transitions.
[2023-03-09 06:08:10] [INFO ] Flatten gal took : 55 ms
[2023-03-09 06:08:10] [INFO ] Flatten gal took : 60 ms
[2023-03-09 06:08:10] [INFO ] Input system was already deterministic with 1957 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 2 places
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 1834 transition count 2830
Discarding 7 places :
Symmetric choice reduction at 1 with 7 rule applications. Total rules 13 place count 1827 transition count 2795
Iterating global reduction 1 with 7 rules applied. Total rules applied 20 place count 1827 transition count 2795
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 23 place count 1824 transition count 2785
Iterating global reduction 1 with 3 rules applied. Total rules applied 26 place count 1824 transition count 2785
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 29 place count 1821 transition count 2775
Iterating global reduction 1 with 3 rules applied. Total rules applied 32 place count 1821 transition count 2775
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 34 place count 1819 transition count 2766
Iterating global reduction 1 with 2 rules applied. Total rules applied 36 place count 1819 transition count 2766
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 38 place count 1817 transition count 2757
Iterating global reduction 1 with 2 rules applied. Total rules applied 40 place count 1817 transition count 2757
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 42 place count 1815 transition count 2748
Iterating global reduction 1 with 2 rules applied. Total rules applied 44 place count 1815 transition count 2748
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 46 place count 1813 transition count 2739
Iterating global reduction 1 with 2 rules applied. Total rules applied 48 place count 1813 transition count 2739
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 50 place count 1811 transition count 2730
Iterating global reduction 1 with 2 rules applied. Total rules applied 52 place count 1811 transition count 2730
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 53 place count 1810 transition count 2722
Iterating global reduction 1 with 1 rules applied. Total rules applied 54 place count 1810 transition count 2722
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 55 place count 1809 transition count 2714
Iterating global reduction 1 with 1 rules applied. Total rules applied 56 place count 1809 transition count 2714
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 57 place count 1808 transition count 2706
Iterating global reduction 1 with 1 rules applied. Total rules applied 58 place count 1808 transition count 2706
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 59 place count 1807 transition count 2698
Iterating global reduction 1 with 1 rules applied. Total rules applied 60 place count 1807 transition count 2698
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 61 place count 1806 transition count 2690
Iterating global reduction 1 with 1 rules applied. Total rules applied 62 place count 1806 transition count 2690
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 63 place count 1805 transition count 2682
Iterating global reduction 1 with 1 rules applied. Total rules applied 64 place count 1805 transition count 2682
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 65 place count 1804 transition count 2674
Iterating global reduction 1 with 1 rules applied. Total rules applied 66 place count 1804 transition count 2674
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 67 place count 1803 transition count 2666
Iterating global reduction 1 with 1 rules applied. Total rules applied 68 place count 1803 transition count 2666
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 69 place count 1802 transition count 2658
Iterating global reduction 1 with 1 rules applied. Total rules applied 70 place count 1802 transition count 2658
Applied a total of 70 rules in 1021 ms. Remains 1802 /1840 variables (removed 38) and now considering 2658/2830 (removed 172) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1022 ms. Remains : 1802/1840 places, 2658/2830 transitions.
[2023-03-09 06:08:11] [INFO ] Flatten gal took : 71 ms
[2023-03-09 06:08:11] [INFO ] Flatten gal took : 83 ms
[2023-03-09 06:08:11] [INFO ] Input system was already deterministic with 2658 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 2 places
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 1834 transition count 2830
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 12 place count 1828 transition count 2801
Iterating global reduction 1 with 6 rules applied. Total rules applied 18 place count 1828 transition count 2801
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 21 place count 1825 transition count 2791
Iterating global reduction 1 with 3 rules applied. Total rules applied 24 place count 1825 transition count 2791
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 27 place count 1822 transition count 2781
Iterating global reduction 1 with 3 rules applied. Total rules applied 30 place count 1822 transition count 2781
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 32 place count 1820 transition count 2772
Iterating global reduction 1 with 2 rules applied. Total rules applied 34 place count 1820 transition count 2772
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 36 place count 1818 transition count 2763
Iterating global reduction 1 with 2 rules applied. Total rules applied 38 place count 1818 transition count 2763
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 40 place count 1816 transition count 2754
Iterating global reduction 1 with 2 rules applied. Total rules applied 42 place count 1816 transition count 2754
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 44 place count 1814 transition count 2745
Iterating global reduction 1 with 2 rules applied. Total rules applied 46 place count 1814 transition count 2745
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 48 place count 1812 transition count 2736
Iterating global reduction 1 with 2 rules applied. Total rules applied 50 place count 1812 transition count 2736
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 51 place count 1811 transition count 2728
Iterating global reduction 1 with 1 rules applied. Total rules applied 52 place count 1811 transition count 2728
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 53 place count 1810 transition count 2720
Iterating global reduction 1 with 1 rules applied. Total rules applied 54 place count 1810 transition count 2720
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 55 place count 1809 transition count 2712
Iterating global reduction 1 with 1 rules applied. Total rules applied 56 place count 1809 transition count 2712
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 57 place count 1808 transition count 2704
Iterating global reduction 1 with 1 rules applied. Total rules applied 58 place count 1808 transition count 2704
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 59 place count 1807 transition count 2696
Iterating global reduction 1 with 1 rules applied. Total rules applied 60 place count 1807 transition count 2696
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 61 place count 1806 transition count 2688
Iterating global reduction 1 with 1 rules applied. Total rules applied 62 place count 1806 transition count 2688
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 63 place count 1805 transition count 2680
Iterating global reduction 1 with 1 rules applied. Total rules applied 64 place count 1805 transition count 2680
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 65 place count 1804 transition count 2672
Iterating global reduction 1 with 1 rules applied. Total rules applied 66 place count 1804 transition count 2672
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 67 place count 1803 transition count 2664
Iterating global reduction 1 with 1 rules applied. Total rules applied 68 place count 1803 transition count 2664
Applied a total of 68 rules in 1098 ms. Remains 1803 /1840 variables (removed 37) and now considering 2664/2830 (removed 166) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1099 ms. Remains : 1803/1840 places, 2664/2830 transitions.
[2023-03-09 06:08:12] [INFO ] Flatten gal took : 68 ms
[2023-03-09 06:08:13] [INFO ] Flatten gal took : 75 ms
[2023-03-09 06:08:13] [INFO ] Input system was already deterministic with 2664 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 1 places
Reduce places removed 2 places and 1 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Drop transitions removed 317 transitions
Trivial Post-agglo rules discarded 317 transitions
Performed 317 trivial Post agglomeration. Transition count delta: 317
Iterating post reduction 0 with 320 rules applied. Total rules applied 320 place count 1835 transition count 2512
Reduce places removed 325 places and 0 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 329 rules applied. Total rules applied 649 place count 1510 transition count 2508
Reduce places removed 4 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 5 rules applied. Total rules applied 654 place count 1506 transition count 2507
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 655 place count 1505 transition count 2507
Performed 235 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 235 Pre rules applied. Total rules applied 655 place count 1505 transition count 2272
Deduced a syphon composed of 235 places in 3 ms
Ensure Unique test removed 75 places
Reduce places removed 310 places and 0 transitions.
Iterating global reduction 4 with 545 rules applied. Total rules applied 1200 place count 1195 transition count 2272
Discarding 13 places :
Implicit places reduction removed 13 places
Drop transitions removed 29 transitions
Trivial Post-agglo rules discarded 29 transitions
Performed 29 trivial Post agglomeration. Transition count delta: 29
Iterating post reduction 4 with 42 rules applied. Total rules applied 1242 place count 1182 transition count 2243
Reduce places removed 32 places and 0 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 5 with 34 rules applied. Total rules applied 1276 place count 1150 transition count 2241
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 6 with 2 rules applied. Total rules applied 1278 place count 1148 transition count 2241
Performed 30 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 7 with 30 Pre rules applied. Total rules applied 1278 place count 1148 transition count 2211
Deduced a syphon composed of 30 places in 3 ms
Reduce places removed 30 places and 0 transitions.
Iterating global reduction 7 with 60 rules applied. Total rules applied 1338 place count 1118 transition count 2211
Discarding 15 places :
Symmetric choice reduction at 7 with 15 rule applications. Total rules 1353 place count 1103 transition count 2176
Iterating global reduction 7 with 15 rules applied. Total rules applied 1368 place count 1103 transition count 2176
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 7 with 13 rules applied. Total rules applied 1381 place count 1099 transition count 2167
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 1382 place count 1098 transition count 2167
Discarding 2 places :
Symmetric choice reduction at 9 with 2 rule applications. Total rules 1384 place count 1096 transition count 2165
Iterating global reduction 9 with 2 rules applied. Total rules applied 1386 place count 1096 transition count 2165
Performed 55 Post agglomeration using F-continuation condition.Transition count delta: 55
Deduced a syphon composed of 55 places in 3 ms
Ensure Unique test removed 1 places
Reduce places removed 56 places and 0 transitions.
Iterating global reduction 9 with 111 rules applied. Total rules applied 1497 place count 1040 transition count 2110
Discarding 5 places :
Symmetric choice reduction at 9 with 5 rule applications. Total rules 1502 place count 1035 transition count 2105
Iterating global reduction 9 with 5 rules applied. Total rules applied 1507 place count 1035 transition count 2105
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 9 with 1 rules applied. Total rules applied 1508 place count 1035 transition count 2104
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 10 with 1 rules applied. Total rules applied 1509 place count 1034 transition count 2104
Discarding 1 places :
Symmetric choice reduction at 11 with 1 rule applications. Total rules 1510 place count 1033 transition count 2103
Iterating global reduction 11 with 1 rules applied. Total rules applied 1511 place count 1033 transition count 2103
Applied a total of 1511 rules in 237 ms. Remains 1033 /1840 variables (removed 807) and now considering 2103/2830 (removed 727) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 237 ms. Remains : 1033/1840 places, 2103/2830 transitions.
[2023-03-09 06:08:13] [INFO ] Flatten gal took : 53 ms
[2023-03-09 06:08:13] [INFO ] Flatten gal took : 57 ms
[2023-03-09 06:08:13] [INFO ] Input system was already deterministic with 2103 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1840/1840 places, 2830/2830 transitions.
Ensure Unique test removed 2 places
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 1835 transition count 2830
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 11 place count 1829 transition count 2801
Iterating global reduction 1 with 6 rules applied. Total rules applied 17 place count 1829 transition count 2801
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 20 place count 1826 transition count 2791
Iterating global reduction 1 with 3 rules applied. Total rules applied 23 place count 1826 transition count 2791
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 26 place count 1823 transition count 2781
Iterating global reduction 1 with 3 rules applied. Total rules applied 29 place count 1823 transition count 2781
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 31 place count 1821 transition count 2772
Iterating global reduction 1 with 2 rules applied. Total rules applied 33 place count 1821 transition count 2772
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 35 place count 1819 transition count 2763
Iterating global reduction 1 with 2 rules applied. Total rules applied 37 place count 1819 transition count 2763
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 39 place count 1817 transition count 2754
Iterating global reduction 1 with 2 rules applied. Total rules applied 41 place count 1817 transition count 2754
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 43 place count 1815 transition count 2745
Iterating global reduction 1 with 2 rules applied. Total rules applied 45 place count 1815 transition count 2745
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 47 place count 1813 transition count 2736
Iterating global reduction 1 with 2 rules applied. Total rules applied 49 place count 1813 transition count 2736
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 50 place count 1812 transition count 2728
Iterating global reduction 1 with 1 rules applied. Total rules applied 51 place count 1812 transition count 2728
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 52 place count 1811 transition count 2720
Iterating global reduction 1 with 1 rules applied. Total rules applied 53 place count 1811 transition count 2720
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 54 place count 1810 transition count 2712
Iterating global reduction 1 with 1 rules applied. Total rules applied 55 place count 1810 transition count 2712
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 56 place count 1809 transition count 2704
Iterating global reduction 1 with 1 rules applied. Total rules applied 57 place count 1809 transition count 2704
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 58 place count 1808 transition count 2696
Iterating global reduction 1 with 1 rules applied. Total rules applied 59 place count 1808 transition count 2696
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 60 place count 1807 transition count 2688
Iterating global reduction 1 with 1 rules applied. Total rules applied 61 place count 1807 transition count 2688
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 62 place count 1806 transition count 2680
Iterating global reduction 1 with 1 rules applied. Total rules applied 63 place count 1806 transition count 2680
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 64 place count 1805 transition count 2672
Iterating global reduction 1 with 1 rules applied. Total rules applied 65 place count 1805 transition count 2672
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 66 place count 1804 transition count 2664
Iterating global reduction 1 with 1 rules applied. Total rules applied 67 place count 1804 transition count 2664
Applied a total of 67 rules in 1030 ms. Remains 1804 /1840 variables (removed 36) and now considering 2664/2830 (removed 166) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1030 ms. Remains : 1804/1840 places, 2664/2830 transitions.
[2023-03-09 06:08:14] [INFO ] Flatten gal took : 67 ms
[2023-03-09 06:08:14] [INFO ] Flatten gal took : 73 ms
[2023-03-09 06:08:15] [INFO ] Input system was already deterministic with 2664 transitions.
[2023-03-09 06:08:15] [INFO ] Flatten gal took : 74 ms
[2023-03-09 06:08:15] [INFO ] Flatten gal took : 79 ms
[2023-03-09 06:08:15] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-09 06:08:15] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1840 places, 2830 transitions and 10043 arcs took 17 ms.
Total runtime 139601 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ASLink-PT-09a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/380
CTLFireability

FORMULA ASLink-PT-09a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ASLink-PT-09a-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ASLink-PT-09a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ASLink-PT-09a-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ASLink-PT-09a-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ASLink-PT-09a-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678342674409

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/380/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/380/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/380/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 37 (type EXCL) for 0 ASLink-PT-09a-CTLFireability-00
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:742
lola: LAUNCH task # 38 (type FNDP) for 15 ASLink-PT-09a-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 39 (type EQUN) for 15 ASLink-PT-09a-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 41 (type SRCH) for 15 ASLink-PT-09a-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 37 (type EXCL) for ASLink-PT-09a-CTLFireability-00
lola: result : false
lola: markings : 1
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 15 ASLink-PT-09a-CTLFireability-06
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 38 (type FNDP) for ASLink-PT-09a-CTLFireability-06
lola: result : true
lola: fired transitions : 7035
lola: tried executions : 77
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 39 (type EQUN) for ASLink-PT-09a-CTLFireability-06 (obsolete)
lola: CANCELED task # 40 (type EXCL) for ASLink-PT-09a-CTLFireability-06 (obsolete)
lola: CANCELED task # 41 (type SRCH) for ASLink-PT-09a-CTLFireability-06 (obsolete)
lola: LAUNCH task # 23 (type EXCL) for 22 ASLink-PT-09a-CTLFireability-07
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type SRCH) for ASLink-PT-09a-CTLFireability-06
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/380/CTLFireability-39.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 39 (type EQUN) for ASLink-PT-09a-CTLFireability-06
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 EFAGEF EXCL 3/399 2/32 ASLink-PT-09a-CTLFireability-07 233727 m, 46745 m/sec, 255789 t fired, .

Time elapsed: 8 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 EFAGEF EXCL 8/399 5/32 ASLink-PT-09a-CTLFireability-07 589656 m, 71185 m/sec, 675075 t fired, .

Time elapsed: 13 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 EFAGEF EXCL 13/399 8/32 ASLink-PT-09a-CTLFireability-07 1019739 m, 86016 m/sec, 1182692 t fired, .

Time elapsed: 18 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 EFAGEF EXCL 18/399 11/32 ASLink-PT-09a-CTLFireability-07 1471526 m, 90357 m/sec, 1724137 t fired, .

Time elapsed: 23 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 EFAGEF EXCL 23/399 13/32 ASLink-PT-09a-CTLFireability-07 1868912 m, 79477 m/sec, 2207190 t fired, .

Time elapsed: 28 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 EFAGEF EXCL 28/399 16/32 ASLink-PT-09a-CTLFireability-07 2273557 m, 80929 m/sec, 2685539 t fired, .

Time elapsed: 33 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 EFAGEF EXCL 33/399 19/32 ASLink-PT-09a-CTLFireability-07 2630293 m, 71347 m/sec, 3085125 t fired, .

Time elapsed: 38 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 EFAGEF EXCL 38/399 21/32 ASLink-PT-09a-CTLFireability-07 2966056 m, 67152 m/sec, 3482124 t fired, .

Time elapsed: 43 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 EFAGEF EXCL 43/399 24/32 ASLink-PT-09a-CTLFireability-07 3391465 m, 85081 m/sec, 3983291 t fired, .

Time elapsed: 48 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 EFAGEF EXCL 48/399 27/32 ASLink-PT-09a-CTLFireability-07 3825632 m, 86833 m/sec, 4498346 t fired, .

Time elapsed: 53 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 EFAGEF EXCL 53/399 30/32 ASLink-PT-09a-CTLFireability-07 4241923 m, 83258 m/sec, 4998847 t fired, .

Time elapsed: 58 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 11
lola: CANCELED task # 23 (type EXCL) for ASLink-PT-09a-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 63 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 35 (type EXCL) for 34 ASLink-PT-09a-CTLFireability-14
lola: time limit : 442 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 5/442 2/32 ASLink-PT-09a-CTLFireability-14 189025 m, 37805 m/sec, 568855 t fired, .

Time elapsed: 68 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 10/442 5/32 ASLink-PT-09a-CTLFireability-14 447813 m, 51757 m/sec, 1095521 t fired, .

Time elapsed: 73 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 15/442 7/32 ASLink-PT-09a-CTLFireability-14 691787 m, 48794 m/sec, 1618736 t fired, .

Time elapsed: 78 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 20/442 9/32 ASLink-PT-09a-CTLFireability-14 903019 m, 42246 m/sec, 2151773 t fired, .

Time elapsed: 83 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 25/442 12/32 ASLink-PT-09a-CTLFireability-14 1193570 m, 58110 m/sec, 2663905 t fired, .

Time elapsed: 88 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 30/442 14/32 ASLink-PT-09a-CTLFireability-14 1409938 m, 43273 m/sec, 3196589 t fired, .

Time elapsed: 93 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 35/442 16/32 ASLink-PT-09a-CTLFireability-14 1636513 m, 45315 m/sec, 3722523 t fired, .

Time elapsed: 98 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 40/442 18/32 ASLink-PT-09a-CTLFireability-14 1868929 m, 46483 m/sec, 4248281 t fired, .

Time elapsed: 103 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 45/442 20/32 ASLink-PT-09a-CTLFireability-14 2065664 m, 39347 m/sec, 4789012 t fired, .

Time elapsed: 108 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 50/442 21/32 ASLink-PT-09a-CTLFireability-14 2271340 m, 41135 m/sec, 5323245 t fired, .

Time elapsed: 113 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 55/442 23/32 ASLink-PT-09a-CTLFireability-14 2476035 m, 40939 m/sec, 5863032 t fired, .

Time elapsed: 118 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 60/442 25/32 ASLink-PT-09a-CTLFireability-14 2679888 m, 40770 m/sec, 6395108 t fired, .

Time elapsed: 123 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 65/442 27/32 ASLink-PT-09a-CTLFireability-14 2915060 m, 47034 m/sec, 6918722 t fired, .

Time elapsed: 128 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 70/442 29/32 ASLink-PT-09a-CTLFireability-14 3162210 m, 49430 m/sec, 7445979 t fired, .

Time elapsed: 133 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 75/442 31/32 ASLink-PT-09a-CTLFireability-14 3389966 m, 45551 m/sec, 7977042 t fired, .

Time elapsed: 138 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: CANCELED task # 35 (type EXCL) for ASLink-PT-09a-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 143 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 26 (type EXCL) for 25 ASLink-PT-09a-CTLFireability-08
lola: time limit : 493 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for ASLink-PT-09a-CTLFireability-08
lola: result : false
lola: markings : 715
lola: fired transitions : 1439
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 ASLink-PT-09a-CTLFireability-05
lola: time limit : 576 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/576 2/32 ASLink-PT-09a-CTLFireability-05 123924 m, 24784 m/sec, 594446 t fired, .

Time elapsed: 148 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/576 3/32 ASLink-PT-09a-CTLFireability-05 235055 m, 22226 m/sec, 1196165 t fired, .

Time elapsed: 153 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/576 4/32 ASLink-PT-09a-CTLFireability-05 356849 m, 24358 m/sec, 1798834 t fired, .

Time elapsed: 158 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 20/576 5/32 ASLink-PT-09a-CTLFireability-05 462867 m, 21203 m/sec, 2399772 t fired, .

Time elapsed: 163 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 25/576 6/32 ASLink-PT-09a-CTLFireability-05 565322 m, 20491 m/sec, 3004212 t fired, .

Time elapsed: 168 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 30/576 6/32 ASLink-PT-09a-CTLFireability-05 665841 m, 20103 m/sec, 3607732 t fired, .

Time elapsed: 173 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 35/576 7/32 ASLink-PT-09a-CTLFireability-05 765743 m, 19980 m/sec, 4208190 t fired, .

Time elapsed: 178 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 40/576 9/32 ASLink-PT-09a-CTLFireability-05 936042 m, 34059 m/sec, 4772907 t fired, .

Time elapsed: 183 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 45/576 10/32 ASLink-PT-09a-CTLFireability-05 1128532 m, 38498 m/sec, 5325296 t fired, .

Time elapsed: 188 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 50/576 12/32 ASLink-PT-09a-CTLFireability-05 1301526 m, 34598 m/sec, 5877120 t fired, .

Time elapsed: 193 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 55/576 14/32 ASLink-PT-09a-CTLFireability-05 1455551 m, 30805 m/sec, 6421989 t fired, .

Time elapsed: 198 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 60/576 16/32 ASLink-PT-09a-CTLFireability-05 1656557 m, 40201 m/sec, 6964814 t fired, .

Time elapsed: 203 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 65/576 17/32 ASLink-PT-09a-CTLFireability-05 1838270 m, 36342 m/sec, 7514874 t fired, .

Time elapsed: 208 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 70/576 19/32 ASLink-PT-09a-CTLFireability-05 2005299 m, 33405 m/sec, 8068344 t fired, .

Time elapsed: 213 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 75/576 20/32 ASLink-PT-09a-CTLFireability-05 2165042 m, 31948 m/sec, 8622708 t fired, .

Time elapsed: 218 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 80/576 21/32 ASLink-PT-09a-CTLFireability-05 2339088 m, 34809 m/sec, 9169095 t fired, .

Time elapsed: 223 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 85/576 23/32 ASLink-PT-09a-CTLFireability-05 2506898 m, 33562 m/sec, 9717582 t fired, .

Time elapsed: 228 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 90/576 24/32 ASLink-PT-09a-CTLFireability-05 2670345 m, 32689 m/sec, 10264344 t fired, .

Time elapsed: 233 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 95/576 26/32 ASLink-PT-09a-CTLFireability-05 2837004 m, 33331 m/sec, 10810423 t fired, .

Time elapsed: 238 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 100/576 27/32 ASLink-PT-09a-CTLFireability-05 2995487 m, 31696 m/sec, 11362534 t fired, .

Time elapsed: 243 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 105/576 29/32 ASLink-PT-09a-CTLFireability-05 3142390 m, 29380 m/sec, 11918129 t fired, .

Time elapsed: 248 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 111/576 30/32 ASLink-PT-09a-CTLFireability-05 3305118 m, 32545 m/sec, 12468989 t fired, .

Time elapsed: 254 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 116/576 31/32 ASLink-PT-09a-CTLFireability-05 3477838 m, 34544 m/sec, 13016672 t fired, .

Time elapsed: 259 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: CANCELED task # 13 (type EXCL) for ASLink-PT-09a-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 264 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 10 (type EXCL) for 9 ASLink-PT-09a-CTLFireability-04
lola: time limit : 667 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/667 1/32 ASLink-PT-09a-CTLFireability-04 99195 m, 19839 m/sec, 518414 t fired, .

Time elapsed: 269 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/667 2/32 ASLink-PT-09a-CTLFireability-04 197447 m, 19650 m/sec, 1040837 t fired, .

Time elapsed: 274 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 15/667 3/32 ASLink-PT-09a-CTLFireability-04 294365 m, 19383 m/sec, 1562723 t fired, .

Time elapsed: 279 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 20/667 4/32 ASLink-PT-09a-CTLFireability-04 386694 m, 18465 m/sec, 2087805 t fired, .

Time elapsed: 284 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 25/667 5/32 ASLink-PT-09a-CTLFireability-04 480019 m, 18665 m/sec, 2610945 t fired, .

Time elapsed: 289 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 30/667 6/32 ASLink-PT-09a-CTLFireability-04 573460 m, 18688 m/sec, 3133382 t fired, .

Time elapsed: 294 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 35/667 6/32 ASLink-PT-09a-CTLFireability-04 665514 m, 18410 m/sec, 3657931 t fired, .

Time elapsed: 299 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 40/667 7/32 ASLink-PT-09a-CTLFireability-04 761995 m, 19296 m/sec, 4177628 t fired, .

Time elapsed: 304 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 45/667 8/32 ASLink-PT-09a-CTLFireability-04 853849 m, 18370 m/sec, 4693241 t fired, .

Time elapsed: 309 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 50/667 9/32 ASLink-PT-09a-CTLFireability-04 933510 m, 15932 m/sec, 5215661 t fired, .

Time elapsed: 314 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 55/667 10/32 ASLink-PT-09a-CTLFireability-04 1021418 m, 17581 m/sec, 5736725 t fired, .

Time elapsed: 319 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 60/667 11/32 ASLink-PT-09a-CTLFireability-04 1114485 m, 18613 m/sec, 6253256 t fired, .

Time elapsed: 324 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 65/667 11/32 ASLink-PT-09a-CTLFireability-04 1211479 m, 19398 m/sec, 6765025 t fired, .

Time elapsed: 329 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 70/667 12/32 ASLink-PT-09a-CTLFireability-04 1300873 m, 17878 m/sec, 7282889 t fired, .

Time elapsed: 334 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 75/667 13/32 ASLink-PT-09a-CTLFireability-04 1398366 m, 19498 m/sec, 7798545 t fired, .

Time elapsed: 339 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 80/667 14/32 ASLink-PT-09a-CTLFireability-04 1489499 m, 18226 m/sec, 8318067 t fired, .

Time elapsed: 344 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 85/667 15/32 ASLink-PT-09a-CTLFireability-04 1583914 m, 18883 m/sec, 8838470 t fired, .

Time elapsed: 349 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 90/667 15/32 ASLink-PT-09a-CTLFireability-04 1665450 m, 16307 m/sec, 9374273 t fired, .

Time elapsed: 354 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 95/667 16/32 ASLink-PT-09a-CTLFireability-04 1757671 m, 18444 m/sec, 9884574 t fired, .

Time elapsed: 359 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 100/667 17/32 ASLink-PT-09a-CTLFireability-04 1829841 m, 14434 m/sec, 10405331 t fired, .

Time elapsed: 364 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 105/667 18/32 ASLink-PT-09a-CTLFireability-04 1895231 m, 13078 m/sec, 10930310 t fired, .

Time elapsed: 369 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 110/667 19/32 ASLink-PT-09a-CTLFireability-04 1957930 m, 12539 m/sec, 11457070 t fired, .

Time elapsed: 374 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 115/667 19/32 ASLink-PT-09a-CTLFireability-04 2039840 m, 16382 m/sec, 11978202 t fired, .

Time elapsed: 379 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 120/667 20/32 ASLink-PT-09a-CTLFireability-04 2121858 m, 16403 m/sec, 12495221 t fired, .

Time elapsed: 384 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 125/667 21/32 ASLink-PT-09a-CTLFireability-04 2184762 m, 12580 m/sec, 13011565 t fired, .

Time elapsed: 389 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 130/667 21/32 ASLink-PT-09a-CTLFireability-04 2244213 m, 11890 m/sec, 13528897 t fired, .

Time elapsed: 394 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 135/667 22/32 ASLink-PT-09a-CTLFireability-04 2301289 m, 11415 m/sec, 14048729 t fired, .

Time elapsed: 399 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 140/667 22/32 ASLink-PT-09a-CTLFireability-04 2358395 m, 11421 m/sec, 14568623 t fired, .

Time elapsed: 404 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 145/667 23/32 ASLink-PT-09a-CTLFireability-04 2416438 m, 11608 m/sec, 15086485 t fired, .

Time elapsed: 409 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 150/667 24/32 ASLink-PT-09a-CTLFireability-04 2501963 m, 17105 m/sec, 15596605 t fired, .

Time elapsed: 414 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 155/667 24/32 ASLink-PT-09a-CTLFireability-04 2570127 m, 13632 m/sec, 16120588 t fired, .

Time elapsed: 419 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 160/667 25/32 ASLink-PT-09a-CTLFireability-04 2633538 m, 12682 m/sec, 16647358 t fired, .

Time elapsed: 424 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 165/667 26/32 ASLink-PT-09a-CTLFireability-04 2707182 m, 14728 m/sec, 17163777 t fired, .

Time elapsed: 429 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 170/667 26/32 ASLink-PT-09a-CTLFireability-04 2769735 m, 12510 m/sec, 17677791 t fired, .

Time elapsed: 434 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 175/667 27/32 ASLink-PT-09a-CTLFireability-04 2828879 m, 11828 m/sec, 18193636 t fired, .

Time elapsed: 439 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 180/667 27/32 ASLink-PT-09a-CTLFireability-04 2885737 m, 11371 m/sec, 18710940 t fired, .

Time elapsed: 444 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 185/667 28/32 ASLink-PT-09a-CTLFireability-04 2942448 m, 11342 m/sec, 19227289 t fired, .

Time elapsed: 449 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 190/667 28/32 ASLink-PT-09a-CTLFireability-04 3000186 m, 11547 m/sec, 19742790 t fired, .

Time elapsed: 454 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 195/667 29/32 ASLink-PT-09a-CTLFireability-04 3066485 m, 13259 m/sec, 20253232 t fired, .

Time elapsed: 459 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 200/667 29/32 ASLink-PT-09a-CTLFireability-04 3123546 m, 11412 m/sec, 20767744 t fired, .

Time elapsed: 464 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 205/667 30/32 ASLink-PT-09a-CTLFireability-04 3178384 m, 10967 m/sec, 21284206 t fired, .

Time elapsed: 469 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 210/667 30/32 ASLink-PT-09a-CTLFireability-04 3233130 m, 10949 m/sec, 21798875 t fired, .

Time elapsed: 474 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 215/667 31/32 ASLink-PT-09a-CTLFireability-04 3283421 m, 10058 m/sec, 22316983 t fired, .

Time elapsed: 479 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 220/667 31/32 ASLink-PT-09a-CTLFireability-04 3335247 m, 10365 m/sec, 22833722 t fired, .

Time elapsed: 484 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 225/667 32/32 ASLink-PT-09a-CTLFireability-04 3387413 m, 10433 m/sec, 23349979 t fired, .

Time elapsed: 489 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 230/667 32/32 ASLink-PT-09a-CTLFireability-04 3437304 m, 9978 m/sec, 23868614 t fired, .

Time elapsed: 494 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: CANCELED task # 10 (type EXCL) for ASLink-PT-09a-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 499 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 4 (type EXCL) for 3 ASLink-PT-09a-CTLFireability-02
lola: time limit : 775 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/775 2/32 ASLink-PT-09a-CTLFireability-02 190004 m, 38000 m/sec, 571580 t fired, .

Time elapsed: 504 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/775 5/32 ASLink-PT-09a-CTLFireability-02 449929 m, 51985 m/sec, 1101218 t fired, .

Time elapsed: 509 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/775 7/32 ASLink-PT-09a-CTLFireability-02 693637 m, 48741 m/sec, 1626126 t fired, .

Time elapsed: 514 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/775 9/32 ASLink-PT-09a-CTLFireability-02 907565 m, 42785 m/sec, 2158947 t fired, .

Time elapsed: 519 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 25/775 12/32 ASLink-PT-09a-CTLFireability-02 1196544 m, 57795 m/sec, 2672052 t fired, .

Time elapsed: 524 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 30/775 14/32 ASLink-PT-09a-CTLFireability-02 1412511 m, 43193 m/sec, 3205744 t fired, .

Time elapsed: 529 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 35/775 16/32 ASLink-PT-09a-CTLFireability-02 1639062 m, 45310 m/sec, 3731791 t fired, .

Time elapsed: 534 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 40/775 18/32 ASLink-PT-09a-CTLFireability-02 1871398 m, 46467 m/sec, 4257530 t fired, .

Time elapsed: 539 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 45/775 20/32 ASLink-PT-09a-CTLFireability-02 2070466 m, 39813 m/sec, 4796970 t fired, .

Time elapsed: 544 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 50/775 21/32 ASLink-PT-09a-CTLFireability-02 2274781 m, 40863 m/sec, 5334227 t fired, .

Time elapsed: 549 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 55/775 23/32 ASLink-PT-09a-CTLFireability-02 2479234 m, 40890 m/sec, 5874377 t fired, .

Time elapsed: 554 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 60/775 25/32 ASLink-PT-09a-CTLFireability-02 2686651 m, 41483 m/sec, 6407414 t fired, .

Time elapsed: 559 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 65/775 27/32 ASLink-PT-09a-CTLFireability-02 2919597 m, 46589 m/sec, 6932907 t fired, .

Time elapsed: 564 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 70/775 29/32 ASLink-PT-09a-CTLFireability-02 3165713 m, 49223 m/sec, 7451871 t fired, .

Time elapsed: 569 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 75/775 31/32 ASLink-PT-09a-CTLFireability-02 3390745 m, 45006 m/sec, 7979608 t fired, .

Time elapsed: 574 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: CANCELED task # 4 (type EXCL) for ASLink-PT-09a-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ASLink-PT-09a-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-03: F 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
ASLink-PT-09a-CTLFireability-10: SP ACTL 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-13: AGEF 0 1 0 0 1 0 0 0
ASLink-PT-09a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 579 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 42 (type EXCL) for 6 ASLink-PT-09a-CTLFireability-03
lola: time limit : 1007 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for ASLink-PT-09a-CTLFireability-03
lola: result : true
lola: markings : 35
lola: fired transitions : 34
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 ASLink-PT-09a-CTLFireability-13
lola: time limit : 1510 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for ASLink-PT-09a-CTLFireability-13
lola: result : false
lola: markings : 521
lola: fired transitions : 520
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 28 ASLink-PT-09a-CTLFireability-10
lola: time limit : 3021 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for ASLink-PT-09a-CTLFireability-10
lola: result : false
lola: markings : 4122
lola: fired transitions : 4186
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 11

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ASLink-PT-09a-CTLFireability-00: F true state space / EG
ASLink-PT-09a-CTLFireability-02: CTL unknown AGGR
ASLink-PT-09a-CTLFireability-03: F false state space / EG
ASLink-PT-09a-CTLFireability-04: CTL unknown AGGR
ASLink-PT-09a-CTLFireability-05: CTL unknown AGGR
ASLink-PT-09a-CTLFireability-06: DISJ true findpath
ASLink-PT-09a-CTLFireability-07: EFAGEF unknown AGGR
ASLink-PT-09a-CTLFireability-08: CTL false CTL model checker
ASLink-PT-09a-CTLFireability-10: SP ACTL false LTL model checker
ASLink-PT-09a-CTLFireability-13: AGEF false tscc_search
ASLink-PT-09a-CTLFireability-14: CTL unknown AGGR


Time elapsed: 579 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ASLink-PT-09a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ASLink-PT-09a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595100138"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ASLink-PT-09a.tgz
mv ASLink-PT-09a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;