Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813594900006.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ARMCacheCoherence-PT-none, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813594900006
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 6.6K Feb 25 21:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 25 21:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 25 21:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 21:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:28 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:28 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:28 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 21:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 163K Feb 25 21:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 25 21:46 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 21:46 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 14M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-00
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-01
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-02
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-03
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-04
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-05
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-06
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-07
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-08
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-09
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-10
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-11
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-12
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-13
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-14
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678334340320

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ARMCacheCoherence-PT-none
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 03:59:03] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 03:59:03] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 03:59:05] [INFO ] Load time of PNML (sax parser for PT used): 940 ms
[2023-03-09 03:59:05] [INFO ] Transformed 87 places.
[2023-03-09 03:59:05] [INFO ] Transformed 33676 transitions.
[2023-03-09 03:59:05] [INFO ] Found NUPN structural information;
[2023-03-09 03:59:05] [INFO ] Parsed PT model containing 87 places and 33676 transitions and 246935 arcs in 1424 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 34 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 32425 transitions
Reduce redundant transitions removed 32425 transitions.
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 4 resets, run finished after 592 ms. (steps per millisecond=16 ) properties (out of 10) seen :3
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 4 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 96 ms. (steps per millisecond=104 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 7) seen :1
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Running SMT prover for 6 properties.
[2023-03-09 03:59:06] [INFO ] Flow matrix only has 500 transitions (discarded 751 similar events)
// Phase 1: matrix 500 rows 87 cols
[2023-03-09 03:59:06] [INFO ] Computed 12 place invariants in 17 ms
[2023-03-09 03:59:07] [INFO ] After 378ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:6
[2023-03-09 03:59:07] [INFO ] [Nat]Absence check using 12 positive place invariants in 28 ms returned sat
[2023-03-09 03:59:07] [INFO ] After 373ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :1
[2023-03-09 03:59:07] [INFO ] State equation strengthened by 181 read => feed constraints.
[2023-03-09 03:59:07] [INFO ] After 155ms SMT Verify possible using 181 Read/Feed constraints in natural domain returned unsat :5 sat :1
[2023-03-09 03:59:07] [INFO ] After 236ms SMT Verify possible using trap constraints in natural domain returned unsat :5 sat :1
Attempting to minimize the solution found.
Minimization took 57 ms.
[2023-03-09 03:59:08] [INFO ] After 855ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :1
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-07 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 6 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 7 ms.
Support contains 11 out of 87 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 87/87 places, 1251/1251 transitions.
Graph (trivial) has 49 edges and 87 vertex of which 6 / 87 are part of one of the 3 SCC in 5 ms
Free SCC test removed 3 places
Drop transitions removed 25 transitions
Reduce isomorphic transitions removed 25 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 7 place count 78 transition count 1220
Iterating global reduction 0 with 6 rules applied. Total rules applied 13 place count 78 transition count 1220
Performed 12 Post agglomeration using F-continuation condition with reduction of 42 identical transitions.
Deduced a syphon composed of 12 places in 1 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 0 with 24 rules applied. Total rules applied 37 place count 66 transition count 1166
Drop transitions removed 1 transitions
Ensure Unique test removed 364 transitions
Reduce isomorphic transitions removed 365 transitions.
Iterating post reduction 0 with 365 rules applied. Total rules applied 402 place count 66 transition count 801
Drop transitions removed 156 transitions
Redundant transition composition rules discarded 156 transitions
Iterating global reduction 1 with 156 rules applied. Total rules applied 558 place count 66 transition count 645
Free-agglomeration rule applied 9 times.
Iterating global reduction 1 with 9 rules applied. Total rules applied 567 place count 66 transition count 636
Reduce places removed 9 places and 0 transitions.
Drop transitions removed 1 transitions
Ensure Unique test removed 65 transitions
Reduce isomorphic transitions removed 66 transitions.
Iterating post reduction 1 with 75 rules applied. Total rules applied 642 place count 57 transition count 570
Drop transitions removed 40 transitions
Redundant transition composition rules discarded 40 transitions
Iterating global reduction 2 with 40 rules applied. Total rules applied 682 place count 57 transition count 530
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 683 place count 56 transition count 529
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 103 transitions
Reduce isomorphic transitions removed 103 transitions.
Iterating post reduction 2 with 105 rules applied. Total rules applied 788 place count 54 transition count 426
Drop transitions removed 202 transitions
Redundant transition composition rules discarded 202 transitions
Iterating global reduction 3 with 202 rules applied. Total rules applied 990 place count 54 transition count 224
Free-agglomeration rule applied 7 times.
Iterating global reduction 3 with 7 rules applied. Total rules applied 997 place count 54 transition count 217
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 3 with 7 rules applied. Total rules applied 1004 place count 47 transition count 217
Partial Free-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 4 with 1 rules applied. Total rules applied 1005 place count 47 transition count 217
Applied a total of 1005 rules in 434 ms. Remains 47 /87 variables (removed 40) and now considering 217/1251 (removed 1034) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 435 ms. Remains : 47/87 places, 217/1251 transitions.
Finished random walk after 4724 steps, including 1 resets, run visited all 1 properties in 15 ms. (steps per millisecond=314 )
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
All properties solved without resorting to model-checking.
Total runtime 4623 ms.
starting LoLA
BK_INPUT ARMCacheCoherence-PT-none
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393220 kB
MemFree: 10122440 kB
After kill :
MemTotal: 16393220 kB
MemFree: 16056044 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 12 ARMCacheCoherence-PT-none-ReachabilityCardinality-04
lola: time limit : 148 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 12 ARMCacheCoherence-PT-none-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 12 ARMCacheCoherence-PT-none-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SRCH) for 12 ARMCacheCoherence-PT-none-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 50 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 49 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 52 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 53 (type EXCL) for ARMCacheCoherence-PT-none-ReachabilityCardinality-04 (obsolete)
lola: FINISHED task # 49 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 1814
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 19 (type CNST) for 18 ARMCacheCoherence-PT-none-ReachabilityCardinality-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 19 (type CNST) for ARMCacheCoherence-PT-none-ReachabilityCardinality-06
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 66 (type EXCL) for 42 ARMCacheCoherence-PT-none-ReachabilityCardinality-14
lola: time limit : 237 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 69 (type FNDP) for 30 ARMCacheCoherence-PT-none-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN) for 30 ARMCacheCoherence-PT-none-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SRCH) for 30 ARMCacheCoherence-PT-none-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 69 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-10
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 70 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 72 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 120 (type FNDP) for 39 ARMCacheCoherence-PT-none-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type EQUN) for 39 ARMCacheCoherence-PT-none-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 123 (type SRCH) for 39 ARMCacheCoherence-PT-none-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 120 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 344
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 121 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 123 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 93 (type FNDP) for 45 ARMCacheCoherence-PT-none-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type EQUN) for 45 ARMCacheCoherence-PT-none-ReachabilityCardinality-15
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lola: LAUNCH task # 96 (type SRCH) for 45 ARMCacheCoherence-PT-none-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-121.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-94.sara.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG 0 2 3 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 2/297 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 13035 m, 2607 m/sec, 50872 t fired, .
93 EF FNDP 2/222 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-15 40351 t fired, 110 attempts, .
94 EF STEQ 2/222 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-15 sara is running.
96 EF SRCH 2/222 1/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-15 28106 m, 5621 m/sec, 51322 t fired, .

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lola: FINISHED task # 93 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 72856
lola: tried executions : 192
lola: time used : 4.000000
lola: memory pages used : 0
lola: CANCELED task # 94 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 96 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 84 (type FNDP) for 36 ARMCacheCoherence-PT-none-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type EQUN) for 36 ARMCacheCoherence-PT-none-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 107 (type SRCH) for 36 ARMCacheCoherence-PT-none-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 94 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-15
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-105.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-12: AG 0 2 3 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 7/324 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 40275 m, 5448 m/sec, 161313 t fired, .
84 EF FNDP 3/237 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 66372 t fired, 124 attempts, .
105 EF STEQ 3/237 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 3/254 1/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 68357 m, 13671 m/sec, 139152 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-12: AG 0 2 3 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 12/324 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 72527 m, 6450 m/sec, 285707 t fired, .
84 EF FNDP 8/234 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 163532 t fired, 342 attempts, .
105 EF STEQ 8/234 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 8/251 1/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 162550 m, 18838 m/sec, 348221 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-12: AG 0 2 3 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 17/324 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 106393 m, 6773 m/sec, 420347 t fired, .
84 EF FNDP 13/229 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 266803 t fired, 613 attempts, .
105 EF STEQ 13/229 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 13/246 1/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 242879 m, 16065 m/sec, 532842 t fired, .

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sara: warning, failure of lp_solve (at job 1226)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-12: AG 0 2 3 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 22/324 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 140931 m, 6907 m/sec, 558325 t fired, .
84 EF FNDP 18/224 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 373954 t fired, 931 attempts, .
105 EF STEQ 18/224 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 18/241 2/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 340401 m, 19504 m/sec, 765758 t fired, .

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lola: FINISHED task # 121 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-13
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-12: AG 0 2 3 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 27/324 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 184041 m, 8622 m/sec, 734066 t fired, .
84 EF FNDP 23/217 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 484670 t fired, 1247 attempts, .
105 EF STEQ 23/217 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 23/234 2/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 436187 m, 19157 m/sec, 1001611 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-12: AG 0 2 3 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 32/324 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 228068 m, 8805 m/sec, 914188 t fired, .
84 EF FNDP 28/214 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 598970 t fired, 1622 attempts, .
105 EF STEQ 28/214 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 28/231 2/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 544179 m, 21598 m/sec, 1276983 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-12: AG 0 2 3 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 37/324 2/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 274246 m, 9235 m/sec, 1102739 t fired, .
84 EF FNDP 33/209 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 716503 t fired, 1981 attempts, .
105 EF STEQ 33/209 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 33/226 3/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 651162 m, 21396 m/sec, 1550608 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 42/324 2/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 319546 m, 9060 m/sec, 1290995 t fired, .
84 EF FNDP 38/204 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 832158 t fired, 2414 attempts, .
105 EF STEQ 38/204 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 38/221 3/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 758346 m, 21436 m/sec, 1827830 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 47/324 2/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 369544 m, 9999 m/sec, 1496645 t fired, .
84 EF FNDP 43/199 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 948671 t fired, 2858 attempts, .
105 EF STEQ 43/199 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 43/216 3/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 865889 m, 21508 m/sec, 2113996 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
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ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 52/324 2/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 422937 m, 10678 m/sec, 1720016 t fired, .
84 EF FNDP 48/194 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1066929 t fired, 3284 attempts, .
105 EF STEQ 48/194 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 48/211 4/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 961192 m, 19060 m/sec, 2369995 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
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ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 57/324 2/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 473203 m, 10053 m/sec, 1933452 t fired, .
84 EF FNDP 53/189 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1186028 t fired, 3712 attempts, .
105 EF STEQ 53/189 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 53/206 4/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1061538 m, 20069 m/sec, 2644886 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
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ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 62/324 3/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 526749 m, 10709 m/sec, 2164763 t fired, .
84 EF FNDP 58/184 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1307573 t fired, 4205 attempts, .
105 EF STEQ 58/184 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 58/201 5/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1167737 m, 21239 m/sec, 2943392 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
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ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 67/324 3/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 576385 m, 9927 m/sec, 2385220 t fired, .
84 EF FNDP 63/179 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1421572 t fired, 4695 attempts, .
105 EF STEQ 63/179 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 63/196 5/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1274346 m, 21321 m/sec, 3243502 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
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ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 72/324 3/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 628509 m, 10424 m/sec, 2617091 t fired, .
84 EF FNDP 68/174 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1536761 t fired, 5159 attempts, .
105 EF STEQ 68/174 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.
107 EF SRCH 68/191 5/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1383412 m, 21813 m/sec, 3556534 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
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ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 77/324 3/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 689976 m, 12293 m/sec, 2936076 t fired, .
84 EF FNDP 73/169 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1661860 t fired, 5671 attempts, .
105 EF STEQ 73/169 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.

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ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
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ARMCacheCoherence-PT-none-ReachabilityCardinality-12: AG 0 2 2 0 1 0 1 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 EF FNDP 5/232 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-08 109178 t fired, 33 attempts, .
66 EF EXCL 82/324 3/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 748056 m, 11616 m/sec, 3228104 t fired, .
84 EF FNDP 78/181 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1777362 t fired, 6119 attempts, .
105 EF STEQ 78/181 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.

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57 EF FNDP 10/227 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-08 232771 t fired, 126 attempts, .
66 EF EXCL 87/324 4/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 808850 m, 12158 m/sec, 3534270 t fired, .
84 EF FNDP 83/176 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1874967 t fired, 6551 attempts, .
105 EF STEQ 83/176 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 EF FNDP 15/222 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-08 341381 t fired, 229 attempts, .
66 EF EXCL 92/324 4/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 869312 m, 12092 m/sec, 3855738 t fired, .
84 EF FNDP 88/171 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 1982606 t fired, 6977 attempts, .
105 EF STEQ 88/171 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.

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84 EF FNDP 93/166 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 2091632 t fired, 7436 attempts, .
105 EF STEQ 93/166 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.

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ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
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105 EF STEQ 98/161 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.

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ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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84 EF FNDP 103/156 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 2315821 t fired, 8359 attempts, .
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ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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84 EF FNDP 113/146 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 2537141 t fired, 9253 attempts, .
105 EF STEQ 113/146 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.

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ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
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57 EF FNDP 45/192 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-08 1012274 t fired, 1043 attempts, .
66 EF EXCL 122/324 5/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 1239912 m, 11959 m/sec, 6053404 t fired, .
84 EF FNDP 118/141 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 2649232 t fired, 9700 attempts, .
105 EF STEQ 118/141 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 sara is running.

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ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
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57 EF FNDP 50/187 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-08 1140484 t fired, 1233 attempts, .
66 EF EXCL 127/324 5/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 1304022 m, 12822 m/sec, 6471800 t fired, .
84 EF FNDP 123/136 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 2748615 t fired, 10122 attempts, .
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ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
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57 EF FNDP 55/182 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-08 1263621 t fired, 1396 attempts, .
66 EF EXCL 132/324 6/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-14 1367153 m, 12626 m/sec, 6871990 t fired, .
84 EF FNDP 128/131 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 2862841 t fired, 10570 attempts, .
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lola: FINISHED task # 141 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 139 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 99 (type FNDP) for 15 ARMCacheCoherence-PT-none-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 100 (type EQUN) for 15 ARMCacheCoherence-PT-none-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 139 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 1838
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 99 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 100 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 83 (type FNDP) for 21 ARMCacheCoherence-PT-none-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type EQUN) for 21 ARMCacheCoherence-PT-none-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-100.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-88.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 88 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 83 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 113 (type FNDP) for 33 ARMCacheCoherence-PT-none-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type EQUN) for 33 ARMCacheCoherence-PT-none-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

lola: FINISHED task # 83 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 3923
lola: tried executions : 14
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 100 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-05
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-114.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 114 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-11
lola: result : false
lola: CANCELED task # 113 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 132 (type SRCH) for 36 ARMCacheCoherence-PT-none-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type EQUN) for 24 ARMCacheCoherence-PT-none-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 113 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 1969
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 132 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 62 (type FNDP) for 42 ARMCacheCoherence-PT-none-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 62 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 66 (type EXCL) for ARMCacheCoherence-PT-none-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 111 (type EXCL) for 24 ARMCacheCoherence-PT-none-ReachabilityCardinality-08
lola: time limit : 1714 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 110 (type SRCH) for 24 ARMCacheCoherence-PT-none-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-60.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF true findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 EF FNDP 65/3429 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-08 1489144 t fired, 1802 attempts, .
60 EF STEQ 3/3429 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-08 sara is running.
110 EF SRCH 3/1714 1/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-08 72134 m, 14426 m/sec, 147972 t fired, .
111 EF EXCL 3/1714 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-08 20058 m, 4011 m/sec, 48874 t fired, .

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lola: FINISHED task # 60 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-08
lola: result : false
lola: CANCELED task # 57 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 110 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 111 (type EXCL) for ARMCacheCoherence-PT-none-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 108 (type EXCL) for 36 ARMCacheCoherence-PT-none-ReachabilityCardinality-12
lola: time limit : 3421 sec
lola: memory limit: 32 pages
lola: FINISHED task # 57 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 1598953
lola: tried executions : 1991
lola: time used : 70.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF true findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
108 EF EXCL 0/3421 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 7927 m, 1585 m/sec, 17312 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF true findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
108 EF EXCL 5/3421 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 55527 m, 9520 m/sec, 141372 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF true findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
108 EF EXCL 10/3421 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 103131 m, 9520 m/sec, 286161 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF true findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
108 EF EXCL 15/3421 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 149868 m, 9347 m/sec, 432490 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF true findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
108 EF EXCL 20/3421 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 197950 m, 9616 m/sec, 583823 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF true findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
108 EF EXCL 25/3421 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 246634 m, 9736 m/sec, 737922 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-00: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF true findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
108 EF EXCL 30/3421 2/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 294867 m, 9646 m/sec, 891517 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-02: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF true findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

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108 EF EXCL 36/3421 2/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 343184 m, 9663 m/sec, 1044104 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF true findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath

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108 EF EXCL 41/3421 2/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-12 391875 m, 9738 m/sec, 1203137 t fired, .

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ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
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ARMCacheCoherence-PT-none-ReachabilityCardinality-06: INITIAL true preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: EF true findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: AG false findpath


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