Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813594900001.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ARMCacheCoherence-PT-none, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813594900001
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 6.6K Feb 25 21:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 25 21:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 25 21:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 21:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:28 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:28 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:28 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 21:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 163K Feb 25 21:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 25 21:46 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 21:46 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 14M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-00
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-01
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-02
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-03
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-04
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-05
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-06
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-07
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-08
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-09
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-10
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-11
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-12
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-13
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-14
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678334339440

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ARMCacheCoherence-PT-none
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 03:59:01] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 03:59:01] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 03:59:02] [INFO ] Load time of PNML (sax parser for PT used): 856 ms
[2023-03-09 03:59:02] [INFO ] Transformed 87 places.
[2023-03-09 03:59:02] [INFO ] Transformed 33676 transitions.
[2023-03-09 03:59:02] [INFO ] Found NUPN structural information;
[2023-03-09 03:59:03] [INFO ] Parsed PT model containing 87 places and 33676 transitions and 246935 arcs in 1174 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 13 ms.
Initial state reduction rules removed 3 formulas.
Ensure Unique test removed 32425 transitions
Reduce redundant transitions removed 32425 transitions.
Initial state reduction rules removed 1 formulas.
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 57 out of 87 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 87/87 places, 1251/1251 transitions.
Drop transitions removed 35 transitions
Redundant transition composition rules discarded 35 transitions
Iterating global reduction 0 with 35 rules applied. Total rules applied 35 place count 87 transition count 1216
Applied a total of 35 rules in 59 ms. Remains 87 /87 variables (removed 0) and now considering 1216/1251 (removed 35) transitions.
[2023-03-09 03:59:03] [INFO ] Flow matrix only has 500 transitions (discarded 716 similar events)
// Phase 1: matrix 500 rows 87 cols
[2023-03-09 03:59:03] [INFO ] Computed 12 place invariants in 14 ms
[2023-03-09 03:59:03] [INFO ] Implicit Places using invariants in 457 ms returned []
[2023-03-09 03:59:03] [INFO ] Flow matrix only has 500 transitions (discarded 716 similar events)
[2023-03-09 03:59:03] [INFO ] Invariant cache hit.
[2023-03-09 03:59:04] [INFO ] State equation strengthened by 181 read => feed constraints.
[2023-03-09 03:59:04] [INFO ] Implicit Places using invariants and state equation in 579 ms returned []
Implicit Place search using SMT with State Equation took 1070 ms to find 0 implicit places.
[2023-03-09 03:59:04] [INFO ] Flow matrix only has 500 transitions (discarded 716 similar events)
[2023-03-09 03:59:04] [INFO ] Invariant cache hit.
[2023-03-09 03:59:04] [INFO ] Dead Transitions using invariants and state equation in 555 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 87/87 places, 1216/1251 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1687 ms. Remains : 87/87 places, 1216/1251 transitions.
Support contains 57 out of 87 places after structural reductions.
[2023-03-09 03:59:05] [INFO ] Flatten gal took : 155 ms
[2023-03-09 03:59:05] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 03:59:05] [INFO ] Flatten gal took : 85 ms
[2023-03-09 03:59:05] [INFO ] Input system was already deterministic with 1216 transitions.
Finished random walk after 4551 steps, including 6 resets, run visited all 54 properties in 205 ms. (steps per millisecond=22 )
[2023-03-09 03:59:05] [INFO ] Flatten gal took : 71 ms
[2023-03-09 03:59:06] [INFO ] Flatten gal took : 78 ms
[2023-03-09 03:59:06] [INFO ] Input system was already deterministic with 1216 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 87/87 places, 1216/1216 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 79 transition count 1208
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 79 transition count 1208
Drop transitions removed 40 transitions
Redundant transition composition rules discarded 40 transitions
Iterating global reduction 0 with 40 rules applied. Total rules applied 56 place count 79 transition count 1168
Applied a total of 56 rules in 13 ms. Remains 79 /87 variables (removed 8) and now considering 1168/1216 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 79/87 places, 1168/1216 transitions.
[2023-03-09 03:59:06] [INFO ] Flatten gal took : 71 ms
[2023-03-09 03:59:06] [INFO ] Flatten gal took : 85 ms
[2023-03-09 03:59:06] [INFO ] Input system was already deterministic with 1168 transitions.
Starting structural reductions in LTL mode, iteration 0 : 87/87 places, 1216/1216 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 82 transition count 1211
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 82 transition count 1211
Drop transitions removed 20 transitions
Redundant transition composition rules discarded 20 transitions
Iterating global reduction 0 with 20 rules applied. Total rules applied 30 place count 82 transition count 1191
Applied a total of 30 rules in 10 ms. Remains 82 /87 variables (removed 5) and now considering 1191/1216 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 82/87 places, 1191/1216 transitions.
[2023-03-09 03:59:06] [INFO ] Flatten gal took : 56 ms
[2023-03-09 03:59:06] [INFO ] Flatten gal took : 51 ms
[2023-03-09 03:59:06] [INFO ] Input system was already deterministic with 1191 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 87/87 places, 1216/1216 transitions.
Graph (trivial) has 54 edges and 87 vertex of which 6 / 87 are part of one of the 3 SCC in 3 ms
Free SCC test removed 3 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Reduce places removed 1 places and 1 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 8 place count 76 transition count 1202
Iterating global reduction 0 with 7 rules applied. Total rules applied 15 place count 76 transition count 1202
Performed 14 Post agglomeration using F-continuation condition with reduction of 84 identical transitions.
Deduced a syphon composed of 14 places in 1 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 0 with 28 rules applied. Total rules applied 43 place count 62 transition count 1104
Ensure Unique test removed 351 transitions
Reduce isomorphic transitions removed 351 transitions.
Iterating post reduction 0 with 351 rules applied. Total rules applied 394 place count 62 transition count 753
Drop transitions removed 68 transitions
Redundant transition composition rules discarded 68 transitions
Iterating global reduction 1 with 68 rules applied. Total rules applied 462 place count 62 transition count 685
Applied a total of 462 rules in 124 ms. Remains 62 /87 variables (removed 25) and now considering 685/1216 (removed 531) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 124 ms. Remains : 62/87 places, 685/1216 transitions.
[2023-03-09 03:59:06] [INFO ] Flatten gal took : 18 ms
[2023-03-09 03:59:06] [INFO ] Flatten gal took : 19 ms
[2023-03-09 03:59:06] [INFO ] Input system was already deterministic with 685 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 87/87 places, 1216/1216 transitions.
Graph (trivial) has 49 edges and 87 vertex of which 6 / 87 are part of one of the 3 SCC in 1 ms
Free SCC test removed 3 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 8 place count 77 transition count 1203
Iterating global reduction 0 with 7 rules applied. Total rules applied 15 place count 77 transition count 1203
Performed 13 Post agglomeration using F-continuation condition with reduction of 112 identical transitions.
Deduced a syphon composed of 13 places in 1 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 0 with 26 rules applied. Total rules applied 41 place count 64 transition count 1078
Ensure Unique test removed 351 transitions
Reduce isomorphic transitions removed 351 transitions.
Iterating post reduction 0 with 351 rules applied. Total rules applied 392 place count 64 transition count 727
Drop transitions removed 86 transitions
Redundant transition composition rules discarded 86 transitions
Iterating global reduction 1 with 86 rules applied. Total rules applied 478 place count 64 transition count 641
Applied a total of 478 rules in 88 ms. Remains 64 /87 variables (removed 23) and now considering 641/1216 (removed 575) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 88 ms. Remains : 64/87 places, 641/1216 transitions.
[2023-03-09 03:59:07] [INFO ] Flatten gal took : 20 ms
[2023-03-09 03:59:07] [INFO ] Flatten gal took : 20 ms
[2023-03-09 03:59:07] [INFO ] Input system was already deterministic with 641 transitions.
Starting structural reductions in LTL mode, iteration 0 : 87/87 places, 1216/1216 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 84 transition count 1213
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 84 transition count 1213
Drop transitions removed 10 transitions
Redundant transition composition rules discarded 10 transitions
Iterating global reduction 0 with 10 rules applied. Total rules applied 16 place count 84 transition count 1203
Applied a total of 16 rules in 9 ms. Remains 84 /87 variables (removed 3) and now considering 1203/1216 (removed 13) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 84/87 places, 1203/1216 transitions.
[2023-03-09 03:59:07] [INFO ] Flatten gal took : 46 ms
[2023-03-09 03:59:07] [INFO ] Flatten gal took : 51 ms
[2023-03-09 03:59:07] [INFO ] Input system was already deterministic with 1203 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 87/87 places, 1216/1216 transitions.
Graph (trivial) has 59 edges and 87 vertex of which 6 / 87 are part of one of the 3 SCC in 0 ms
Free SCC test removed 3 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Reduce places removed 1 places and 1 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 8 place count 76 transition count 1202
Iterating global reduction 0 with 7 rules applied. Total rules applied 15 place count 76 transition count 1202
Performed 15 Post agglomeration using F-continuation condition with reduction of 112 identical transitions.
Deduced a syphon composed of 15 places in 0 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 0 with 30 rules applied. Total rules applied 45 place count 61 transition count 1075
Ensure Unique test removed 393 transitions
Reduce isomorphic transitions removed 393 transitions.
Iterating post reduction 0 with 393 rules applied. Total rules applied 438 place count 61 transition count 682
Drop transitions removed 34 transitions
Redundant transition composition rules discarded 34 transitions
Iterating global reduction 1 with 34 rules applied. Total rules applied 472 place count 61 transition count 648
Applied a total of 472 rules in 87 ms. Remains 61 /87 variables (removed 26) and now considering 648/1216 (removed 568) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 87 ms. Remains : 61/87 places, 648/1216 transitions.
[2023-03-09 03:59:07] [INFO ] Flatten gal took : 17 ms
[2023-03-09 03:59:07] [INFO ] Flatten gal took : 18 ms
[2023-03-09 03:59:07] [INFO ] Input system was already deterministic with 648 transitions.
Starting structural reductions in LTL mode, iteration 0 : 87/87 places, 1216/1216 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 80 transition count 1209
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 80 transition count 1209
Drop transitions removed 40 transitions
Redundant transition composition rules discarded 40 transitions
Iterating global reduction 0 with 40 rules applied. Total rules applied 54 place count 80 transition count 1169
Applied a total of 54 rules in 9 ms. Remains 80 /87 variables (removed 7) and now considering 1169/1216 (removed 47) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 80/87 places, 1169/1216 transitions.
[2023-03-09 03:59:07] [INFO ] Flatten gal took : 40 ms
[2023-03-09 03:59:07] [INFO ] Flatten gal took : 44 ms
[2023-03-09 03:59:07] [INFO ] Input system was already deterministic with 1169 transitions.
Starting structural reductions in LTL mode, iteration 0 : 87/87 places, 1216/1216 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 83 transition count 1212
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 83 transition count 1212
Drop transitions removed 30 transitions
Redundant transition composition rules discarded 30 transitions
Iterating global reduction 0 with 30 rules applied. Total rules applied 38 place count 83 transition count 1182
Applied a total of 38 rules in 8 ms. Remains 83 /87 variables (removed 4) and now considering 1182/1216 (removed 34) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 83/87 places, 1182/1216 transitions.
[2023-03-09 03:59:07] [INFO ] Flatten gal took : 41 ms
[2023-03-09 03:59:07] [INFO ] Flatten gal took : 43 ms
[2023-03-09 03:59:08] [INFO ] Input system was already deterministic with 1182 transitions.
Starting structural reductions in LTL mode, iteration 0 : 87/87 places, 1216/1216 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 82 transition count 1211
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 82 transition count 1211
Drop transitions removed 20 transitions
Redundant transition composition rules discarded 20 transitions
Iterating global reduction 0 with 20 rules applied. Total rules applied 30 place count 82 transition count 1191
Applied a total of 30 rules in 16 ms. Remains 82 /87 variables (removed 5) and now considering 1191/1216 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 82/87 places, 1191/1216 transitions.
[2023-03-09 03:59:08] [INFO ] Flatten gal took : 55 ms
[2023-03-09 03:59:08] [INFO ] Flatten gal took : 45 ms
[2023-03-09 03:59:08] [INFO ] Input system was already deterministic with 1191 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 87/87 places, 1216/1216 transitions.
Graph (trivial) has 53 edges and 87 vertex of which 6 / 87 are part of one of the 3 SCC in 1 ms
Free SCC test removed 3 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 8 place count 77 transition count 1203
Iterating global reduction 0 with 7 rules applied. Total rules applied 15 place count 77 transition count 1203
Performed 13 Post agglomeration using F-continuation condition with reduction of 84 identical transitions.
Deduced a syphon composed of 13 places in 0 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 0 with 26 rules applied. Total rules applied 41 place count 64 transition count 1106
Ensure Unique test removed 309 transitions
Reduce isomorphic transitions removed 309 transitions.
Iterating post reduction 0 with 309 rules applied. Total rules applied 350 place count 64 transition count 797
Drop transitions removed 114 transitions
Redundant transition composition rules discarded 114 transitions
Iterating global reduction 1 with 114 rules applied. Total rules applied 464 place count 64 transition count 683
Applied a total of 464 rules in 65 ms. Remains 64 /87 variables (removed 23) and now considering 683/1216 (removed 533) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 65 ms. Remains : 64/87 places, 683/1216 transitions.
[2023-03-09 03:59:08] [INFO ] Flatten gal took : 16 ms
[2023-03-09 03:59:08] [INFO ] Flatten gal took : 17 ms
[2023-03-09 03:59:08] [INFO ] Input system was already deterministic with 683 transitions.
Finished random walk after 110 steps, including 3 resets, run visited all 1 properties in 2 ms. (steps per millisecond=55 )
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 87/87 places, 1216/1216 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 79 transition count 1208
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 79 transition count 1208
Drop transitions removed 40 transitions
Redundant transition composition rules discarded 40 transitions
Iterating global reduction 0 with 40 rules applied. Total rules applied 56 place count 79 transition count 1168
Applied a total of 56 rules in 5 ms. Remains 79 /87 variables (removed 8) and now considering 1168/1216 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 79/87 places, 1168/1216 transitions.
[2023-03-09 03:59:08] [INFO ] Flatten gal took : 54 ms
[2023-03-09 03:59:08] [INFO ] Flatten gal took : 51 ms
[2023-03-09 03:59:08] [INFO ] Input system was already deterministic with 1168 transitions.
[2023-03-09 03:59:08] [INFO ] Flatten gal took : 59 ms
[2023-03-09 03:59:08] [INFO ] Flatten gal took : 72 ms
[2023-03-09 03:59:08] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 15 ms.
[2023-03-09 03:59:08] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 87 places, 1216 transitions and 7833 arcs took 12 ms.
Total runtime 7097 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ARMCacheCoherence-PT-none
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/370

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678334360075

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/370/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/370/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/370/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 1 (type EXCL) for 0 ARMCacheCoherence-PT-none-CTLCardinality-00
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 1 (type EXCL) for ARMCacheCoherence-PT-none-CTLCardinality-00
lola: result : true
lola: markings : 4773
lola: fired transitions : 11888
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 35 ARMCacheCoherence-PT-none-CTLCardinality-15
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: FINISHED task # 36 (type EXCL) for ARMCacheCoherence-PT-none-CTLCardinality-15
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 33 (type EXCL) for 32 ARMCacheCoherence-PT-none-CTLCardinality-10
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 39 (type FNDP) for 18 ARMCacheCoherence-PT-none-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 40 (type EQUN) for 18 ARMCacheCoherence-PT-none-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 42 (type SRCH) for 18 ARMCacheCoherence-PT-none-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 42 (type SRCH) for ARMCacheCoherence-PT-none-CTLCardinality-08
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 33 (type EXCL) for ARMCacheCoherence-PT-none-CTLCardinality-10
lola: result : true
lola: markings : 7
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 29 ARMCacheCoherence-PT-none-CTLCardinality-09
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type FNDP) for ARMCacheCoherence-PT-none-CTLCardinality-08
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 40 (type EQUN) for ARMCacheCoherence-PT-none-CTLCardinality-08 (obsolete)
sara: try reading problem file /home/mcc/execution/370/CTLCardinality-40.sara.
lola: FINISHED task # 30 (type EXCL) for ARMCacheCoherence-PT-none-CTLCardinality-09
lola: result : true
lola: markings : 4767
lola: fired transitions : 11873
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 ARMCacheCoherence-PT-none-CTLCardinality-06
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for ARMCacheCoherence-PT-none-CTLCardinality-06
lola: result : true
lola: markings : 4146
lola: fired transitions : 14749
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ARMCacheCoherence-PT-none-CTLCardinality-02
lola: time limit : 719 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 40 (type EQUN) for ARMCacheCoherence-PT-none-CTLCardinality-08
lola: result : true
lola: FINISHED task # 4 (type EXCL) for ARMCacheCoherence-PT-none-CTLCardinality-02
lola: result : true
lola: markings : 122740
lola: fired transitions : 740431
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 18 ARMCacheCoherence-PT-none-CTLCardinality-08
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 27 (type EXCL) for ARMCacheCoherence-PT-none-CTLCardinality-08
lola: result : false
lola: markings : 234
lola: fired transitions : 635
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 ARMCacheCoherence-PT-none-CTLCardinality-07
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for ARMCacheCoherence-PT-none-CTLCardinality-07
lola: result : true
lola: markings : 5
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 6 ARMCacheCoherence-PT-none-CTLCardinality-03
lola: time limit : 1799 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-CTLCardinality-00: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-02: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-06: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-07: EFEG true state space /EFEG
ARMCacheCoherence-PT-none-CTLCardinality-08: CONJ false CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-09: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-10: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-CTLCardinality-03: SP ACTL 0 0 1 0 1 0 0 0
ARMCacheCoherence-PT-none-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 LTL EXCL 3/1799 1/32 ARMCacheCoherence-PT-none-CTLCardinality-03 18963 m, 3792 m/sec, 82703 t fired, .

Time elapsed: 5 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 10
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-CTLCardinality-00: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-02: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-06: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-07: EFEG true state space /EFEG
ARMCacheCoherence-PT-none-CTLCardinality-08: CONJ false CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-09: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-10: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-CTLCardinality-03: SP ACTL 0 0 1 0 1 0 0 0
ARMCacheCoherence-PT-none-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 LTL EXCL 8/1799 1/32 ARMCacheCoherence-PT-none-CTLCardinality-03 62489 m, 8705 m/sec, 346761 t fired, .

Time elapsed: 10 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 10
lola: FINISHED task # 38 (type EXCL) for ARMCacheCoherence-PT-none-CTLCardinality-03
lola: result : false
lola: markings : 63713
lola: fired transitions : 367201
lola: time used : 8.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 ARMCacheCoherence-PT-none-CTLCardinality-05
lola: time limit : 3590 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for ARMCacheCoherence-PT-none-CTLCardinality-05
lola: result : true
lola: markings : 57435
lola: fired transitions : 337159
lola: time used : 1.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-CTLCardinality-00: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-02: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-03: SP ACTL false LTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-05: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-06: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-07: EFEG true state space /EFEG
ARMCacheCoherence-PT-none-CTLCardinality-08: CONJ false CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-09: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-10: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLCardinality-15: CTL true CTL model checker


Time elapsed: 11 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ARMCacheCoherence-PT-none, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813594900001"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;