fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r006-oct2-167813594200338
Last Updated
May 14, 2023

About the Execution of LoLA for Angiogenesis-PT-15

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
7390.688 170706.00 154040.00 22.60 ?T??TT??T??FTFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r006-oct2-167813594200338.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is Angiogenesis-PT-15, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-oct2-167813594200338
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 8.5K Feb 26 14:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K Feb 26 14:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 26 14:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 26 14:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.7K Feb 26 14:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 26 14:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.6K Feb 26 14:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Feb 26 14:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 33K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-00
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-01
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-02
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-03
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-04
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-05
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-06
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-07
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-08
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-09
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-10
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-11
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-12
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-13
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-14
FORMULA_NAME Angiogenesis-PT-15-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678295430163

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Angiogenesis-PT-15
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT Angiogenesis-PT-15
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA Angiogenesis-PT-15-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-15-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-15-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-15-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-15-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-15-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-15-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-15-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Angiogenesis-PT-15-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678295600869

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 13 (type EXCL) for 12 Angiogenesis-PT-15-CTLFireability-04
lola: time limit : 105 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 84 (type FNDP) for 24 Angiogenesis-PT-15-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type EQUN) for 24 Angiogenesis-PT-15-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type SRCH) for 24 Angiogenesis-PT-15-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 84 (type FNDP) for Angiogenesis-PT-15-CTLFireability-08
lola: result : true
lola: fired transitions : 9
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 85 (type EQUN) for Angiogenesis-PT-15-CTLFireability-08 (obsolete)
lola: CANCELED task # 87 (type SRCH) for Angiogenesis-PT-15-CTLFireability-08 (obsolete)
lola: FINISHED task # 85 (type EQUN) for Angiogenesis-PT-15-CTLFireability-08
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 89 (type FNDP) for 55 Angiogenesis-PT-15-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type EQUN) for 55 Angiogenesis-PT-15-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 92 (type SRCH) for 55 Angiogenesis-PT-15-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 92 (type SRCH) for Angiogenesis-PT-15-CTLFireability-13
lola: result : unknown
lola: markings : 79
lola: fired transitions : 165
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 93 (type FNDP) for 52 Angiogenesis-PT-15-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/CTLFireability-90.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 93 (type FNDP) for Angiogenesis-PT-15-CTLFireability-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0

lola: FINISHED task # 89 (type FNDP) for Angiogenesis-PT-15-CTLFireability-13
lola: result : true
lola: fired transitions : 56
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 90 (type EQUN) for Angiogenesis-PT-15-CTLFireability-13 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 90 (type EQUN) for Angiogenesis-PT-15-CTLFireability-13
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:662
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 4 0 0 4 0 0 0
Angiogenesis-PT-15-CTLFireability-11: CONJ 0 2 0 0 2 0 0 0
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-15: DISJ 0 5 0 0 5 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/171 8/32 Angiogenesis-PT-15-CTLFireability-04 1674162 m, 334832 m/sec, 6511474 t fired, .

Time elapsed: 5 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 4 0 0 4 0 0 0
Angiogenesis-PT-15-CTLFireability-11: CONJ 0 2 0 0 2 0 0 0
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-15: DISJ 0 5 0 0 5 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/171 10/32 Angiogenesis-PT-15-CTLFireability-04 2228645 m, 110896 m/sec, 14450709 t fired, .

Time elapsed: 10 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 13 (type EXCL) for Angiogenesis-PT-15-CTLFireability-04
lola: result : true
lola: markings : 2279802
lola: fired transitions : 17431625
lola: time used : 12.000000
lola: memory pages used : 10
lola: LAUNCH task # 98 (type EXCL) for 30 Angiogenesis-PT-15-CTLFireability-10
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: FINISHED task # 98 (type EXCL) for Angiogenesis-PT-15-CTLFireability-10
lola: result : true
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 82 (type EXCL) for 65 Angiogenesis-PT-15-CTLFireability-15
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 82 (type EXCL) for Angiogenesis-PT-15-CTLFireability-15
lola: result : true
lola: markings : 12158
lola: fired transitions : 24809
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 80 (type EXCL) for 65 Angiogenesis-PT-15-CTLFireability-15
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 80 (type EXCL) for Angiogenesis-PT-15-CTLFireability-15
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 68 (type EXCL) for 65 Angiogenesis-PT-15-CTLFireability-15
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 68 (type EXCL) for Angiogenesis-PT-15-CTLFireability-15
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 45 Angiogenesis-PT-15-CTLFireability-11
lola: time limit : 299 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 1 0 0 5 0 0 2
Angiogenesis-PT-15-CTLFireability-11: CONJ 0 1 1 0 2 0 0 0
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 3/299 5/32 Angiogenesis-PT-15-CTLFireability-11 1067923 m, 213584 m/sec, 3957292 t fired, .

Time elapsed: 15 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 48 (type EXCL) for Angiogenesis-PT-15-CTLFireability-11
lola: result : false
lola: markings : 1561929
lola: fired transitions : 5875539
lola: time used : 5.000000
lola: memory pages used : 7
lola: LAUNCH task # 33 (type EXCL) for 30 Angiogenesis-PT-15-CTLFireability-10
lola: time limit : 358 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 1 0 5 0 0 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 3/358 6/32 Angiogenesis-PT-15-CTLFireability-10 1149295 m, 229859 m/sec, 3511139 t fired, .

Time elapsed: 20 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 1 0 5 0 0 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 8/358 12/32 Angiogenesis-PT-15-CTLFireability-10 2685049 m, 307150 m/sec, 8354320 t fired, .

Time elapsed: 25 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 1 0 5 0 0 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 13/358 18/32 Angiogenesis-PT-15-CTLFireability-10 4141399 m, 291270 m/sec, 12992817 t fired, .

Time elapsed: 30 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 1 0 5 0 0 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 18/358 25/32 Angiogenesis-PT-15-CTLFireability-10 5575502 m, 286820 m/sec, 17583213 t fired, .

Time elapsed: 35 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 1 0 5 0 0 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 23/358 31/32 Angiogenesis-PT-15-CTLFireability-10 6979827 m, 280865 m/sec, 22206239 t fired, .

Time elapsed: 40 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 33 (type EXCL) for Angiogenesis-PT-15-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 45 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 28 (type EXCL) for 27 Angiogenesis-PT-15-CTLFireability-09
lola: time limit : 395 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 5/395 19/32 Angiogenesis-PT-15-CTLFireability-09 4186346 m, 837269 m/sec, 8562395 t fired, .

Time elapsed: 50 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 10/395 26/32 Angiogenesis-PT-15-CTLFireability-09 5825668 m, 327864 m/sec, 14161794 t fired, .

Time elapsed: 55 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 15/395 31/32 Angiogenesis-PT-15-CTLFireability-09 7079236 m, 250713 m/sec, 19415237 t fired, .

Time elapsed: 60 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 28 (type EXCL) for Angiogenesis-PT-15-CTLFireability-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 65 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 16 (type EXCL) for 15 Angiogenesis-PT-15-CTLFireability-05
lola: time limit : 441 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/441 17/32 Angiogenesis-PT-15-CTLFireability-05 3719381 m, 743876 m/sec, 7758313 t fired, .

Time elapsed: 70 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/441 17/32 Angiogenesis-PT-15-CTLFireability-05 3719381 m, 0 m/sec, 16112003 t fired, .

Time elapsed: 75 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 16 (type EXCL) for Angiogenesis-PT-15-CTLFireability-05
lola: result : true
lola: markings : 3719381
lola: fired transitions : 22411923
lola: time used : 14.000000
lola: memory pages used : 17
lola: LAUNCH task # 10 (type EXCL) for 9 Angiogenesis-PT-15-CTLFireability-03
lola: time limit : 503 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 1/503 5/32 Angiogenesis-PT-15-CTLFireability-03 989197 m, 197839 m/sec, 1937336 t fired, .

Time elapsed: 80 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 6/503 23/32 Angiogenesis-PT-15-CTLFireability-03 5121529 m, 826466 m/sec, 10305945 t fired, .

Time elapsed: 85 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 10 (type EXCL) for Angiogenesis-PT-15-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 90 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 7 (type EXCL) for 6 Angiogenesis-PT-15-CTLFireability-02
lola: time limit : 585 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/585 14/32 Angiogenesis-PT-15-CTLFireability-02 3158095 m, 631619 m/sec, 6596032 t fired, .

Time elapsed: 95 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/585 26/32 Angiogenesis-PT-15-CTLFireability-02 6006882 m, 569757 m/sec, 12593688 t fired, .

Time elapsed: 100 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for Angiogenesis-PT-15-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 105 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 4 (type EXCL) for 3 Angiogenesis-PT-15-CTLFireability-01
lola: time limit : 699 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for Angiogenesis-PT-15-CTLFireability-01
lola: result : true
lola: markings : 1998810
lola: fired transitions : 4180909
lola: time used : 2.000000
lola: memory pages used : 9
lola: LAUNCH task # 1 (type EXCL) for 0 Angiogenesis-PT-15-CTLFireability-00
lola: time limit : 873 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 3/873 6/32 Angiogenesis-PT-15-CTLFireability-00 1342892 m, 268578 m/sec, 3885250 t fired, .

Time elapsed: 110 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 8/873 15/32 Angiogenesis-PT-15-CTLFireability-00 3339784 m, 399378 m/sec, 12075367 t fired, .

Time elapsed: 115 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 13/873 23/32 Angiogenesis-PT-15-CTLFireability-00 5258782 m, 383799 m/sec, 19950307 t fired, .

Time elapsed: 120 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 18/873 31/32 Angiogenesis-PT-15-CTLFireability-00 7131064 m, 374456 m/sec, 27661871 t fired, .

Time elapsed: 125 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 1 (type EXCL) for Angiogenesis-PT-15-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 130 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 101 (type EXCL) for 18 Angiogenesis-PT-15-CTLFireability-06
lola: time limit : 1156 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
101 LTL EXCL 5/1156 15/32 Angiogenesis-PT-15-CTLFireability-06 2257212 m, 451442 m/sec, 3986142 t fired, .

Time elapsed: 135 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
101 LTL EXCL 10/1156 29/32 Angiogenesis-PT-15-CTLFireability-06 4318975 m, 412352 m/sec, 7764456 t fired, .

Time elapsed: 140 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 101 (type EXCL) for Angiogenesis-PT-15-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2
Angiogenesis-PT-15-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 145 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 99 (type EXCL) for 62 Angiogenesis-PT-15-CTLFireability-14
lola: time limit : 1727 sec
lola: memory limit: 32 pages
lola: FINISHED task # 99 (type EXCL) for Angiogenesis-PT-15-CTLFireability-14
lola: result : false
lola: markings : 850
lola: fired transitions : 1334
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 Angiogenesis-PT-15-CTLFireability-07
lola: time limit : 3455 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-14: SP ACTL false LTL model checker
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 5/3455 6/32 Angiogenesis-PT-15-CTLFireability-07 1181293 m, 236258 m/sec, 9402176 t fired, .

Time elapsed: 150 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-14: SP ACTL false LTL model checker
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 10/3455 10/32 Angiogenesis-PT-15-CTLFireability-07 2293675 m, 222476 m/sec, 18865711 t fired, .

Time elapsed: 155 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-14: SP ACTL false LTL model checker
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 15/3455 15/32 Angiogenesis-PT-15-CTLFireability-07 3402744 m, 221813 m/sec, 28342050 t fired, .

Time elapsed: 160 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-14: SP ACTL false LTL model checker
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 20/3455 24/32 Angiogenesis-PT-15-CTLFireability-07 5519042 m, 423259 m/sec, 37399707 t fired, .

Time elapsed: 165 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 22 (type EXCL) for Angiogenesis-PT-15-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-14: SP ACTL false LTL model checker
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-15-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-06: SP ECTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-15-CTLFireability-10: DISJ 0 0 0 0 5 0 1 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 170 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-15-CTLFireability-00: CTL unknown AGGR
Angiogenesis-PT-15-CTLFireability-01: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-02: CTL unknown AGGR
Angiogenesis-PT-15-CTLFireability-03: CTL unknown AGGR
Angiogenesis-PT-15-CTLFireability-04: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-05: CTL true CTL model checker
Angiogenesis-PT-15-CTLFireability-06: SP ECTL unknown AGGR
Angiogenesis-PT-15-CTLFireability-07: CTL unknown AGGR
Angiogenesis-PT-15-CTLFireability-08: EF true findpath
Angiogenesis-PT-15-CTLFireability-09: CTL unknown AGGR
Angiogenesis-PT-15-CTLFireability-10: DISJ unknown DISJ
Angiogenesis-PT-15-CTLFireability-11: CONJ false CTL model checker
Angiogenesis-PT-15-CTLFireability-12: EF true findpath
Angiogenesis-PT-15-CTLFireability-13: CONJ false findpath
Angiogenesis-PT-15-CTLFireability-14: SP ACTL false LTL model checker
Angiogenesis-PT-15-CTLFireability-15: DISJ true CTL model checker


Time elapsed: 170 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Angiogenesis-PT-15"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is Angiogenesis-PT-15, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-oct2-167813594200338"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Angiogenesis-PT-15.tgz
mv Angiogenesis-PT-15 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;