About the Execution of LoLA for Angiogenesis-PT-05
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
2087.443 | 295649.00 | 297385.00 | 10.00 | TFTT???F?TTTFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r006-oct2-167813594100322.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is Angiogenesis-PT-05, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-oct2-167813594100322
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 488K
-rw-r--r-- 1 mcc users 7.8K Feb 26 14:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Feb 26 14:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Feb 26 14:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 26 14:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 15:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 15:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 14:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 132K Feb 26 14:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Feb 26 14:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 26 14:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 33K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-00
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-01
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-02
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-03
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-04
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-05
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-06
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-07
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-08
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-09
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-10
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-11
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-12
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-13
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-14
FORMULA_NAME Angiogenesis-PT-05-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678294589788
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Angiogenesis-PT-05
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT Angiogenesis-PT-05
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA Angiogenesis-PT-05-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Angiogenesis-PT-05-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Angiogenesis-PT-05-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Angiogenesis-PT-05-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Angiogenesis-PT-05-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Angiogenesis-PT-05-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Angiogenesis-PT-05-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Angiogenesis-PT-05-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Angiogenesis-PT-05-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Angiogenesis-PT-05-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Angiogenesis-PT-05-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Angiogenesis-PT-05-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678294885437
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 1 (type EXCL) for 0 Angiogenesis-PT-05-CTLFireability-00
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/211 4/32 Angiogenesis-PT-05-CTLFireability-00 881460 m, 176292 m/sec, 5815051 t fired, .
Time elapsed: 5 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 1 (type EXCL) for Angiogenesis-PT-05-CTLFireability-00
lola: result : true
lola: markings : 908577
lola: fired transitions : 7055771
lola: time used : 6.000000
lola: memory pages used : 4
lola: LAUNCH task # 47 (type EXCL) for 46 Angiogenesis-PT-05-CTLFireability-14
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for Angiogenesis-PT-05-CTLFireability-14
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 Angiogenesis-PT-05-CTLFireability-13
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for Angiogenesis-PT-05-CTLFireability-13
lola: result : true
lola: markings : 611274
lola: fired transitions : 3430874
lola: time used : 4.000000
lola: memory pages used : 3
lola: LAUNCH task # 41 (type EXCL) for 40 Angiogenesis-PT-05-CTLFireability-12
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for Angiogenesis-PT-05-CTLFireability-12
lola: result : false
lola: markings : 28667
lola: fired transitions : 66325
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 Angiogenesis-PT-05-CTLFireability-10
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for Angiogenesis-PT-05-CTLFireability-10
lola: result : true
lola: markings : 43726
lola: fired transitions : 139686
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 21 Angiogenesis-PT-05-CTLFireability-07
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for Angiogenesis-PT-05-CTLFireability-07
lola: result : true
lola: markings : 44221
lola: fired transitions : 134219
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 Angiogenesis-PT-05-CTLFireability-05
lola: time limit : 326 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 0/326 2/32 Angiogenesis-PT-05-CTLFireability-05 249357 m, 49871 m/sec, 1070015 t fired, .
Time elapsed: 10 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/326 4/32 Angiogenesis-PT-05-CTLFireability-05 863742 m, 122877 m/sec, 7524283 t fired, .
Time elapsed: 15 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/326 9/32 Angiogenesis-PT-05-CTLFireability-05 1926968 m, 212645 m/sec, 14225864 t fired, .
Time elapsed: 20 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/326 9/32 Angiogenesis-PT-05-CTLFireability-05 1979168 m, 10440 m/sec, 19871597 t fired, .
Time elapsed: 25 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/326 14/32 Angiogenesis-PT-05-CTLFireability-05 3113516 m, 226869 m/sec, 26693804 t fired, .
Time elapsed: 30 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 25/326 14/32 Angiogenesis-PT-05-CTLFireability-05 3160195 m, 9335 m/sec, 31872893 t fired, .
Time elapsed: 35 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 30/326 18/32 Angiogenesis-PT-05-CTLFireability-05 4140150 m, 195991 m/sec, 38465915 t fired, .
Time elapsed: 40 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 35/326 19/32 Angiogenesis-PT-05-CTLFireability-05 4357966 m, 43563 m/sec, 44215748 t fired, .
Time elapsed: 45 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 40/326 22/32 Angiogenesis-PT-05-CTLFireability-05 5200340 m, 168474 m/sec, 50734581 t fired, .
Time elapsed: 50 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 45/326 24/32 Angiogenesis-PT-05-CTLFireability-05 5555113 m, 70954 m/sec, 56332944 t fired, .
Time elapsed: 55 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 51/326 27/32 Angiogenesis-PT-05-CTLFireability-05 6280536 m, 145084 m/sec, 62997294 t fired, .
Time elapsed: 61 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 56/326 30/32 Angiogenesis-PT-05-CTLFireability-05 7049615 m, 153815 m/sec, 68644890 t fired, .
Time elapsed: 66 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 61/326 30/32 Angiogenesis-PT-05-CTLFireability-05 7067238 m, 3524 m/sec, 73566090 t fired, .
Time elapsed: 71 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 16 (type EXCL) for Angiogenesis-PT-05-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 76 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 13 (type EXCL) for 12 Angiogenesis-PT-05-CTLFireability-04
lola: time limit : 352 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/352 4/32 Angiogenesis-PT-05-CTLFireability-04 851347 m, 170269 m/sec, 5904622 t fired, .
Time elapsed: 81 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/352 5/32 Angiogenesis-PT-05-CTLFireability-04 949882 m, 19707 m/sec, 12225797 t fired, .
Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/352 8/32 Angiogenesis-PT-05-CTLFireability-04 1723050 m, 154633 m/sec, 18554585 t fired, .
Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 20/352 10/32 Angiogenesis-PT-05-CTLFireability-04 2145967 m, 84583 m/sec, 24038784 t fired, .
Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 25/352 10/32 Angiogenesis-PT-05-CTLFireability-04 2151846 m, 1175 m/sec, 30244002 t fired, .
Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 30/352 13/32 Angiogenesis-PT-05-CTLFireability-04 2911718 m, 151974 m/sec, 36314046 t fired, .
Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 35/352 15/32 Angiogenesis-PT-05-CTLFireability-04 3414065 m, 100469 m/sec, 41574931 t fired, .
Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 40/352 15/32 Angiogenesis-PT-05-CTLFireability-04 3420611 m, 1309 m/sec, 47333109 t fired, .
Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 45/352 17/32 Angiogenesis-PT-05-CTLFireability-04 3950057 m, 105889 m/sec, 53665130 t fired, .
Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 50/352 20/32 Angiogenesis-PT-05-CTLFireability-04 4646680 m, 139324 m/sec, 59023104 t fired, .
Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 55/352 20/32 Angiogenesis-PT-05-CTLFireability-04 4705442 m, 11752 m/sec, 64663073 t fired, .
Time elapsed: 131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 60/352 22/32 Angiogenesis-PT-05-CTLFireability-04 4980555 m, 55022 m/sec, 71114855 t fired, .
Time elapsed: 136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 65/352 25/32 Angiogenesis-PT-05-CTLFireability-04 5757003 m, 155289 m/sec, 76585418 t fired, .
Time elapsed: 141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 70/352 26/32 Angiogenesis-PT-05-CTLFireability-04 5991999 m, 46999 m/sec, 82134644 t fired, .
Time elapsed: 146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 75/352 26/32 Angiogenesis-PT-05-CTLFireability-04 5996705 m, 941 m/sec, 88315026 t fired, .
Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 80/352 29/32 Angiogenesis-PT-05-CTLFireability-04 6844784 m, 169615 m/sec, 94228451 t fired, .
Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 85/352 31/32 Angiogenesis-PT-05-CTLFireability-04 7277899 m, 86623 m/sec, 99852902 t fired, .
Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 90/352 31/32 Angiogenesis-PT-05-CTLFireability-04 7284065 m, 1233 m/sec, 105875878 t fired, .
Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 13 (type EXCL) for Angiogenesis-PT-05-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 10 (type EXCL) for 9 Angiogenesis-PT-05-CTLFireability-03
lola: time limit : 381 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for Angiogenesis-PT-05-CTLFireability-03
lola: result : true
lola: markings : 9654
lola: fired transitions : 18521
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 Angiogenesis-PT-05-CTLFireability-02
lola: time limit : 428 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for Angiogenesis-PT-05-CTLFireability-02
lola: result : true
lola: markings : 609809
lola: fired transitions : 4149538
lola: time used : 3.000000
lola: memory pages used : 3
lola: LAUNCH task # 4 (type EXCL) for 3 Angiogenesis-PT-05-CTLFireability-01
lola: time limit : 489 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-15: AFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 2/489 2/32 Angiogenesis-PT-05-CTLFireability-01 466286 m, 93257 m/sec, 1718617 t fired, .
Time elapsed: 176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 4 (type EXCL) for Angiogenesis-PT-05-CTLFireability-01
lola: result : false
lola: markings : 638206
lola: fired transitions : 3932802
lola: time used : 3.000000
lola: memory pages used : 3
lola: LAUNCH task # 50 (type EXCL) for 49 Angiogenesis-PT-05-CTLFireability-15
lola: time limit : 570 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for Angiogenesis-PT-05-CTLFireability-15
lola: result : false
lola: markings : 27691
lola: fired transitions : 53968
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 21 Angiogenesis-PT-05-CTLFireability-07
lola: time limit : 684 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for Angiogenesis-PT-05-CTLFireability-07
lola: result : false
lola: markings : 27696
lola: fired transitions : 53975
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 Angiogenesis-PT-05-CTLFireability-09
lola: time limit : 855 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for Angiogenesis-PT-05-CTLFireability-09
lola: result : true
lola: markings : 27686
lola: fired transitions : 111238
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 Angiogenesis-PT-05-CTLFireability-06
lola: time limit : 1140 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 3/1140 4/32 Angiogenesis-PT-05-CTLFireability-06 854205 m, 170841 m/sec, 4192682 t fired, .
Time elapsed: 181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 8/1140 8/32 Angiogenesis-PT-05-CTLFireability-06 1702967 m, 169752 m/sec, 10668174 t fired, .
Time elapsed: 186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 13/1140 9/32 Angiogenesis-PT-05-CTLFireability-06 1976649 m, 54736 m/sec, 16642793 t fired, .
Time elapsed: 191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 18/1140 14/32 Angiogenesis-PT-05-CTLFireability-06 3143837 m, 233437 m/sec, 23171183 t fired, .
Time elapsed: 196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 23/1140 14/32 Angiogenesis-PT-05-CTLFireability-06 3163053 m, 3843 m/sec, 28670328 t fired, .
Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 28/1140 19/32 Angiogenesis-PT-05-CTLFireability-06 4346410 m, 236671 m/sec, 35291614 t fired, .
Time elapsed: 206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 33/1140 19/32 Angiogenesis-PT-05-CTLFireability-06 4405739 m, 11865 m/sec, 41149130 t fired, .
Time elapsed: 211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 38/1140 24/32 Angiogenesis-PT-05-CTLFireability-06 5548817 m, 228615 m/sec, 47286057 t fired, .
Time elapsed: 216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 43/1140 25/32 Angiogenesis-PT-05-CTLFireability-06 5853298 m, 60896 m/sec, 53424364 t fired, .
Time elapsed: 221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 48/1140 30/32 Angiogenesis-PT-05-CTLFireability-06 7047666 m, 238873 m/sec, 59157245 t fired, .
Time elapsed: 226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 53/1140 30/32 Angiogenesis-PT-05-CTLFireability-06 7065225 m, 3511 m/sec, 64017146 t fired, .
Time elapsed: 231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 19 (type EXCL) for Angiogenesis-PT-05-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Angiogenesis-PT-05-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 38 (type EXCL) for 37 Angiogenesis-PT-05-CTLFireability-11
lola: time limit : 1682 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for Angiogenesis-PT-05-CTLFireability-11
lola: result : true
lola: markings : 60033
lola: fired transitions : 270647
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 Angiogenesis-PT-05-CTLFireability-08
lola: time limit : 3364 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 5/3364 4/32 Angiogenesis-PT-05-CTLFireability-08 861643 m, 172328 m/sec, 6065346 t fired, .
Time elapsed: 241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 10/3364 9/32 Angiogenesis-PT-05-CTLFireability-08 1960600 m, 219791 m/sec, 12634163 t fired, .
Time elapsed: 246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 15/3364 10/32 Angiogenesis-PT-05-CTLFireability-08 2146518 m, 37183 m/sec, 18826196 t fired, .
Time elapsed: 251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 20/3364 14/32 Angiogenesis-PT-05-CTLFireability-08 3148319 m, 200360 m/sec, 24706886 t fired, .
Time elapsed: 256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 25/3364 15/32 Angiogenesis-PT-05-CTLFireability-08 3484684 m, 67273 m/sec, 30666173 t fired, .
Time elapsed: 261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 30/3364 19/32 Angiogenesis-PT-05-CTLFireability-08 4350492 m, 173161 m/sec, 36664600 t fired, .
Time elapsed: 266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 35/3364 21/32 Angiogenesis-PT-05-CTLFireability-08 4866783 m, 103258 m/sec, 42752504 t fired, .
Time elapsed: 271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 40/3364 24/32 Angiogenesis-PT-05-CTLFireability-08 5552541 m, 137151 m/sec, 48393083 t fired, .
Time elapsed: 276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 45/3364 26/32 Angiogenesis-PT-05-CTLFireability-08 6164121 m, 122316 m/sec, 54576593 t fired, .
Time elapsed: 281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 50/3364 30/32 Angiogenesis-PT-05-CTLFireability-08 7049326 m, 177041 m/sec, 59849848 t fired, .
Time elapsed: 286 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 55/3364 30/32 Angiogenesis-PT-05-CTLFireability-08 7066856 m, 3506 m/sec, 64684244 t fired, .
Time elapsed: 291 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 29 (type EXCL) for Angiogenesis-PT-05-CTLFireability-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Angiogenesis-PT-05-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Angiogenesis-PT-05-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 296 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Angiogenesis-PT-05-CTLFireability-00: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-01: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-02: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-03: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-04: CTL unknown AGGR
Angiogenesis-PT-05-CTLFireability-05: CTL unknown AGGR
Angiogenesis-PT-05-CTLFireability-06: CTL unknown AGGR
Angiogenesis-PT-05-CTLFireability-07: CONJ false CTL model checker
Angiogenesis-PT-05-CTLFireability-08: CTL unknown AGGR
Angiogenesis-PT-05-CTLFireability-09: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-10: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-11: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-12: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-13: CTL true CTL model checker
Angiogenesis-PT-05-CTLFireability-14: CTL false CTL model checker
Angiogenesis-PT-05-CTLFireability-15: AFAG false CTL model checker
Time elapsed: 296 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Angiogenesis-PT-05"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is Angiogenesis-PT-05, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-oct2-167813594100322"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Angiogenesis-PT-05.tgz
mv Angiogenesis-PT-05 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;