Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r006-oct2-167813594100302.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is AirplaneLD-PT-2000, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-oct2-167813594100302
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 32M
-rw-r--r-- 1 mcc users 1.2M Feb 26 12:59 CTLCardinality.txt
-rw-r--r-- 1 mcc users 3.6M Feb 26 12:59 CTLCardinality.xml
-rw-r--r-- 1 mcc users 508K Feb 26 12:12 CTLFireability.txt
-rw-r--r-- 1 mcc users 2.8M Feb 26 12:12 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 1.1M Feb 25 15:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 2.6M Feb 25 15:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 381K Feb 25 15:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.5M Feb 25 15:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 1.3M Feb 26 15:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 3.7M Feb 26 15:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 643K Feb 26 14:32 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 3.2M Feb 26 14:32 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 167K Feb 25 15:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 333K Feb 25 15:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 8.7M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-00
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-01
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-02
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-03
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-04
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-05
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-06
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-07
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-08
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-09
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-10
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-11
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-12
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-13
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-14
FORMULA_NAME AirplaneLD-PT-2000-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678292966781

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-2000
Not applying reductions.
Model is PT
ReachabilityCardinality PT
starting LoLA
BK_INPUT AirplaneLD-PT-2000
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-2000-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678293607377

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 0 AirplaneLD-PT-2000-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 0 AirplaneLD-PT-2000-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 AirplaneLD-PT-2000-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 0 AirplaneLD-PT-2000-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SKEL/SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-00
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 51 (type EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 54 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-00 (obsolete)
lola: FINISHED task # 50 (type SKEL/FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 58 (type SKEL/FNDP) for 6 AirplaneLD-PT-2000-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/EQUN) for 6 AirplaneLD-PT-2000-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 6 AirplaneLD-PT-2000-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/SRCH) for 6 AirplaneLD-PT-2000-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 62 (type SKEL/SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-02

lola: result : false
lola: markings : 90
lola: fired transitions : 89
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 58 (type FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 59 (type EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 61 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-02 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 51 (type SKEL/EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-00
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-59.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 59 (type SKEL/EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-02
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type SKEL/FNDP) for 9 AirplaneLD-PT-2000-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 9 AirplaneLD-PT-2000-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 68 (type SKEL/SRCH) for 9 AirplaneLD-PT-2000-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 9 AirplaneLD-PT-2000-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type SKEL/SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-03
lola: result : false
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 65 (type FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 66 (type EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 69 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-03 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-66.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 66 (type SKEL/EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-03
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 72 (type SKEL/FNDP) for 12 AirplaneLD-PT-2000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/EQUN) for 12 AirplaneLD-PT-2000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SKEL/SRCH) for 12 AirplaneLD-PT-2000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/SRCH) for 12 AirplaneLD-PT-2000-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 73 (type SKEL/EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 72 (type FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 75 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 76 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-04 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 80 (type SKEL/FNDP) for 33 AirplaneLD-PT-2000-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SKEL/EQUN) for 33 AirplaneLD-PT-2000-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 83 (type SKEL/SRCH) for 33 AirplaneLD-PT-2000-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type SKEL/SRCH) for 33 AirplaneLD-PT-2000-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 83 (type SKEL/SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-11
lola: result : false
lola: markings : 16
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 80 (type FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 81 (type EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 84 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-11 (obsolete)
lola: FINISHED task # 81 (type SKEL/EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-11
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 16 (type CNST) for 15 AirplaneLD-PT-2000-ReachabilityCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 43 (type CNST) for 42 AirplaneLD-PT-2000-ReachabilityCardinality-14
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 16 (type CNST) for AirplaneLD-PT-2000-ReachabilityCardinality-05
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 4 (type CNST) for 3 AirplaneLD-PT-2000-ReachabilityCardinality-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 4 (type CNST) for AirplaneLD-PT-2000-ReachabilityCardinality-01
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 22 (type CNST) for 21 AirplaneLD-PT-2000-ReachabilityCardinality-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 46 (type CNST) for 45 AirplaneLD-PT-2000-ReachabilityCardinality-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 43 (type CNST) for AirplaneLD-PT-2000-ReachabilityCardinality-14
lola: result : true
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH INITIAL
lola: LAUNCH task # 40 (type CNST) for 39 AirplaneLD-PT-2000-ReachabilityCardinality-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: LAUNCH task # 19 (type CNST) for 18 AirplaneLD-PT-2000-ReachabilityCardinality-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 46 (type CNST) for AirplaneLD-PT-2000-ReachabilityCardinality-15
lola: result : false
lola: FINISHED task # 40 (type CNST) for AirplaneLD-PT-2000-ReachabilityCardinality-13
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 22 (type CNST) for AirplaneLD-PT-2000-ReachabilityCardinality-07
lola: result : true
lola: LAUNCH task # 88 (type SKEL/FNDP) for 30 AirplaneLD-PT-2000-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SKEL/EQUN) for 30 AirplaneLD-PT-2000-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 93 (type SKEL/SRCH) for 30 AirplaneLD-PT-2000-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 19 (type CNST) for AirplaneLD-PT-2000-ReachabilityCardinality-06
lola: result : true
lola: LAUNCH task # 92 (type SKEL/FNDP) for 24 AirplaneLD-PT-2000-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 93 (type SKEL/SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-10
lola: result : false
lola: markings : 4
lola: fired transitions : 3
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lola: LAUNCH task # 95 (type SKEL/EQUN) for 24 AirplaneLD-PT-2000-ReachabilityCardinality-08
lola: time limit : 32000000 sec
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lola: result : true
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lola: time used : 0.000000
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lola: CANCELED task # 95 (type EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 101 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-08 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 103 (type SKEL/FNDP) for 27 AirplaneLD-PT-2000-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
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lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 106 (type SKEL/SRCH) for 27 AirplaneLD-PT-2000-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
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lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 104 (type SKEL/EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 103 (type FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 106 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 107 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-09 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-89.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 92 (type SKEL/FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-95.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 89 (type SKEL/EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-10
lola: result : false

lola: FINISHED task # 95 (type SKEL/EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-08
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-2000-ReachabilityCardinality-01: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
AirplaneLD-PT-2000-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-05: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-06: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-07: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-09: AG true skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-11: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-13: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-14: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-2000-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
AirplaneLD-PT-2000-ReachabilityCardinality-08: EF 0 0 0 0 3 0 0 2
AirplaneLD-PT-2000-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-2000-ReachabilityCardinality-01: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
AirplaneLD-PT-2000-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-05: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-06: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-07: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-09: AG true skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-11: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-13: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-14: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-2000-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
AirplaneLD-PT-2000-ReachabilityCardinality-08: EF 0 0 0 0 3 0 0 2
AirplaneLD-PT-2000-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 110 (type SKEL/FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 19
lola: tried executions : 6
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 111 (type EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 113 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 114 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-12 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-111.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 111 (type SKEL/EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-12
lola: result : true
lola: planning for AirplaneLD-PT-2000-ReachabilityCardinality-03 stopped (result already fixed).
lola: planning for AirplaneLD-PT-2000-ReachabilityCardinality-09 stopped (result already fixed).
lola: planning for AirplaneLD-PT-2000-ReachabilityCardinality-10 stopped (result already fixed).
lola: planning for AirplaneLD-PT-2000-ReachabilityCardinality-04 stopped (result already fixed).
lola: planning for AirplaneLD-PT-2000-ReachabilityCardinality-02 stopped (result already fixed).
lola: planning for AirplaneLD-PT-2000-ReachabilityCardinality-11 stopped (result already fixed).
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-2000-ReachabilityCardinality-01: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
AirplaneLD-PT-2000-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-05: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-06: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-07: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-09: AG true skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-11: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-13: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-14: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-2000-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
AirplaneLD-PT-2000-ReachabilityCardinality-08: EF 0 0 0 0 3 0 0 2
AirplaneLD-PT-2000-ReachabilityCardinality-12: EF 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-2000-ReachabilityCardinality-01: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
AirplaneLD-PT-2000-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-05: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-06: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-07: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-09: AG true skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-11: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-13: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-14: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-2000-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
AirplaneLD-PT-2000-ReachabilityCardinality-08: EF 0 0 0 0 3 0 0 2
AirplaneLD-PT-2000-ReachabilityCardinality-12: EF 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 120 (type EXCL) for 24 AirplaneLD-PT-2000-ReachabilityCardinality-08
lola: time limit : 987 sec
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lola: LAUNCH task # 119 (type SRCH) for 24 AirplaneLD-PT-2000-ReachabilityCardinality-08
lola: time limit : 32000000 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 119 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-08
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 120 (type EXCL) for AirplaneLD-PT-2000-ReachabilityCardinality-08
lola: result : true
lola: markings : 13
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 116 (type FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 117 (type EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-08 (obsolete)
lola: FINISHED task # 117 (type EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-08
lola: result : unknown
lola: FINISHED task # 116 (type FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 126 (type EXCL) for 36 AirplaneLD-PT-2000-ReachabilityCardinality-12
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lola: FINISHED task # 126 (type EXCL) for AirplaneLD-PT-2000-ReachabilityCardinality-12
lola: result : true
lola: markings : 88
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lola: CANCELED task # 122 (type FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 123 (type EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 125 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-12 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-123.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 122 (type FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 24
lola: tried executions : 7
lola: time used : 0.000000
lola: memory pages used : 0

lola: FINISHED task # 123 (type EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-12
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-2000-ReachabilityCardinality-01: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
AirplaneLD-PT-2000-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-05: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-06: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-07: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-08: EF true tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-09: AG true skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-11: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-12: EF true tandem / relaxed
AirplaneLD-PT-2000-ReachabilityCardinality-13: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-14: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-2000-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 133 (type EXCL) for 0 AirplaneLD-PT-2000-ReachabilityCardinality-00
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lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 132 (type SRCH) for AirplaneLD-PT-2000-ReachabilityCardinality-00
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 129 (type FNDP) for AirplaneLD-PT-2000-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 130 (type EQUN) for AirplaneLD-PT-2000-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 133 (type EXCL) for AirplaneLD-PT-2000-ReachabilityCardinality-00 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-2000-ReachabilityCardinality-00: AG false tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-01: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
AirplaneLD-PT-2000-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-05: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-06: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-07: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-08: EF true tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-09: AG true skeleton: state equation
AirplaneLD-PT-2000-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-11: AG true skeleton: tandem / insertion
AirplaneLD-PT-2000-ReachabilityCardinality-12: EF true tandem / relaxed
AirplaneLD-PT-2000-ReachabilityCardinality-13: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-14: INITIAL true preprocessing
AirplaneLD-PT-2000-ReachabilityCardinality-15: INITIAL false preprocessing


Time elapsed: 641 secs. Pages in use: 2
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-130.sara.
sara: place or transition ordering is non-deterministic

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-2000"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is AirplaneLD-PT-2000, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-oct2-167813594100302"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-2000.tgz
mv AirplaneLD-PT-2000 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;