About the Execution of LoLA for AirplaneLD-PT-0050
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2369.451 | 139040.00 | 143598.00 | 12.50 | FFFTTFFFFFTTTFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r006-oct2-167813594000258.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is AirplaneLD-PT-0050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-oct2-167813594000258
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.9M
-rw-r--r-- 1 mcc users 44K Feb 26 11:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 196K Feb 26 11:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 38K Feb 26 11:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 248K Feb 26 11:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 23K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 83K Feb 26 11:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 358K Feb 26 11:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 68K Feb 26 11:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 433K Feb 26 11:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 219K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-00
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-01
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-02
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-03
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-04
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-05
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-06
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-07
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-08
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-09
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-10
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-11
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-12
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-13
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-14
FORMULA_NAME AirplaneLD-PT-0050-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678290509945
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-0050
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT AirplaneLD-PT-0050
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA AirplaneLD-PT-0050-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-PT-0050-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678290648985
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:183
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 68 (type SKEL/SRCH) for 65 AirplaneLD-PT-0050-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type SKEL/SRCH) for AirplaneLD-PT-0050-CTLFireability-15
lola: result : false
lola: markings : 858
lola: fired transitions : 3626
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 69 (type SKEL/SRCH) for 55 AirplaneLD-PT-0050-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type SKEL/SRCH) for AirplaneLD-PT-0050-CTLFireability-13
lola: result : false
lola: markings : 49
lola: fired transitions : 48
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 10 (type EXCL) for 9 AirplaneLD-PT-0050-CTLFireability-03
lola: time limit : 108 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: planning for AirplaneLD-PT-0050-CTLFireability-13 stopped (result already fixed).
lola: planning for AirplaneLD-PT-0050-CTLFireability-15 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 70 (type SKEL/SRCH) for 18 AirplaneLD-PT-0050-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 70 (type SKEL/SRCH) for AirplaneLD-PT-0050-CTLFireability-06
lola: result : false
lola: markings : 485
lola: fired transitions : 1881
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 71 (type SKEL/SRCH) for 58 AirplaneLD-PT-0050-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 71 (type SKEL/SRCH) for AirplaneLD-PT-0050-CTLFireability-14
lola: result : true
lola: markings : 764
lola: fired transitions : 1031
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-14: CONJ 0 1 0 0 2 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/211 7/32 AirplaneLD-PT-0050-CTLFireability-03 1562112 m, 312422 m/sec, 5027095 t fired, .
Time elapsed: 10 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-14: CONJ 0 1 0 0 2 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/211 9/32 AirplaneLD-PT-0050-CTLFireability-03 1930779 m, 73733 m/sec, 7536268 t fired, .
Time elapsed: 15 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 10 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-03
lola: result : true
lola: markings : 2628209
lola: fired transitions : 10644336
lola: time used : 14.000000
lola: memory pages used : 12
lola: LAUNCH task # 61 (type EXCL) for 58 AirplaneLD-PT-0050-CTLFireability-14
lola: time limit : 223 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-14: CONJ 0 0 1 0 2 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 CTL EXCL 1/223 1/32 AirplaneLD-PT-0050-CTLFireability-14 99831 m, 19966 m/sec, 331640 t fired, .
Time elapsed: 20 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-14: CONJ 0 0 1 0 2 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 CTL EXCL 6/223 8/32 AirplaneLD-PT-0050-CTLFireability-14 1813705 m, 342774 m/sec, 5785990 t fired, .
Time elapsed: 25 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-14: CONJ 0 0 1 0 2 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 CTL EXCL 11/223 12/32 AirplaneLD-PT-0050-CTLFireability-14 2575896 m, 152438 m/sec, 10053596 t fired, .
Time elapsed: 30 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-14: CONJ 0 0 1 0 2 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 CTL EXCL 16/223 16/32 AirplaneLD-PT-0050-CTLFireability-14 3498138 m, 184448 m/sec, 13844813 t fired, .
Time elapsed: 35 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
AirplaneLD-PT-0050-CTLFireability-14: CONJ 0 0 1 0 2 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 CTL EXCL 21/223 20/32 AirplaneLD-PT-0050-CTLFireability-14 4414022 m, 183176 m/sec, 18043830 t fired, .
Time elapsed: 40 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 61 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-14
lola: result : true
lola: markings : 4434753
lola: fired transitions : 18646639
lola: time used : 24.000000
lola: memory pages used : 20
lola: LAUNCH task # 53 (type EXCL) for 48 AirplaneLD-PT-0050-CTLFireability-12
lola: time limit : 237 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-12
lola: result : true
lola: markings : 515
lola: fired transitions : 621
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 AirplaneLD-PT-0050-CTLFireability-11
lola: time limit : 273 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-11
lola: result : true
lola: markings : 8
lola: fired transitions : 18
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 AirplaneLD-PT-0050-CTLFireability-10
lola: time limit : 296 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-10
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 AirplaneLD-PT-0050-CTLFireability-09
lola: time limit : 323 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-09
lola: result : false
lola: markings : 46818
lola: fired transitions : 407286
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 29 AirplaneLD-PT-0050-CTLFireability-07
lola: time limit : 355 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 2/355 2/32 AirplaneLD-PT-0050-CTLFireability-07 343304 m, 68660 m/sec, 1799580 t fired, .
Time elapsed: 45 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 7/355 8/32 AirplaneLD-PT-0050-CTLFireability-07 1836307 m, 298600 m/sec, 5857727 t fired, .
Time elapsed: 50 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 12/355 8/32 AirplaneLD-PT-0050-CTLFireability-07 1836307 m, 0 m/sec, 8130925 t fired, .
Time elapsed: 55 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 17/355 8/32 AirplaneLD-PT-0050-CTLFireability-07 1836307 m, 0 m/sec, 12815318 t fired, .
Time elapsed: 60 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 22/355 11/32 AirplaneLD-PT-0050-CTLFireability-07 2405488 m, 113836 m/sec, 15799453 t fired, .
Time elapsed: 65 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 27/355 14/32 AirplaneLD-PT-0050-CTLFireability-07 3103131 m, 139528 m/sec, 19254482 t fired, .
Time elapsed: 70 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 32/355 17/32 AirplaneLD-PT-0050-CTLFireability-07 3893018 m, 157977 m/sec, 23168296 t fired, .
Time elapsed: 75 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 2 0 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 37/355 20/32 AirplaneLD-PT-0050-CTLFireability-07 4447386 m, 110873 m/sec, 27471326 t fired, .
Time elapsed: 80 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 30 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-07
lola: result : false
lola: markings : 4471222
lola: fired transitions : 29409352
lola: time used : 39.000000
lola: memory pages used : 20
lola: LAUNCH task # 23 (type EXCL) for 18 AirplaneLD-PT-0050-CTLFireability-06
lola: time limit : 390 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 1 1 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 3/390 6/32 AirplaneLD-PT-0050-CTLFireability-06 1225397 m, 245079 m/sec, 2182315 t fired, .
Time elapsed: 85 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-06: CONJ 0 1 1 0 3 0 0 1
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 8/390 12/32 AirplaneLD-PT-0050-CTLFireability-06 2621752 m, 279271 m/sec, 5089312 t fired, .
Time elapsed: 90 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 23 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-06
lola: result : false
lola: markings : 3940515
lola: fired transitions : 8053814
lola: time used : 12.000000
lola: memory pages used : 17
lola: LAUNCH task # 16 (type EXCL) for 15 AirplaneLD-PT-0050-CTLFireability-05
lola: time limit : 500 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 1/500 2/32 AirplaneLD-PT-0050-CTLFireability-05 264581 m, 52916 m/sec, 415181 t fired, .
Time elapsed: 95 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 6/500 10/32 AirplaneLD-PT-0050-CTLFireability-05 2055208 m, 358125 m/sec, 3650680 t fired, .
Time elapsed: 100 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 11/500 16/32 AirplaneLD-PT-0050-CTLFireability-05 3347485 m, 258455 m/sec, 5790322 t fired, .
Time elapsed: 105 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 16 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-05
lola: result : false
lola: markings : 3940515
lola: fired transitions : 7553836
lola: time used : 13.000000
lola: memory pages used : 18
lola: LAUNCH task # 13 (type EXCL) for 12 AirplaneLD-PT-0050-CTLFireability-04
lola: time limit : 582 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 3/582 3/32 AirplaneLD-PT-0050-CTLFireability-04 665069 m, 133013 m/sec, 2732268 t fired, .
Time elapsed: 110 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 8/582 8/32 AirplaneLD-PT-0050-CTLFireability-04 1824266 m, 231839 m/sec, 7505330 t fired, .
Time elapsed: 115 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 13/582 10/32 AirplaneLD-PT-0050-CTLFireability-04 2247827 m, 84712 m/sec, 10687344 t fired, .
Time elapsed: 120 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 18/582 13/32 AirplaneLD-PT-0050-CTLFireability-04 2891582 m, 128751 m/sec, 13656888 t fired, .
Time elapsed: 125 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 23/582 16/32 AirplaneLD-PT-0050-CTLFireability-04 3648655 m, 151414 m/sec, 17143785 t fired, .
Time elapsed: 130 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0050-CTLFireability-08: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 28/582 20/32 AirplaneLD-PT-0050-CTLFireability-04 4436327 m, 157534 m/sec, 20924265 t fired, .
Time elapsed: 135 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 13 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-04
lola: result : true
lola: markings : 4471222
lola: fired transitions : 23858689
lola: time used : 31.000000
lola: memory pages used : 20
lola: LAUNCH task # 7 (type EXCL) for 6 AirplaneLD-PT-0050-CTLFireability-02
lola: time limit : 692 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-02
lola: result : false
lola: markings : 15656
lola: fired transitions : 64797
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 AirplaneLD-PT-0050-CTLFireability-01
lola: time limit : 865 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-01
lola: result : false
lola: markings : 1214
lola: fired transitions : 2739
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 AirplaneLD-PT-0050-CTLFireability-00
lola: time limit : 1154 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-00
lola: result : false
lola: markings : 107
lola: fired transitions : 119
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 32 AirplaneLD-PT-0050-CTLFireability-08
lola: time limit : 1731 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-08
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 32 AirplaneLD-PT-0050-CTLFireability-08
lola: time limit : 3462 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for AirplaneLD-PT-0050-CTLFireability-08
lola: result : false
lola: markings : 7
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-CTLFireability-00: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-01: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-02: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-04: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-PT-0050-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-08: CONJ false CTL model checker
AirplaneLD-PT-0050-CTLFireability-09: CTL false CTL model checker
AirplaneLD-PT-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-11: CTL true CTL model checker
AirplaneLD-PT-0050-CTLFireability-12: DISJ true CTL model checker
AirplaneLD-PT-0050-CTLFireability-13: EG false skeleton: state space / EG
AirplaneLD-PT-0050-CTLFireability-14: CONJ true CONJ
AirplaneLD-PT-0050-CTLFireability-15: EGEF false skeleton: CTL model checker
Time elapsed: 138 secs. Pages in use: 20
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0050"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is AirplaneLD-PT-0050, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-oct2-167813594000258"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0050.tgz
mv AirplaneLD-PT-0050 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;