fond

jQuery Multi Level CSS Menu Css3Menu.com

Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r006-oct2-167813594000250
Last Updated
May 14, 2023

About the Execution of LoLA for AirplaneLD-PT-0020

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
355.836 10500.00 11597.00 2.50 FTTFTTFFTTFFTFTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r006-oct2-167813594000250.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is AirplaneLD-PT-0020, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-oct2-167813594000250
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 936K
-rw-r--r-- 1 mcc users 24K Feb 26 11:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 142K Feb 26 11:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 11:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 80K Feb 26 11:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 8.4K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 39K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 35K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 26K Feb 26 11:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 140K Feb 26 11:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 34K Feb 26 11:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 242K Feb 26 11:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.6K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 91K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-00
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-01
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-02
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-03
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-04
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-05
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-06
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-07
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-08
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-09
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-10
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-11
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-12
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-13
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-14
FORMULA_NAME AirplaneLD-PT-0020-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678290447391

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-PT-0020
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT AirplaneLD-PT-0020
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA AirplaneLD-PT-0020-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0020-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678290457891

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:135
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:114
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 54 (type EXCL) for 53 AirplaneLD-PT-0020-CTLFireability-15
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 63 (type SKEL/SRCH) for 10 AirplaneLD-PT-0020-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 63 (type SKEL/SRCH) for AirplaneLD-PT-0020-CTLFireability-02
lola: result : true
lola: markings : 485
lola: fired transitions : 1620
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 57 (type SKEL/FNDP) for 16 AirplaneLD-PT-0020-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 16 AirplaneLD-PT-0020-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 62 (type SKEL/SRCH) for 16 AirplaneLD-PT-0020-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 62 (type SKEL/SRCH) for AirplaneLD-PT-0020-CTLFireability-04
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for AirplaneLD-PT-0020-CTLFireability-04 (obsolete)
lola: CANCELED task # 58 (type EQUN) for AirplaneLD-PT-0020-CTLFireability-04 (obsolete)
lola: FINISHED task # 58 (type SKEL/EQUN) for AirplaneLD-PT-0020-CTLFireability-04
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 59 (type FNDP) for 50 AirplaneLD-PT-0020-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type EQUN) for 50 AirplaneLD-PT-0020-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type SRCH) for 50 AirplaneLD-PT-0020-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type SRCH) for AirplaneLD-PT-0020-CTLFireability-14
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 57 (type SKEL/FNDP) for AirplaneLD-PT-0020-CTLFireability-04
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
sara: try reading problem file /home/mcc/execution/CTLFireability-60.sara.
sara: place or transition ordering is non-deterministic
lola: planning for AirplaneLD-PT-0020-CTLFireability-02 stopped (result already fixed).

lola: FINISHED task # 60 (type EQUN) for AirplaneLD-PT-0020-CTLFireability-14
lola: result : true
lola: CANCELED task # 59 (type FNDP) for AirplaneLD-PT-0020-CTLFireability-14 (obsolete)
lola: FINISHED task # 59 (type FNDP) for AirplaneLD-PT-0020-CTLFireability-14
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 66 (type FNDP) for 16 AirplaneLD-PT-0020-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 16 AirplaneLD-PT-0020-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SRCH) for 16 AirplaneLD-PT-0020-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type SRCH) for AirplaneLD-PT-0020-CTLFireability-04
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 66 (type FNDP) for AirplaneLD-PT-0020-CTLFireability-04
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 67 (type EQUN) for AirplaneLD-PT-0020-CTLFireability-04 (obsolete)
lola: LAUNCH task # 70 (type FNDP) for 35 AirplaneLD-PT-0020-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type EQUN) for 35 AirplaneLD-PT-0020-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SRCH) for 35 AirplaneLD-PT-0020-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type EQUN) for AirplaneLD-PT-0020-CTLFireability-04
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 73 (type SRCH) for AirplaneLD-PT-0020-CTLFireability-09
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 70 (type FNDP) for AirplaneLD-PT-0020-CTLFireability-09
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: RELEASE
lola: RELEASE
lola: CANCELED task # 71 (type EQUN) for AirplaneLD-PT-0020-CTLFireability-09 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: try reading problem file /home/mcc/execution/CTLFireability-71.sara.
sara: place or transition ordering is non-deterministic

lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 71 (type EQUN) for AirplaneLD-PT-0020-CTLFireability-09
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 74 (type SKEL/SRCH) for 26 AirplaneLD-PT-0020-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 74 (type SKEL/SRCH) for AirplaneLD-PT-0020-CTLFireability-06
lola: result : false
lola: markings : 39
lola: fired transitions : 38
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 76 (type FNDP) for 0 AirplaneLD-PT-0020-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type EQUN) for 0 AirplaneLD-PT-0020-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 79 (type SRCH) for 0 AirplaneLD-PT-0020-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 79 (type SRCH) for AirplaneLD-PT-0020-CTLFireability-00
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 76 (type FNDP) for AirplaneLD-PT-0020-CTLFireability-00
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 77 (type EQUN) for AirplaneLD-PT-0020-CTLFireability-00 (obsolete)
sara: try reading problem file /home/mcc/execution/CTLFireability-77.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 77 (type EQUN) for AirplaneLD-PT-0020-CTLFireability-00
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 54 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-15
lola: result : true
lola: markings : 308302
lola: fired transitions : 1511451
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 48 (type EXCL) for 47 AirplaneLD-PT-0020-CTLFireability-13
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-13
lola: result : false
lola: markings : 111215
lola: fired transitions : 117766
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 44 AirplaneLD-PT-0020-CTLFireability-12
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-12
lola: result : true
lola: markings : 494
lola: fired transitions : 581
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 AirplaneLD-PT-0020-CTLFireability-11
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-11
lola: result : false
lola: markings : 259768
lola: fired transitions : 973733
lola: time used : 0.000000
lola: memory pages used : 2
lola: LAUNCH task # 33 (type EXCL) for 32 AirplaneLD-PT-0020-CTLFireability-08
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-08
lola: result : true
lola: markings : 308302
lola: fired transitions : 2167170
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 30 (type EXCL) for 29 AirplaneLD-PT-0020-CTLFireability-07
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 30 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-07
lola: result : false
lola: markings : 238
lola: fired transitions : 294
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 13 AirplaneLD-PT-0020-CTLFireability-03
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-03
lola: result : false
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 8 (type EXCL) for 7 AirplaneLD-PT-0020-CTLFireability-01
lola: time limit : 719 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0020-CTLFireability-02: CTL true skeleton: CTL model checker
AirplaneLD-PT-0020-CTLFireability-03: CTL false CTL model checker
AirplaneLD-PT-0020-CTLFireability-06: EG false skeleton: state space / EG
AirplaneLD-PT-0020-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0020-CTLFireability-08: CTL true CTL model checker
AirplaneLD-PT-0020-CTLFireability-09: EF true findpath
AirplaneLD-PT-0020-CTLFireability-11: CTL false CTL model checker
AirplaneLD-PT-0020-CTLFireability-12: CTL true CTL model checker
AirplaneLD-PT-0020-CTLFireability-13: CTL false CTL model checker
AirplaneLD-PT-0020-CTLFireability-14: EF true state equation
AirplaneLD-PT-0020-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-PT-0020-CTLFireability-00: DISJ 0 1 0 0 5 0 0 1
AirplaneLD-PT-0020-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
AirplaneLD-PT-0020-CTLFireability-04: CONJ 0 1 0 0 7 0 0 2
AirplaneLD-PT-0020-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-PT-0020-CTLFireability-10: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 1/719 1/32 AirplaneLD-PT-0020-CTLFireability-01 150713 m, 30142 m/sec, 1864670 t fired, .

Time elapsed: 5 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 8 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-01
lola: result : true
lola: markings : 308302
lola: fired transitions : 4594974
lola: time used : 4.000000
lola: memory pages used : 2
lola: LAUNCH task # 3 (type EXCL) for 0 AirplaneLD-PT-0020-CTLFireability-00
lola: time limit : 898 sec
lola: memory limit: 32 pages
lola: FINISHED task # 3 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-00
lola: result : false
lola: markings : 7
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 AirplaneLD-PT-0020-CTLFireability-10
lola: time limit : 1197 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-10
lola: result : false
lola: markings : 7
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 16 AirplaneLD-PT-0020-CTLFireability-04
lola: time limit : 1796 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-04
lola: result : true
lola: markings : 308302
lola: fired transitions : 2031713
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 24 (type EXCL) for 23 AirplaneLD-PT-0020-CTLFireability-05
lola: time limit : 3591 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for AirplaneLD-PT-0020-CTLFireability-05
lola: result : true
lola: markings : 308302
lola: fired transitions : 2264021
lola: time used : 1.000000
lola: memory pages used : 2
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0020-CTLFireability-00: DISJ false DISJ
AirplaneLD-PT-0020-CTLFireability-01: CTL true CTL model checker
AirplaneLD-PT-0020-CTLFireability-02: CTL true skeleton: CTL model checker
AirplaneLD-PT-0020-CTLFireability-03: CTL false CTL model checker
AirplaneLD-PT-0020-CTLFireability-04: CONJ true CONJ
AirplaneLD-PT-0020-CTLFireability-05: CTL true CTL model checker
AirplaneLD-PT-0020-CTLFireability-06: EG false skeleton: state space / EG
AirplaneLD-PT-0020-CTLFireability-07: CTL false CTL model checker
AirplaneLD-PT-0020-CTLFireability-08: CTL true CTL model checker
AirplaneLD-PT-0020-CTLFireability-09: EF true findpath
AirplaneLD-PT-0020-CTLFireability-10: CTL false CTL model checker
AirplaneLD-PT-0020-CTLFireability-11: CTL false CTL model checker
AirplaneLD-PT-0020-CTLFireability-12: CTL true CTL model checker
AirplaneLD-PT-0020-CTLFireability-13: CTL false CTL model checker
AirplaneLD-PT-0020-CTLFireability-14: EF true state equation
AirplaneLD-PT-0020-CTLFireability-15: CTL true CTL model checker


Time elapsed: 10 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0020"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is AirplaneLD-PT-0020, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-oct2-167813594000250"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0020.tgz
mv AirplaneLD-PT-0020 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;