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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r006-oct2-167813594000198
Last Updated
May 14, 2023

About the Execution of LoLA for AirplaneLD-COL-0100

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
10152.264 26648.00 94196.00 12.60 FFFFFTTTTFTFTTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r006-oct2-167813594000198.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is AirplaneLD-COL-0100, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-oct2-167813594000198
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 564K
-rw-r--r-- 1 mcc users 7.3K Feb 26 11:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 26 11:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Feb 26 11:11 CTLFireability.txt
-rw-r--r-- 1 mcc users 66K Feb 26 11:11 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 11:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 156K Feb 26 11:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.9K Feb 26 11:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 76K Feb 26 11:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 52K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-00
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-01
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-02
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-03
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-04
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-05
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-06
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-07
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-08
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-09
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-10
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-11
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-12
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-13
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-14
FORMULA_NAME AirplaneLD-COL-0100-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678286907856

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-COL-0100
Not applying reductions.
Model is COL
ReachabilityCardinality COL
starting LoLA
BK_INPUT AirplaneLD-COL-0100
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0100-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678286934504

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 55 (type SKEL/FNDP) for 18 AirplaneLD-COL-0100-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/EQUN) for 18 AirplaneLD-COL-0100-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 62 (type SKEL/SRCH) for 18 AirplaneLD-COL-0100-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type SKEL/SRCH) for 18 AirplaneLD-COL-0100-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 63 (type SKEL/SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-06
lola: result : false
lola: markings : 15
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS DONE
lola: Places: 719, Transitions: 808
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 55 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 60 (type EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 62 (type SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 72 (type SKEL/FNDP) for 45 AirplaneLD-COL-0100-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/EQUN) for 45 AirplaneLD-COL-0100-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SKEL/SRCH) for 45 AirplaneLD-COL-0100-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/SRCH) for 45 AirplaneLD-COL-0100-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 62 (type SKEL/SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-06
lola: result : false
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 55 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 25336
lola: tried executions : 8447
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 75 (type SKEL/SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-15
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 76 (type SKEL/SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-15
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 72 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 73 (type EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 86 (type SKEL/FNDP) for 24 AirplaneLD-COL-0100-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SKEL/FNDP) for 27 AirplaneLD-COL-0100-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type SKEL/EQUN) for 27 AirplaneLD-COL-0100-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SKEL/SRCH) for 27 AirplaneLD-COL-0100-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 73 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-15
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 113 (type SKEL/SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-09
lola: result : true
lola: markings : 31
lola: fired transitions : 41
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 110 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 111 (type EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-09 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-60.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 54 (type SKEL/FNDP) for 12 AirplaneLD-COL-0100-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type SKEL/EQUN) for 12 AirplaneLD-COL-0100-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SKEL/FNDP) for 0 AirplaneLD-COL-0100-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 110 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 143
lola: tried executions : 19
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans t2_1
lola: @ trans SampleRW
lola: @ trans getAlt
lola: @ trans t3_2
lola: @ trans t4_1

lola: @ trans t1_2
lola: @ trans t1_1
lola: @ trans SpeedLW
lola: @ trans t5_2
lola: FINISHED task # 60 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-06
lola: result : false
lola: @ trans t5_1
lola: @ trans t2_2
lola: @ trans t3_1
lola: @ trans SampleLW
lola: @ trans SpeedRW
lola: @ trans t4_2
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-119.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-111.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147

lola: FINISHED task # 119 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 54 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 144 (type SKEL/FNDP) for 15 AirplaneLD-COL-0100-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 166 (type SKEL/EQUN) for 15 AirplaneLD-COL-0100-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 54 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 302851
lola: tried executions : 302852
lola: time used : 1.000000
lola: memory pages used : 0

lola: FINISHED task # 111 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-09
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-166.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 166 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-05
lola: result : unknown
lola: LAUNCH task # 145 (type SKEL/FNDP) for 6 AirplaneLD-COL-0100-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0100-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-06: AG true skeleton: tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0100-ReachabilityCardinality-00: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-02: EF 0 4 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-03: EF 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-05: AG 0 3 1 0 1 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-07: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-09: AG 0 0 0 0 3 0 0 2
AirplaneLD-COL-0100-ReachabilityCardinality-10: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-12: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-13: AG 0 5 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
86 EF FNDP 5/237 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-08 3592500 t fired, 3592501 attempts, .
131 EF FNDP 5/255 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-00 3566087 t fired, 3566088 attempts, .
144 EF FNDP 4/238 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-05 12692002 t fired, 12692003 attempts, .
145 EF FNDP 3/239 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-02 2850779 t fired, 456780 attempts, .

Time elapsed: 6 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 AirplaneLD-COL-0100-ReachabilityCardinality-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 16 (type CNST) for 15 AirplaneLD-COL-0100-ReachabilityCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 25 (type CNST) for 24 AirplaneLD-COL-0100-ReachabilityCardinality-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 16 (type CNST) for AirplaneLD-COL-0100-ReachabilityCardinality-05
lola: result : true
lola: FINISHED task # 1 (type CNST) for AirplaneLD-COL-0100-ReachabilityCardinality-00
lola: result : false
lola: LAUNCH INITIAL
lola: LAUNCH task # 37 (type CNST) for 36 AirplaneLD-COL-0100-ReachabilityCardinality-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: CANCELED task # 131 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 144 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-05 (obsolete)
lola: FINISHED task # 144 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 13657927
lola: tried executions : 13657928
lola: time used : 4.000000
lola: memory pages used : 0
lola: FINISHED task # 25 (type CNST) for AirplaneLD-COL-0100-ReachabilityCardinality-08
lola: result : true
lola: CANCELED task # 86 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 128 (type SKEL/FNDP) for 39 AirplaneLD-COL-0100-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SKEL/EQUN) for 39 AirplaneLD-COL-0100-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Rule S: 0 transitions removed,0 places removed
lola: FINISHED task # 37 (type CNST) for AirplaneLD-COL-0100-ReachabilityCardinality-12
lola: result : true
lola: LAUNCH task # 122 (type SKEL/FNDP) for 33 AirplaneLD-COL-0100-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 131 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 3833520
lola: tried executions : 3833521
lola: time used : 5.000000
lola: memory pages used : 0
lola: FINISHED task # 86 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 3841973
lola: tried executions : 3841974
lola: time used : 5.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 122 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 92 (type SKEL/FNDP) for 42 AirplaneLD-COL-0100-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-139.sara.
sara: place or transition ordering is non-deterministic

lola: planning for AirplaneLD-COL-0100-ReachabilityCardinality-04 stopped (result already fixed).
lola: planning for AirplaneLD-COL-0100-ReachabilityCardinality-06 stopped (result already fixed).
lola: FINISHED task # 139 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 128 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 102 (type SKEL/FNDP) for 9 AirplaneLD-COL-0100-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SKEL/EQUN) for 9 AirplaneLD-COL-0100-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 128 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 28150
lola: tried executions : 4088
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: planning for AirplaneLD-COL-0100-ReachabilityCardinality-13 stopped (result already fixed).
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 103 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 102 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 189 (type EXCL) for 33 AirplaneLD-COL-0100-ReachabilityCardinality-11
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 204 (type FNDP) for 30 AirplaneLD-COL-0100-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 102 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 15865
lola: tried executions : 7934
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 189 (type EXCL) for AirplaneLD-COL-0100-ReachabilityCardinality-11
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 176 (type EXCL) for 21 AirplaneLD-COL-0100-ReachabilityCardinality-07
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 176 (type EXCL) for AirplaneLD-COL-0100-ReachabilityCardinality-07
lola: result : false
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 222 (type EXCL) for 27 AirplaneLD-COL-0100-ReachabilityCardinality-09
lola: time limit : 718 sec
lola: memory limit: 32 pages
lola: FINISHED task # 222 (type EXCL) for AirplaneLD-COL-0100-ReachabilityCardinality-09
lola: result : true
lola: markings : 9
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 195 (type EXCL) for 42 AirplaneLD-COL-0100-ReachabilityCardinality-14
lola: time limit : 898 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0100-ReachabilityCardinality-00: EF false preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-03: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-05: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-06: AG true skeleton: tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-07: AG true tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-08: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-09: AG false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-11: AG false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-12: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-13: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0100-ReachabilityCardinality-01: AG 0 10 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-02: EF 0 9 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-10: AG 0 9 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-14: EF 0 8 2 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
92 EF FNDP 5/299 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-14 3849934 t fired, 496714 attempts, .
145 EF FNDP 8/296 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-02 5788000 t fired, 927830 attempts, .
195 EF EXCL 5/898 4/32 AirplaneLD-COL-0100-ReachabilityCardinality-14 688874 m, 137774 m/sec, 912195 t fired, .
204 EF FNDP 5/299 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-10 150012 t fired, 75007 attempts, .

Time elapsed: 11 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0100-ReachabilityCardinality-00: EF false preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-03: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-05: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-06: AG true skeleton: tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-07: AG true tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-08: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-09: AG false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-11: AG false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-12: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-13: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0100-ReachabilityCardinality-01: AG 0 10 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-02: EF 0 9 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-10: AG 0 9 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-14: EF 0 8 2 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
92 EF FNDP 10/294 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-14 7379976 t fired, 952232 attempts, .
145 EF FNDP 13/291 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-02 8261355 t fired, 1324650 attempts, .
195 EF EXCL 10/898 8/32 AirplaneLD-COL-0100-ReachabilityCardinality-14 1468863 m, 155997 m/sec, 1945059 t fired, .
204 EF FNDP 10/294 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-10 303436 t fired, 151719 attempts, .

Time elapsed: 16 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0100-ReachabilityCardinality-00: EF false preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-03: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-05: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-06: AG true skeleton: tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-07: AG true tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-08: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-09: AG false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-11: AG false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-12: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-13: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0100-ReachabilityCardinality-01: AG 0 10 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-02: EF 0 9 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-10: AG 0 9 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-14: EF 0 8 2 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
92 EF FNDP 15/289 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-14 10329589 t fired, 1333088 attempts, .
145 EF FNDP 18/286 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-02 10380960 t fired, 1664718 attempts, .
195 EF EXCL 15/898 11/32 AirplaneLD-COL-0100-ReachabilityCardinality-14 2253678 m, 156963 m/sec, 2984335 t fired, .
204 EF FNDP 15/289 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-10 409140 t fired, 204571 attempts, .

Time elapsed: 21 secs. Pages in use: 11
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0100-ReachabilityCardinality-00: EF false preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-03: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-05: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-06: AG true skeleton: tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-07: AG true tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-08: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-09: AG false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-11: AG false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-12: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-13: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-15: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0100-ReachabilityCardinality-01: AG 0 10 0 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-02: EF 0 9 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-10: AG 0 9 1 0 0 0 0 0
AirplaneLD-COL-0100-ReachabilityCardinality-14: EF 0 8 2 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
92 EF FNDP 20/284 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-14 13114449 t fired, 1692618 attempts, .
145 EF FNDP 23/281 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-02 12425988 t fired, 1992918 attempts, .
195 EF EXCL 20/898 15/32 AirplaneLD-COL-0100-ReachabilityCardinality-14 3024804 m, 154225 m/sec, 4005458 t fired, .
204 EF FNDP 20/284 0/5 AirplaneLD-COL-0100-ReachabilityCardinality-10 523110 t fired, 261556 attempts, .

Time elapsed: 26 secs. Pages in use: 15
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 195 (type EXCL) for AirplaneLD-COL-0100-ReachabilityCardinality-14
lola: result : false
lola: markings : 3100203
lola: fired transitions : 4105301
lola: time used : 20.000000
lola: memory pages used : 16
lola: CANCELED task # 92 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 215 (type EXCL) for 3 AirplaneLD-COL-0100-ReachabilityCardinality-01
lola: time limit : 1191 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 211 (type FNDP) for 3 AirplaneLD-COL-0100-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 92 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 13406539
lola: tried executions : 1730338
lola: time used : 20.000000
lola: memory pages used : 0
lola: FINISHED task # 215 (type EXCL) for AirplaneLD-COL-0100-ReachabilityCardinality-01
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 211 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 208 (type EXCL) for 30 AirplaneLD-COL-0100-ReachabilityCardinality-10
lola: time limit : 1787 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 158 (type SKEL/EQUN) for 6 AirplaneLD-COL-0100-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 211 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-158.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 158 (type SKEL/EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 145 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 205 (type EQUN) for 30 AirplaneLD-COL-0100-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 207 (type SRCH) for 30 AirplaneLD-COL-0100-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 145 (type SKEL/FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 12712381
lola: tried executions : 2038763
lola: time used : 24.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 207 (type SRCH) for AirplaneLD-COL-0100-ReachabilityCardinality-10
lola: result : false
lola: markings : 101
lola: fired transitions : 100
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 204 (type FNDP) for AirplaneLD-COL-0100-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 205 (type EQUN) for AirplaneLD-COL-0100-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 208 (type EXCL) for AirplaneLD-COL-0100-ReachabilityCardinality-10 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0100-ReachabilityCardinality-00: EF false preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-01: AG false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-02: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-03: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-04: EF false skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-05: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-06: AG true skeleton: tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-07: AG true tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-08: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-09: AG false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-10: AG true tandem / insertion
AirplaneLD-COL-0100-ReachabilityCardinality-11: AG false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-12: AG true preprocessing
AirplaneLD-COL-0100-ReachabilityCardinality-13: AG true skeleton: state equation
AirplaneLD-COL-0100-ReachabilityCardinality-14: EF false tandem / relaxed
AirplaneLD-COL-0100-ReachabilityCardinality-15: AG true skeleton: tandem / insertion


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0100"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is AirplaneLD-COL-0100, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-oct2-167813594000198"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0100.tgz
mv AirplaneLD-COL-0100 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;