About the Execution of LoLA for AirplaneLD-COL-0050
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
4362.155 | 532214.00 | 548334.00 | 60.20 | FFFTTFFFFTTFTTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r006-oct2-167813593900186.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is AirplaneLD-COL-0050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-oct2-167813593900186
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 552K
-rw-r--r-- 1 mcc users 7.0K Feb 26 11:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 26 11:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 26 11:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 83K Feb 26 11:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 11:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 142K Feb 26 11:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.7K Feb 26 11:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 73K Feb 26 11:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 46K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-00
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-01
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-02
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-03
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-04
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-05
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-06
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-07
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-08
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-09
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-10
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-11
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-12
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-13
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-14
FORMULA_NAME AirplaneLD-COL-0050-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678286589521
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-COL-0050
Not applying reductions.
Model is COL
CTLFireability PT
[2023-03-08 14:43:12] [INFO ] Running its-tools with arguments : [-pnfolder, ., -examination, CTLFireability, --reduce-single, STATESPACE]
[2023-03-08 14:43:12] [INFO ] Parsing pnml file : /home/mcc/execution/./model.pnml
[2023-03-08 14:43:12] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-08 14:43:12] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-08 14:43:13] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 668 ms
[2023-03-08 14:43:13] [INFO ] Detected 3 constant HL places corresponding to 152 PT places.
[2023-03-08 14:43:13] [INFO ] Imported 20 HL places and 15 HL transitions for a total of 369 PT places and 612.0 transition bindings in 17 ms.
Parsed 16 properties from file ./CTLFireability.xml in 26 ms.
[2023-03-08 14:43:13] [INFO ] Unfolded HLPN to a Petri net with 369 places and 408 transitions 1145 arcs in 38 ms.
[2023-03-08 14:43:13] [INFO ] Unfolded 16 HLPN properties in 1 ms.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 49 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 99 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:43:13] [INFO ] Export to MCC of 16 properties in file ./CTLFireability.STATESPACE.xml took 44 ms.
[2023-03-08 14:43:13] [INFO ] Export to PNML in file ./model.STATESPACE.pnml of net with 369 places, 408 transitions and 1145 arcs took 5 ms.
Total runtime 1024 ms.
starting LoLA
BK_INPUT AirplaneLD-COL-0050
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution/unfCTLFireability
FORMULA AirplaneLD-COL-0050-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AirplaneLD-COL-0050-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678287121735
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/unfCTLFireability/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/unfCTLFireability/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/unfCTLFireability/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 56 (type SKEL/SRCH) for 12 AirplaneLD-COL-0050-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 56 (type SKEL/SRCH) for AirplaneLD-COL-0050-CTLFireability-04
lola: result : true
lola: markings : 4510
lola: fired transitions : 21168
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 57 (type SKEL/SRCH) for 18 AirplaneLD-COL-0050-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 57 (type SKEL/SRCH) for AirplaneLD-COL-0050-CTLFireability-06
lola: result : false
lola: markings : 485
lola: fired transitions : 1863
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: planning for AirplaneLD-COL-0050-CTLFireability-04 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 59 (type SKEL/FNDP) for 35 AirplaneLD-COL-0050-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/EQUN) for 35 AirplaneLD-COL-0050-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 35 AirplaneLD-COL-0050-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/SRCH) for 35 AirplaneLD-COL-0050-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 61 (type SKEL/SRCH) for AirplaneLD-COL-0050-CTLFireability-09
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 59 (type FNDP) for AirplaneLD-COL-0050-CTLFireability-09 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 60 (type EQUN) for AirplaneLD-COL-0050-CTLFireability-09 (obsolete)
lola: CANCELED task # 62 (type SRCH) for AirplaneLD-COL-0050-CTLFireability-09 (obsolete)
lola: planning for (null) stopped (result already fixed).
lola: FINISHED task # 59 (type SKEL/FNDP) for AirplaneLD-COL-0050-CTLFireability-09
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: LAUNCH task # 48 (type EXCL) for 47 AirplaneLD-COL-0050-CTLFireability-13
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
sara: try reading problem file /home/mcc/execution/unfCTLFireability/CTLCardinality-60.sara.
lola: FINISHED task # 60 (type SKEL/EQUN) for AirplaneLD-COL-0050-CTLFireability-09
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 63 (type SKEL/SRCH) for 29 AirplaneLD-COL-0050-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 63 (type SKEL/SRCH) for AirplaneLD-COL-0050-CTLFireability-07
lola: result : false
lola: markings : 4188
lola: fired transitions : 50391
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 64 (type FNDP) for 35 AirplaneLD-COL-0050-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type EQUN) for 35 AirplaneLD-COL-0050-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SRCH) for 35 AirplaneLD-COL-0050-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type SRCH) for AirplaneLD-COL-0050-CTLFireability-09
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 64 (type FNDP) for AirplaneLD-COL-0050-CTLFireability-09
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 65 (type EQUN) for AirplaneLD-COL-0050-CTLFireability-09 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 65 (type EQUN) for AirplaneLD-COL-0050-CTLFireability-09
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-06: CONJ 0 2 0 0 4 0 0 0
AirplaneLD-COL-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 5/256 3/32 AirplaneLD-COL-0050-CTLFireability-13 528857 m, 105771 m/sec, 2422917 t fired, .
Time elapsed: 11 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-06: CONJ 0 2 0 0 4 0 0 0
AirplaneLD-COL-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 10/256 5/32 AirplaneLD-COL-0050-CTLFireability-13 1061976 m, 106623 m/sec, 4983262 t fired, .
Time elapsed: 16 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-06: CONJ 0 2 0 0 4 0 0 0
AirplaneLD-COL-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 15/256 8/32 AirplaneLD-COL-0050-CTLFireability-13 1579526 m, 103510 m/sec, 7611522 t fired, .
Time elapsed: 21 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-06: CONJ 0 2 0 0 4 0 0 0
AirplaneLD-COL-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 20/256 10/32 AirplaneLD-COL-0050-CTLFireability-13 2005442 m, 85183 m/sec, 10079119 t fired, .
Time elapsed: 26 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-06: CONJ 0 2 0 0 4 0 0 0
AirplaneLD-COL-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
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48 CTL EXCL 25/256 13/32 AirplaneLD-COL-0050-CTLFireability-13 2623817 m, 123675 m/sec, 12734718 t fired, .
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48 CTL EXCL 30/256 15/32 AirplaneLD-COL-0050-CTLFireability-13 3076329 m, 90502 m/sec, 15301433 t fired, .
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48 CTL EXCL 35/256 17/32 AirplaneLD-COL-0050-CTLFireability-13 3526993 m, 90132 m/sec, 17819410 t fired, .
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48 CTL EXCL 40/256 19/32 AirplaneLD-COL-0050-CTLFireability-13 3944512 m, 83503 m/sec, 20436601 t fired, .
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48 CTL EXCL 45/256 21/32 AirplaneLD-COL-0050-CTLFireability-13 4335229 m, 78143 m/sec, 23019054 t fired, .
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lola: FINISHED task # 48 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-13
lola: result : true
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54 CTL EXCL 3/272 1/32 AirplaneLD-COL-0050-CTLFireability-15 171262 m, 34252 m/sec, 1216877 t fired, .
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54 CTL EXCL 8/272 3/32 AirplaneLD-COL-0050-CTLFireability-15 446602 m, 55068 m/sec, 3324083 t fired, .
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54 CTL EXCL 13/272 4/32 AirplaneLD-COL-0050-CTLFireability-15 728870 m, 56453 m/sec, 5311266 t fired, .
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54 CTL EXCL 18/272 5/32 AirplaneLD-COL-0050-CTLFireability-15 962020 m, 46630 m/sec, 7693301 t fired, .
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54 CTL EXCL 23/272 6/32 AirplaneLD-COL-0050-CTLFireability-15 1174360 m, 42468 m/sec, 10124792 t fired, .
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54 CTL EXCL 28/272 7/32 AirplaneLD-COL-0050-CTLFireability-15 1416980 m, 48524 m/sec, 12575251 t fired, .
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54 CTL EXCL 33/272 8/32 AirplaneLD-COL-0050-CTLFireability-15 1639600 m, 44524 m/sec, 15039730 t fired, .
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54 CTL EXCL 38/272 9/32 AirplaneLD-COL-0050-CTLFireability-15 1857370 m, 43554 m/sec, 17695023 t fired, .
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54 CTL EXCL 53/272 13/32 AirplaneLD-COL-0050-CTLFireability-15 2743081 m, 64492 m/sec, 23888617 t fired, .
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54 CTL EXCL 58/272 14/32 AirplaneLD-COL-0050-CTLFireability-15 2944341 m, 40252 m/sec, 26500293 t fired, .
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54 CTL EXCL 63/272 15/32 AirplaneLD-COL-0050-CTLFireability-15 3169621 m, 45056 m/sec, 29064098 t fired, .
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54 CTL EXCL 68/272 16/32 AirplaneLD-COL-0050-CTLFireability-15 3366164 m, 39308 m/sec, 31543487 t fired, .
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54 CTL EXCL 73/272 17/32 AirplaneLD-COL-0050-CTLFireability-15 3534233 m, 33613 m/sec, 33991793 t fired, .
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54 CTL EXCL 78/272 18/32 AirplaneLD-COL-0050-CTLFireability-15 3725901 m, 38333 m/sec, 36666582 t fired, .
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lola: FINISHED task # 54 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-15
lola: result : true
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45 CTL EXCL 3/288 3/32 AirplaneLD-COL-0050-CTLFireability-12 528412 m, 105682 m/sec, 1848544 t fired, .
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45 CTL EXCL 43/288 7/32 AirplaneLD-COL-0050-CTLFireability-12 1373440 m, 10924 m/sec, 22122285 t fired, .
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45 CTL EXCL 118/288 18/32 AirplaneLD-COL-0050-CTLFireability-12 3683120 m, 0 m/sec, 61177585 t fired, .
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45 CTL EXCL 123/288 18/32 AirplaneLD-COL-0050-CTLFireability-12 3787161 m, 20808 m/sec, 63860746 t fired, .
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45 CTL EXCL 128/288 19/32 AirplaneLD-COL-0050-CTLFireability-12 3922413 m, 27050 m/sec, 66850453 t fired, .
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45 CTL EXCL 133/288 20/32 AirplaneLD-COL-0050-CTLFireability-12 4208522 m, 57221 m/sec, 69381164 t fired, .
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45 CTL EXCL 148/288 20/32 AirplaneLD-COL-0050-CTLFireability-12 4289153 m, 16126 m/sec, 77391081 t fired, .
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lola: FINISHED task # 45 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-12
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33 CTL EXCL 0/330 1/32 AirplaneLD-COL-0050-CTLFireability-08 63036 m, 12607 m/sec, 184775 t fired, .
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33 CTL EXCL 5/330 4/32 AirplaneLD-COL-0050-CTLFireability-08 794009 m, 146194 m/sec, 2862857 t fired, .
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33 CTL EXCL 20/330 10/32 AirplaneLD-COL-0050-CTLFireability-08 2107119 m, 24274 m/sec, 10429419 t fired, .
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33 CTL EXCL 30/330 10/32 AirplaneLD-COL-0050-CTLFireability-08 2107119 m, 0 m/sec, 15469453 t fired, .
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33 CTL EXCL 106/330 14/32 AirplaneLD-COL-0050-CTLFireability-08 2895422 m, 0 m/sec, 51460614 t fired, .
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33 CTL EXCL 111/330 15/32 AirplaneLD-COL-0050-CTLFireability-08 3020872 m, 25090 m/sec, 54113515 t fired, .
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33 CTL EXCL 116/330 15/32 AirplaneLD-COL-0050-CTLFireability-08 3155722 m, 26970 m/sec, 56949637 t fired, .
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33 CTL EXCL 121/330 15/32 AirplaneLD-COL-0050-CTLFireability-08 3219362 m, 12728 m/sec, 59036854 t fired, .
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33 CTL EXCL 126/330 16/32 AirplaneLD-COL-0050-CTLFireability-08 3352995 m, 26726 m/sec, 61826087 t fired, .
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33 CTL EXCL 131/330 16/32 AirplaneLD-COL-0050-CTLFireability-08 3421394 m, 13679 m/sec, 64041209 t fired, .
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33 CTL EXCL 136/330 17/32 AirplaneLD-COL-0050-CTLFireability-08 3506922 m, 17105 m/sec, 66170548 t fired, .
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33 CTL EXCL 141/330 17/32 AirplaneLD-COL-0050-CTLFireability-08 3599262 m, 18468 m/sec, 68466300 t fired, .
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33 CTL EXCL 146/330 18/32 AirplaneLD-COL-0050-CTLFireability-08 3681682 m, 16484 m/sec, 70781662 t fired, .
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33 CTL EXCL 151/330 18/32 AirplaneLD-COL-0050-CTLFireability-08 3793602 m, 22384 m/sec, 72987459 t fired, .
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33 CTL EXCL 156/330 19/32 AirplaneLD-COL-0050-CTLFireability-08 3945702 m, 30420 m/sec, 75701826 t fired, .
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33 CTL EXCL 161/330 20/32 AirplaneLD-COL-0050-CTLFireability-08 4121862 m, 35232 m/sec, 78405613 t fired, .
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lola: FINISHED task # 33 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-08
lola: result : false
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AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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AirplaneLD-COL-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-06: CONJ 0 1 1 0 4 0 0 0
AirplaneLD-COL-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 7/348 6/32 AirplaneLD-COL-0050-CTLFireability-06 1236174 m, 190473 m/sec, 3688913 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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AirplaneLD-COL-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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AirplaneLD-COL-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-06: CONJ 0 1 1 0 4 0 0 0
AirplaneLD-COL-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 12/348 11/32 AirplaneLD-COL-0050-CTLFireability-06 2190932 m, 190951 m/sec, 6595248 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-06: CONJ 0 1 1 0 4 0 0 0
AirplaneLD-COL-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 17/348 15/32 AirplaneLD-COL-0050-CTLFireability-06 3094773 m, 180768 m/sec, 9497595 t fired, .
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AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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AirplaneLD-COL-0050-CTLFireability-06: CONJ 0 1 1 0 4 0 0 0
AirplaneLD-COL-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 22/348 19/32 AirplaneLD-COL-0050-CTLFireability-06 3884152 m, 157875 m/sec, 12359115 t fired, .
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lola: FINISHED task # 27 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-06
lola: result : false
lola: markings : 3940515
lola: fired transitions : 12807834
lola: time used : 22.000000
lola: memory pages used : 19
lola: LAUNCH task # 16 (type EXCL) for 15 AirplaneLD-COL-0050-CTLFireability-05
lola: time limit : 444 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/444 7/32 AirplaneLD-COL-0050-CTLFireability-05 1365323 m, 273064 m/sec, 2253230 t fired, .
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AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/444 13/32 AirplaneLD-COL-0050-CTLFireability-05 2770024 m, 280940 m/sec, 4834664 t fired, .
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AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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AirplaneLD-COL-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
AirplaneLD-COL-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/444 19/32 AirplaneLD-COL-0050-CTLFireability-05 3938490 m, 233693 m/sec, 7480779 t fired, .
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lola: FINISHED task # 16 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-05
lola: result : false
lola: markings : 3940522
lola: fired transitions : 7553849
lola: time used : 15.000000
lola: memory pages used : 19
lola: LAUNCH task # 10 (type EXCL) for 9 AirplaneLD-COL-0050-CTLFireability-03
lola: time limit : 516 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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AirplaneLD-COL-0050-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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AirplaneLD-COL-0050-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/516 6/32 AirplaneLD-COL-0050-CTLFireability-03 1086824 m, 217364 m/sec, 2163309 t fired, .
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lola: FINISHED task # 10 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-03
lola: result : true
lola: markings : 1576207
lola: fired transitions : 3639106
lola: time used : 8.000000
lola: memory pages used : 8
lola: LAUNCH task # 7 (type EXCL) for 6 AirplaneLD-COL-0050-CTLFireability-02
lola: time limit : 618 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-02
lola: result : false
lola: markings : 5216
lola: fired transitions : 18144
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 AirplaneLD-COL-0050-CTLFireability-01
lola: time limit : 772 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-01
lola: result : false
lola: markings : 521227
lola: fired transitions : 773668
lola: time used : 1.000000
lola: memory pages used : 3
lola: LAUNCH task # 1 (type EXCL) for 0 AirplaneLD-COL-0050-CTLFireability-00
lola: time limit : 1029 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0050-CTLFireability-01: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-02: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
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AirplaneLD-COL-0050-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 1/1029 1/32 AirplaneLD-COL-0050-CTLFireability-00 92988 m, 18597 m/sec, 135927 t fired, .
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lola: FINISHED task # 1 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-00
lola: result : false
lola: markings : 525519
lola: fired transitions : 1038102
lola: time used : 3.000000
lola: memory pages used : 3
lola: LAUNCH task # 39 (type EXCL) for 38 AirplaneLD-COL-0050-CTLFireability-10
lola: time limit : 1543 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-10
lola: result : true
lola: markings : 12
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 50 AirplaneLD-COL-0050-CTLFireability-14
lola: time limit : 3086 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0050-CTLFireability-00: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-01: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-02: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 3/3086 4/32 AirplaneLD-COL-0050-CTLFireability-14 801998 m, 160399 m/sec, 1317370 t fired, .
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AirplaneLD-COL-0050-CTLFireability-00: CTL false CTL model checker
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AirplaneLD-COL-0050-CTLFireability-03: CTL true CTL model checker
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AirplaneLD-COL-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0050-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 8/3086 10/32 AirplaneLD-COL-0050-CTLFireability-14 2107782 m, 261156 m/sec, 3509037 t fired, .
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AirplaneLD-COL-0050-CTLFireability-00: CTL false CTL model checker
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AirplaneLD-COL-0050-CTLFireability-02: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
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AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 13/3086 16/32 AirplaneLD-COL-0050-CTLFireability-14 3266796 m, 231802 m/sec, 5488264 t fired, .
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lola: FINISHED task # 51 (type EXCL) for AirplaneLD-COL-0050-CTLFireability-14
lola: result : true
lola: markings : 3415113
lola: fired transitions : 6003416
lola: time used : 14.000000
lola: memory pages used : 16
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0050-CTLFireability-00: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-01: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-02: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-03: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-04: CTL true skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-05: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-06: CONJ false CONJ
AirplaneLD-COL-0050-CTLFireability-07: CTL false skeleton: CTL model checker
AirplaneLD-COL-0050-CTLFireability-08: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-09: EF true findpath
AirplaneLD-COL-0050-CTLFireability-10: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-11: CTL false CTL model checker
AirplaneLD-COL-0050-CTLFireability-12: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-13: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-14: CTL true CTL model checker
AirplaneLD-COL-0050-CTLFireability-15: CTL true CTL model checker
Time elapsed: 528 secs. Pages in use: 21
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0050"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is AirplaneLD-COL-0050, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-oct2-167813593900186"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0050.tgz
mv AirplaneLD-COL-0050 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;