Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r001-oct2-167813588100001.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-5348
Executing tool marcie
Input is ARMCacheCoherence-PT-none, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r001-oct2-167813588100001
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 6.6K Feb 25 21:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 25 21:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 25 21:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 21:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:28 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:28 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:28 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 21:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 163K Feb 25 21:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 25 21:46 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 21:46 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 14M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-00
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-01
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-02
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-03
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-04
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-05
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-06
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-07
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-08
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-09
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-10
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-11
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-12
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-13
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-14
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678384141617

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marcie
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ARMCacheCoherence-PT-none
Not applying reductions.
Model is PT
CTLCardinality PT
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../marcie/bin/marcie --net-file=model.pnml --mcc-file=CTLCardinality.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Net: ARMCacheCoherence_PT_none
(NrP: 87 NrTr: 33676 NrArc: 246935)

parse formulas
formulas created successfully
place and transition orderings generation:0m 3.047sec

net check time: 0m 0.036sec

init dd package: 0m 3.754sec


RS generation: 0m47.652sec


-> reachability set: #nodes 6750 (6.8e+03) #states 320,567,601 (8)



starting MCC model checker
--------------------------

checking: E [AX [AF [p74<=1]] U EG [1<=p36]]
normalized: E [~ [EX [EG [~ [p74<=1]]]] U EG [1<=p36]]

abstracting: (1<=p36)
states: 21,248,200 (7)
.
EG iterations: 1
abstracting: (p74<=1)
states: 320,567,601 (8)
.
EG iterations: 1
.-> the formula is TRUE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-07 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 5.542sec

checking: EG [~ [[EG [EG [EX [1<=p72]]] | ~ [1<=p69]]]]
normalized: EG [~ [[EG [EG [EX [1<=p72]]] | ~ [1<=p69]]]]

abstracting: (1<=p69)
states: 21,600,000 (7)
abstracting: (1<=p72)
states: 64,113,520 (7)
..
EG iterations: 1
.
EG iterations: 1
.
EG iterations: 1
-> the formula is FALSE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-13 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.950sec

checking: EF [[1<=p49 & p24<=p50]]
normalized: E [true U [1<=p49 & p24<=p50]]

abstracting: (p24<=p50)
states: 300,407,601 (8)
abstracting: (1<=p49)
states: 21,248,200 (7)
-> the formula is TRUE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-12 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m24.825sec

checking: EF [~ [E [p44<=p51 U EF [[AG [p1<=0] | p29<=1]]]]]
normalized: E [true U ~ [E [p44<=p51 U E [true U [~ [E [true U ~ [p1<=0]]] | p29<=1]]]]]

abstracting: (p29<=1)
states: 320,567,601 (8)
abstracting: (p1<=0)
states: 256,454,081 (8)
abstracting: (p44<=p51)
states: 298,967,601 (8)
-> the formula is FALSE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-01 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 6.281sec

checking: AG [AG [~ [[E [~ [p45<=p43] U [1<=p37 & 1<=p2]] & ~ [p20<=p47]]]]]
normalized: ~ [E [true U E [true U [~ [p20<=p47] & E [~ [p45<=p43] U [1<=p37 & 1<=p2]]]]]]

abstracting: (1<=p2)
states: 64,113,520 (7)
abstracting: (1<=p37)
states: 21,600,000 (7)
abstracting: (p45<=p43)
states: 299,319,401 (8)
abstracting: (p20<=p47)
states: 300,528,601 (8)
-> the formula is FALSE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-03 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m15.041sec

checking: [AF [AG [~ [1<=p63]]] & EF [EF [[[p6<=1 | ~ [p17<=p12]] & [1<=p80 | ~ [AX [1<=p74]]]]]]]
normalized: [E [true U E [true U [[EX [~ [1<=p74]] | 1<=p80] & [~ [p17<=p12] | p6<=1]]]] & ~ [EG [E [true U 1<=p63]]]]

abstracting: (1<=p63)
states: 21,248,200 (7)
.
EG iterations: 1
abstracting: (p6<=1)
states: 320,567,601 (8)
abstracting: (p17<=p12)
states: 299,319,401 (8)
abstracting: (1<=p80)
states: 81,000,000 (7)
abstracting: (1<=p74)
states: 128,227,040 (8)
.-> the formula is FALSE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-08 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m17.677sec

checking: E [A [AF [E [~ [p52<=p20] U AG [1<=p44]]] U p37<=p46] U p7<=1]
normalized: E [[~ [EG [~ [p37<=p46]]] & ~ [E [~ [p37<=p46] U [EG [~ [E [~ [p52<=p20] U ~ [E [true U ~ [1<=p44]]]]]] & ~ [p37<=p46]]]]] U p7<=1]

abstracting: (p7<=1)
states: 320,567,601 (8)
abstracting: (p37<=p46)
states: 300,407,601 (8)
abstracting: (1<=p44)
states: 21,600,000 (7)
abstracting: (p52<=p20)
states: 300,407,601 (8)

EG iterations: 0
abstracting: (p37<=p46)
states: 300,407,601 (8)
abstracting: (p37<=p46)
states: 300,407,601 (8)
.
EG iterations: 1
-> the formula is TRUE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.484sec

checking: EG [[p18<=1 & [p37<=p9 & [~ [p18<=1] | ~ [p75<=p35]]]]]
normalized: EG [[[[~ [p75<=p35] | ~ [p18<=1]] & p37<=p9] & p18<=1]]

abstracting: (p18<=1)
states: 320,567,601 (8)
abstracting: (p37<=p9)
states: 309,767,601 (8)
abstracting: (p18<=1)
states: 320,567,601 (8)
abstracting: (p75<=p35)
states: 245,623,701 (8)
.
EG iterations: 1
-> the formula is FALSE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.338sec

checking: EF [AX [~ [[[[p46<=1 & 1<=p44] | [p40<=1 & p46<=p15]] | [EX [1<=p62] & ~ [p52<=0]]]]]]
normalized: E [true U ~ [EX [[[~ [p52<=0] & EX [1<=p62]] | [[p40<=1 & p46<=p15] | [p46<=1 & 1<=p44]]]]]]

abstracting: (1<=p44)
states: 21,600,000 (7)
abstracting: (p46<=1)
states: 320,567,601 (8)
abstracting: (p46<=p15)
states: 300,723,001 (8)
abstracting: (p40<=1)
states: 320,567,601 (8)
abstracting: (1<=p62)
states: 21,248,200 (7)
.abstracting: (p52<=0)
states: 298,967,601 (8)
.-> the formula is TRUE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m16.780sec

checking: EG [EF [[~ [[AG [p44<=p45] & E [p60<=p43 U p85<=p48]]] & AG [AF [p30<=p39]]]]]
normalized: EG [E [true U [~ [[~ [E [true U ~ [p44<=p45]]] & E [p60<=p43 U p85<=p48]]] & ~ [E [true U EG [~ [p30<=p39]]]]]]]

abstracting: (p30<=p39)
states: 299,319,401 (8)
.
EG iterations: 1
abstracting: (p85<=p48)
states: 248,048,201 (8)
abstracting: (p60<=p43)
states: 300,723,001 (8)
abstracting: (p44<=p45)
states: 298,967,601 (8)
.
EG iterations: 1
-> the formula is TRUE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-05 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m35.784sec

checking: EF [A [[[p10<=0 | EF [p26<=1]] & ~ [[[[1<=p1 & p25<=0] & [p4<=p81 | p1<=p61]] & AF [p40<=p42]]]] U AG [p81<=1]]]
normalized: E [true U [~ [EG [E [true U ~ [p81<=1]]]] & ~ [E [E [true U ~ [p81<=1]] U [E [true U ~ [p81<=1]] & ~ [[[E [true U p26<=1] | p10<=0] & ~ [[[[1<=p1 & p25<=0] & [p4<=p81 | p1<=p61]] & ~ [EG [~ [p40<=p42]]]]]]]]]]]]

abstracting: (p40<=p42)
states: 299,319,401 (8)
.
EG iterations: 1
abstracting: (p1<=p61)
states: 260,703,721 (8)
abstracting: (p4<=p81)
states: 271,967,601 (8)
abstracting: (p25<=0)
states: 299,319,401 (8)
abstracting: (1<=p1)
states: 64,113,520 (7)
abstracting: (p10<=0)
states: 299,319,401 (8)
abstracting: (p26<=1)
states: 320,567,601 (8)
abstracting: (p81<=1)
states: 320,567,601 (8)
abstracting: (p81<=1)
states: 320,567,601 (8)
abstracting: (p81<=1)
states: 320,567,601 (8)
.
EG iterations: 1
-> the formula is TRUE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-04 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.168sec

checking: E [[p59<=0 | ~ [[~ [[p47<=0 | 1<=p86]] & [A [p85<=p21 U EX [p54<=p18]] & ~ [[EG [p52<=p30] | A [p27<=0 U p50<=p52]]]]]]] U AF [~ [[~ [AF [1<=p81]] | ~ [p57<=0]]]]]
normalized: E [[~ [[[~ [[[~ [EG [~ [p50<=p52]]] & ~ [E [~ [p50<=p52] U [~ [p27<=0] & ~ [p50<=p52]]]]] | EG [p52<=p30]]] & [~ [EG [~ [EX [p54<=p18]]]] & ~ [E [~ [EX [p54<=p18]] U [~ [p85<=p21] & ~ [EX [p54<=p18]]]]]]] & ~ [[p47<=0 | 1<=p86]]]] | p59<=0] U ~ [EG [[~ [p57<=0] | EG [~ [1<=p81]]]]]]

abstracting: (1<=p81)
states: 77,567,600 (7)
.
EG iterations: 1
abstracting: (p57<=0)
states: 298,967,601 (8)
.
EG iterations: 1
abstracting: (p59<=0)
states: 298,967,601 (8)
abstracting: (1<=p86)
states: 81,000,000 (7)
abstracting: (p47<=0)
states: 299,319,401 (8)
abstracting: (p54<=p18)
states: 300,407,601 (8)
.abstracting: (p85<=p21)
states: 248,048,201 (8)
abstracting: (p54<=p18)
states: 300,407,601 (8)
.abstracting: (p54<=p18)
states: 300,407,601 (8)
...
EG iterations: 2
abstracting: (p52<=p30)
states: 300,407,601 (8)
.
EG iterations: 1
abstracting: (p50<=p52)
states: 299,100,701 (8)
abstracting: (p27<=0)
states: 298,967,601 (8)
abstracting: (p50<=p52)
states: 299,100,701 (8)
abstracting: (p50<=p52)
states: 299,100,701 (8)
.
EG iterations: 1
-> the formula is TRUE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-02 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m12.023sec

checking: ~ [EG [[AX [[~ [p3<=p52] | [p39<=0 & [p40<=1 | p38<=p34]]]] & ~ [[EX [[p6<=p73 | p3<=p29]] | [E [p43<=p24 U 1<=p8] & EF [1<=p9]]]]]]]
normalized: ~ [EG [[~ [EX [~ [[[[p40<=1 | p38<=p34] & p39<=0] | ~ [p3<=p52]]]]] & ~ [[EX [[p6<=p73 | p3<=p29]] | [E [true U 1<=p9] & E [p43<=p24 U 1<=p8]]]]]]]

abstracting: (1<=p8)
states: 160,283,800 (8)
abstracting: (p43<=p24)
states: 300,759,401 (8)
abstracting: (1<=p9)
states: 160,283,800 (8)
abstracting: (p3<=p29)
states: 260,774,081 (8)
abstracting: (p6<=p73)
states: 224,397,321 (8)
.abstracting: (p3<=p52)
states: 260,774,081 (8)
abstracting: (p39<=0)
states: 298,967,601 (8)
abstracting: (p38<=p34)
states: 299,100,701 (8)
abstracting: (p40<=1)
states: 320,567,601 (8)
........
EG iterations: 7
-> the formula is TRUE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-15 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 6.550sec

checking: AX [[[E [~ [AF [p11<=0]] U [[E [1<=p63 U p8<=0] & ~ [1<=p9]] | E [p52<=1 U p3<=p47]]] | EG [[p43<=p66 | [[p55<=1 & p60<=1] & p63<=0]]]] & [1<=p1 & AF [EG [EG [p35<=p59]]]]]]
normalized: ~ [EX [~ [[[~ [EG [~ [EG [EG [p35<=p59]]]]] & 1<=p1] & [EG [[[[p55<=1 & p60<=1] & p63<=0] | p43<=p66]] | E [EG [~ [p11<=0]] U [E [p52<=1 U p3<=p47] | [~ [1<=p9] & E [1<=p63 U p8<=0]]]]]]]]]

abstracting: (p8<=0)
states: 160,283,801 (8)
abstracting: (1<=p63)
states: 21,248,200 (7)
abstracting: (1<=p9)
states: 160,283,800 (8)
abstracting: (p3<=p47)
states: 260,703,721 (8)
abstracting: (p52<=1)
states: 320,567,601 (8)
abstracting: (p11<=0)
states: 299,319,401 (8)
.
EG iterations: 1
abstracting: (p43<=p66)
states: 300,723,001 (8)
abstracting: (p63<=0)
states: 299,319,401 (8)
abstracting: (p60<=1)
states: 320,567,601 (8)
abstracting: (p55<=1)
states: 320,567,601 (8)
.
EG iterations: 1
abstracting: (1<=p1)
states: 64,113,520 (7)
abstracting: (p35<=p59)
states: 300,540,701 (8)
.
EG iterations: 1
.
EG iterations: 1
.
EG iterations: 1
.-> the formula is TRUE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-10 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 2.673sec

checking: [EX [[E [EF [[p48<=0 & p45<=1]] U ~ [[[p61<=1 & 1<=p45] | ~ [1<=p21]]]] | [[EG [[p85<=1 & 1<=p47]] & EG [p36<=p2]] & [[[[1<=p51 | p61<=p76] & AX [p25<=0]] | [[p16<=1 | p8<=p64] & EG [p12<=p71]]] | ~ [[EX [p4<=1] & A [p59<=p24 U p71<=1]]]]]]] & AG [p35<=1]]
normalized: [~ [E [true U ~ [p35<=1]]] & EX [[[[~ [[[~ [EG [~ [p71<=1]]] & ~ [E [~ [p71<=1] U [~ [p59<=p24] & ~ [p71<=1]]]]] & EX [p4<=1]]] | [[EG [p12<=p71] & [p16<=1 | p8<=p64]] | [~ [EX [~ [p25<=0]]] & [1<=p51 | p61<=p76]]]] & [EG [p36<=p2] & EG [[p85<=1 & 1<=p47]]]] | E [E [true U [p48<=0 & p45<=1]] U ~ [[~ [1<=p21] | [p61<=1 & 1<=p45]]]]]]]

abstracting: (1<=p45)
states: 21,248,200 (7)
abstracting: (p61<=1)
states: 320,567,601 (8)
abstracting: (1<=p21)
states: 21,248,200 (7)
abstracting: (p45<=1)
states: 320,567,601 (8)
abstracting: (p48<=0)
states: 299,319,401 (8)
abstracting: (1<=p47)
states: 21,248,200 (7)
abstracting: (p85<=1)
states: 320,567,601 (8)
.
EG iterations: 1
abstracting: (p36<=p2)
states: 303,569,041 (8)
.
EG iterations: 1
abstracting: (p61<=p76)
states: 304,646,501 (8)
abstracting: (1<=p51)
states: 21,248,200 (7)
abstracting: (p25<=0)
states: 299,319,401 (8)
.abstracting: (p8<=p64)
states: 170,907,901 (8)
abstracting: (p16<=1)
states: 320,567,601 (8)
abstracting: (p12<=p71)
states: 311,927,601 (8)
.
EG iterations: 1
abstracting: (p4<=1)
states: 320,567,601 (8)
.abstracting: (p71<=1)
states: 320,567,601 (8)
abstracting: (p59<=p24)
states: 300,407,601 (8)
abstracting: (p71<=1)
states: 320,567,601 (8)
abstracting: (p71<=1)
states: 320,567,601 (8)
.
EG iterations: 1
.abstracting: (p35<=1)
states: 320,567,601 (8)
-> the formula is TRUE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-06 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 6.108sec

checking: E [[p61<=1 & p9<=1] U [[EF [[[E [p38<=1 U p14<=p64] | A [p9<=1 U 1<=p54]] | [p85<=p23 | AG [p13<=0]]]] | [~ [[E [1<=p45 U p48<=1] & [EG [p9<=0] | EF [1<=p17]]]] | ~ [[~ [[1<=p20 | 1<=p84]] & ~ [EG [p12<=p17]]]]]] & ~ [[p63<=0 | [[[AG [1<=p15] & [p68<=p48 | p17<=p75]] & ~ [1<=p58]] & EX [1<=p33]]]]]]
normalized: E [[p61<=1 & p9<=1] U [~ [[[EX [1<=p33] & [~ [1<=p58] & [[p68<=p48 | p17<=p75] & ~ [E [true U ~ [1<=p15]]]]]] | p63<=0]] & [[~ [[~ [EG [p12<=p17]] & ~ [[1<=p20 | 1<=p84]]]] | ~ [[[E [true U 1<=p17] | EG [p9<=0]] & E [1<=p45 U p48<=1]]]] | E [true U [[~ [E [true U ~ [p13<=0]]] | p85<=p23] | [[~ [EG [~ [1<=p54]]] & ~ [E [~ [1<=p54] U [~ [p9<=1] & ~ [1<=p54]]]]] | E [p38<=1 U p14<=p64]]]]]]]

abstracting: (p14<=p64)
states: 300,407,601 (8)
abstracting: (p38<=1)
states: 320,567,601 (8)
abstracting: (1<=p54)
states: 21,600,000 (7)
abstracting: (p9<=1)
states: 320,567,601 (8)
abstracting: (1<=p54)
states: 21,600,000 (7)
abstracting: (1<=p54)
states: 21,600,000 (7)
..
EG iterations: 2
abstracting: (p85<=p23)
states: 248,266,901 (8)
abstracting: (p13<=0)
states: 299,319,401 (8)
abstracting: (p48<=1)
states: 320,567,601 (8)
abstracting: (1<=p45)
states: 21,248,200 (7)
abstracting: (p9<=0)
states: 160,283,801 (8)
..
EG iterations: 2
abstracting: (1<=p17)
states: 21,248,200 (7)
abstracting: (1<=p84)
states: 81,000,000 (7)
abstracting: (1<=p20)
states: 21,466,900 (7)
abstracting: (p12<=p17)
states: 298,967,601 (8)
.
EG iterations: 1
abstracting: (p63<=0)
states: 299,319,401 (8)
abstracting: (1<=p15)
states: 21,248,200 (7)
abstracting: (p17<=p75)
states: 304,646,501 (8)
abstracting: (p68<=p48)
states: 300,528,601 (8)
abstracting: (1<=p58)
states: 21,248,200 (7)
abstracting: (1<=p33)
states: 21,248,200 (7)
.abstracting: (p9<=1)
states: 320,567,601 (8)
abstracting: (p61<=1)
states: 320,567,601 (8)
-> the formula is TRUE

FORMULA ARMCacheCoherence-PT-none-CTLCardinality-09 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m23.582sec

totally nodes used: 22983347 (2.3e+07)
number of garbage collections: 0
fire ops cache: hits/miss/sum: 312436642 601847721 914284363
used/not used/entry size/cache size: 67088043 20821 16 1024MB
basic ops cache: hits/miss/sum: 53823894 23602075 77425969
used/not used/entry size/cache size: 14364110 2413106 12 192MB
unary ops cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 16777216 8 128MB
abstract ops cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 16777216 12 192MB
state nr cache: hits/miss/sum: 72827 147860 220687
used/not used/entry size/cache size: 146592 8242016 32 256MB
max state cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 8388608 32 256MB
uniqueHash elements/entry size/size: 67108864 4 256MB
0 48149999
1 15503605
2 2954508
3 439417
4 54824
5 5936
6 528
7 45
8 2
9 0
>= 10 0

Total processing time: 3m56.001sec


BK_STOP 1678384377678

--------------------
content from stderr:

check for maximal unmarked siphon
ok
check for constant places
ok
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.458sec

1277 909 1188 963 2396 2550 2078 2258 2649 2276 2052 1810 2406 2492 2528 2459 2393 2285 2400 2178 1928 2446 2439 2459 2712 2382 2689 2389 2261 2203 2085 1835 1714 3839 2942 2971 3453 3053 2983 2982 2879 2570 4337 3577 3459 3944 3463 5855 4844 4771 4801 4645 4387 4491 4745 4862 4799 4846 4734 4672 4647 4551 4110 3790 4095 3454 3781 3421 3399 3280 3154 3049 2656 4896 4823 4569 4475 4454 4451 3763 3512 3264 3938 5632 3794 4282 4503 4112 4394 4452 4488 4419 4353 4245 4263 4138 3822 4095 4256 4108 4337 3975 4282 3982 3854 3807 3662 3514 3255 7037 6829 5963 6279 6083 5635 5749 5536 4934 8083 6807 6723 7981 6725 11613 10627 9371 9443 8889 8551 8545 9273 9391 9433 9363 9245 9053 9257 8939 7999 7285 8047 7263 7393 6543 6635 6493 6248 5808 5454 9459 9355 9145 9065 8653 8821 7059 6864 6374 7698 11082 7410 8282 8632 7823 8601 8717 8731 8663 8653 8365 8323 8089 7279 8080 8335 7967 8507 7783 8445 7797 7519 7447 7160 6868 6386 6779 7561 6707 6912 7003 7904 8624 7957 7645 7420 7336 7293 7318 7309 7297 7358 7177 7252 7400 7087 7182 7015 7317 6843 6939 6910 6689 6595 6433 7661 9617 9173 8688 8902 8857 8137 7992 7869 8898 9595 9067 8847 9029 8776 8142 8073 7875 14637 14917 14190 14139 13611 13658 11915 11880 11012 12156 15706 14661 14383 15598 14703 12585 12816 12103 11627 14386 16867 14871 14549 13593 13253 13752 13884 13930 14058 13743 13535 13683 13415 12777 14205 13394 13468 13901 13173 13981 12970 13172 13023 12919 12612 12350 12030 11634 11949 11965 12829 12085 12270 12284 12773 13972 13386 12908 13293 12611 12532 12665 12727 12717 12716 12544 11771 12770 12406 12788 12371 12749 12397 12309 12252 12114 11925 11809 13523 14117 13775 13579 13746 13510 13529 13435 13322 13327 14672 14217 13880 13959 13818 12692 12491 12313 12825 14317 12835 12813 12772 12391 12678 12928 13018 12992 12989 12861 12798 12767 12649 12396 12968 12623 12789 12530 12832 12358 12499 12391 12188 12094 11902 11894 11589 12110 13007 12275 12622 12334 13878 13773 13216 13227 12842 12531 12625 12676 12609 12670 12662 12538 12360 12519 12455 12637 12343 12722 12309 12281 12155 12045 11918 11674 13756 14319 13864 13764 13879 13625 13030 12909 12665 13890 13753 13663 13555 13347 13440 12023 11924 11676 11959 12924 12073 12330 12369 13278 13990 13323 13008 12786 12719 12638 12684 12675 12663 12724 12543 12588 12766 12451 12546 12379 12681 12207 12303 12274 12053 11959 11799 13318 15417 13902 13684 13678 16652 18324 16011 15779 15911 15606 16207 15231 15679 16019 15779 15893 15653 15517 15557 15359 13910 13683 14468 13147 13915 13286 12906 12972 12794 12546 12329 12000 11311 11501 15061 15035 13844 14160 13932 13618 11605 11335 10847 10833 10657 12672 15649 11424 13553 12361 12068 12608 12739 12850 12712 12579 12362 12592 12234 11500 11944 12005 11687 11965 11118 11932 11256 10968 10897 10768 10460 10233 9630 9341 9327 9671 10659 13072 11111 10881 11185 10943 15818 13228 13543 13567 13427 13079 13007 13515 13749 13679 13787 13493 13369 13435 13127 12241 11702 12423 11665 11805 11400 10950 10781 10845 10439 10225 9906 9201 9358 13986 13910 13831 13733 12997 12515 10635 10555 9869 9794 9336 12498 14129 12880 12323 12777 12121 10543 10061 9738 9330 9435 8230 11692 9944 9773 11264 9945 9270 7756 7662 6875 7060 6738 7272 8052 7246 7429 7467 7244 8997 8186 8078 8513 7774 7636 7827 7919 7870 7952 7745 6750 7933 7649 7466 7572 7868 7591 7422 7479 7228 7027 6970 6742 9920 8988 9019 9488 9105 8446 8414 8201 8533 9893 8970 8855 9007 8873 11193 10004 10200 10174 10039 10226 9907 10148 10356 10209 10256 10145 10047 10057 9961 9221 9200 9505 8864 9166 8831 8780 8690 8564 8413 8066 10258 10195 9741 9871 9733 9598 8771 8637 8386 10005 9871 9527 9433 9412 9299 8250 7999 7751 8790 10158 8196 8624 8773 8540 8794 8880 8916 8847 8781 8673 8788 8566 8249 8528 8519 8539 8773 8411 8718 8418 8290 8243 8098 7850 7697 7906 7633 8937 8352 8213 8699 8453 7392 7489 7142 6747 7393 8176 7689 7711 7436 8985 8967 8305 8017 7897 7699 7752 7833 7834 7859 7884 7702 7515 7704 7613 7732 7551 7911 7422 7473 7396 7282 7071 7010 7111 8020 7496 7460 7458 7295 9230 8447 8204 8171 7881 7639 7719 7957 7967 7827 7770 6896 7922 7623 7521 7824 7831 7817 7443 7392 7456 7088 6960 6755 9747 9701 9263 9356 9242 9082 8526 8379 8107 10047 9145 9174 9667 9260 8547 8493 8390 8069 9830 9076 8958 9514 8962 11395 10343 10268 10300 10144 9886 9990 10244 10361 10298 10380 10233 10171 10146 10050 9609 9289 9594 8953 9280 8920 8898 8779 8653 8548 8155 10343 10307 10005 9911 9890 9835 8910 8659 8411 9255 10309 9765 9469 9562 9123 9355 9609 9729 9665 9707 9616 9492 9451 9333 9450 9708 9394 9433 9266 9641 9094 9190 9161 8924 8830 8635 8642 8628 10064 10033 9415 9531 9487 11570 11367 10774 10492 10486 10307 10198 10497 10682 10672 10660 10690 10550 10589 10469 10363 9678 9870 9607 9633 9404 9294 9298 9049 8848 8776 8998 10557 10281 9934 9999 9837 8905 8602 8479 6752 7442 8174 7817 7698 7450 8877 9123 8378 8063 7956 7729 7819 7837 7835 7823 7929 7703 7354 7926 7581 7798 7539 7914 7367 7508 7400 7213 7119 6959 7251 7562 7513 7560 7505 7404 9214 8748 8231 8124 7893 7682 7756 7952 7772 7822 7772 7201 7815 7599 7523 7826 7742 7737 7445 7394 7327 7202 6951 6828
iterations count:95139513 (2825), effective:74656 (2)

initing FirstDep: 0m 0.457sec

9980 10913 8063 8323
iterations count:466157 (13), effective:544 (0)
4075 4777 6984 8268 11037 10003 10909 11659 11936 13914 12478 12019 12858 12031 14038 18204 15172 19262 17723 15810 17622 18269 15586 16906 15547 19320 16924 15552 20905 17633 19008 18662 17909 16117 16688 16990 16484 17052 16609 17650 17174 19388 22031 21297 19391 20171 20554 18116 13481 14644 14324 12815 14112 15251 14163 11686 14011 15773 14040 11974 11225 11919 10424
iterations count:6366708 (189), effective:16340 (0)
14888 9113 9316 8151 10392 8025 7880
iterations count:789149 (23), effective:1716 (0)

iterations count:33676 (1), effective:0 (0)

iterations count:33676 (1), effective:0 (0)
9557 6663 6842 6829 7121 7253 5855
iterations count:780561 (23), effective:2363 (0)
14991 11563 16621 11827 10519 11667 13830 13816 11688 8274 8088
iterations count:1171635 (34), effective:3212 (0)

iterations count:33676 (1), effective:0 (0)
11529 9838 8496 10787 10389 6995 8132 8129 8983 7486 7379 7751 7674 7269 9457 12811 11892 13796 12901 11502 15068 12817 10200 11008 12802 12088 11777 13047 13020 10982 12653 12153 11753 12536 12279 10281 13284 10998 10753 9511 13380 11458 10667 9591 9927 12064 10157
iterations count:4774232 (141), effective:13483 (0)

iterations count:59241 (1), effective:1 (0)

iterations count:33676 (1), effective:0 (0)

iterations count:49905 (1), effective:1 (0)

iterations count:33676 (1), effective:0 (0)

iterations count:33676 (1), effective:0 (0)
7756 7130 6038 7625 8373 7211 6250 8492 8929 10207 8949 8743 8042 8696 8873 10517 10307 12248 12431 14935 13536 14377 14784 12717 16617 15719 13935 14302 14718 11289 13109 11426 15591 13610 12983 14149 12797 11528 15530 13635 13538 12223 15511 13798 13763 12101 12669 10944
iterations count:4883383 (145), effective:14382 (0)
17183 13013 12675 12052 10585 7903 8141
iterations count:739502 (21), effective:1470 (0)

iterations count:33689 (1), effective:1 (0)
5507 7816 8978 7906 9562 8317 7906 8945 8350 8236 11978 10978 15106 13451 14695 14088 12421 16334 15380 13621 15019 14003 11185 12391 11189 15355 13330 12746 14004 12503 11291 17680 13824 12495 17631 15878 11670 14647 15546 14204 11585 14754 15452 14540 11879 11270 12318 10469
iterations count:4862964 (144), effective:13490 (0)
6271 7243 8698 8235 9499 9992 8572 8510 8218 8690 8079 12655 15045 14559 13891 16131 15583 12660 14062 14770 12628 15929 13552 11335 12838 14553 14131 13621 14804 15223 12778 16548 15741 14677 12799 17705 16123 11727 16057 13735 13673 11928 15570 13833 13927 12246 11560 12711 10785
iterations count:4939105 (146), effective:13655 (0)

iterations count:33676 (1), effective:0 (0)

iterations count:33676 (1), effective:0 (0)

iterations count:33677 (1), effective:1 (0)
6057 7443 6467 6257 5133 4688 3737
iterations count:709067 (21), effective:1701 (0)
13933 14946 14157 12737 7704 8088
iterations count:670994 (19), effective:1461 (0)
18934 14192 13063 12053 9261 9743
iterations count:669740 (19), effective:797 (0)

iterations count:90419 (2), effective:21 (0)

iterations count:64854 (1), effective:20 (0)
9600 7858 8126
iterations count:349149 (10), effective:364 (0)

iterations count:33676 (1), effective:0 (0)

iterations count:33677 (1), effective:1 (0)
11027 9910 8086 8346
iterations count:462010 (13), effective:544 (0)

iterations count:33681 (1), effective:1 (0)
20214 13685 13725 12364 9495 8001 8219
iterations count:716513 (21), effective:1573 (0)

iterations count:33676 (1), effective:0 (0)

iterations count:33676 (1), effective:0 (0)
18962 12441 12585 12501 9764 7863 8081
iterations count:726093 (21), effective:1731 (0)
7214 7528
iterations count:245474 (7), effective:129 (0)
11529 9838 8496 10787 10389 6995 8132 8129 8983 7486 7379 7751 7674 7269 9457 12811 11892 13796 12901 11502 15068 12817 10200 11008 12802 12088 11777 13047 13020 10982 12653 12153 11753 12536 12279 10281 13284 10998 10753 9511 13380 11458 10667 9591 9927 12064 10157
iterations count:4774233 (141), effective:13484 (0)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marcie"
echo " Input is ARMCacheCoherence-PT-none, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r001-oct2-167813588100001"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;