fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r289-tall-162124152700606
Last Updated
Jun 28, 2021

About the Execution of LoLA for MultiCrashLeafsetExtension-PT-S16C06

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4371.447 3600000.00 4287794.00 6493.20 FFTFFFFT?FTFFTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r289-tall-162124152700606.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is MultiCrashLeafsetExtension-PT-S16C06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r289-tall-162124152700606
=====================================================================


--------------------
preparation of the directory to be used:
/home/mcc/execution
total 11M
-rw-r--r-- 1 mcc users 37K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 125K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 27K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 90K May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.6K May 12 07:58 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K May 12 07:58 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.7K May 12 07:58 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 12 07:58 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 6.3K May 11 18:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 23K May 11 18:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.0K May 11 15:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 11 15:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 12 04:40 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K May 12 04:40 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 7 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 11M May 12 08:13 model.pnml

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content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME gen-ReachabilityCardinality-00
FORMULA_NAME gen-ReachabilityCardinality-01
FORMULA_NAME gen-ReachabilityCardinality-02
FORMULA_NAME gen-ReachabilityCardinality-03
FORMULA_NAME gen-ReachabilityCardinality-04
FORMULA_NAME gen-ReachabilityCardinality-05
FORMULA_NAME gen-ReachabilityCardinality-06
FORMULA_NAME gen-ReachabilityCardinality-07
FORMULA_NAME gen-ReachabilityCardinality-08
FORMULA_NAME gen-ReachabilityCardinality-09
FORMULA_NAME gen-ReachabilityCardinality-10
FORMULA_NAME gen-ReachabilityCardinality-11
FORMULA_NAME gen-ReachabilityCardinality-12
FORMULA_NAME gen-ReachabilityCardinality-13
FORMULA_NAME gen-ReachabilityCardinality-14
FORMULA_NAME gen-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1621301459043

starting LoLA
BK_INPUT MultiCrashLeafsetExtension-PT-S16C06
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA gen-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-08: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 20 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 2.000000 secs.
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 30 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 42 gen-ReachabilityCardinality-14
lola: time limit : 222 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SRCH) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 1 4 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF FNDP 1/508 0/5 gen-ReachabilityCardinality-14 --
50 EF STEQ 1/508 0/5 gen-ReachabilityCardinality-14 sara is running.
52 EF SRCH 1/593 1/5 gen-ReachabilityCardinality-14 --
53 EF EXCL 1/222 1/32 gen-ReachabilityCardinality-14 899 m, 179 m/sec, 1039 t fired, .

Time elapsed: 35 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 49 (type FNDP) for gen-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 29
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 50 (type EQUN) for gen-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 52 (type SRCH) for gen-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 53 (type EXCL) for gen-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 66 (type EXCL) for 21 gen-ReachabilityCardinality-07
lola: time limit : 237 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 55 (type FNDP) for 39 gen-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type EQUN) for 39 gen-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SRCH) for 39 gen-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type EQUN) for gen-ReachabilityCardinality-14
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-56.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-11: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 2 3 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 EF FNDP 5/173 0/5 gen-ReachabilityCardinality-13 50472 t fired, 1028 attempts, .
56 EF STEQ 5/173 0/5 gen-ReachabilityCardinality-13 sara is running.
58 EF SRCH 5/173 2/5 gen-ReachabilityCardinality-13 23409 m, 4681 m/sec, 27210 t fired, .
66 EF EXCL 5/237 3/32 gen-ReachabilityCardinality-07 58711 m, 11742 m/sec, 69026 t fired, .

Time elapsed: 40 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 55 (type FNDP) for gen-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 107659
lola: tried executions : 2196
lola: time used : 9.000000
lola: memory pages used : 0
lola: CANCELED task # 56 (type EQUN) for gen-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 58 (type SRCH) for gen-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 129 (type FNDP) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type EQUN) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type SRCH) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type EQUN) for gen-ReachabilityCardinality-13
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-130.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-01: EF 0 2 3 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-11: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 10/254 10/32 gen-ReachabilityCardinality-07 230603 m, 34378 m/sec, 272183 t fired, .
129 EF FNDP 1/187 0/5 gen-ReachabilityCardinality-01 10541 t fired, 316 attempts, .
130 EF STEQ 1/187 0/5 gen-ReachabilityCardinality-01 sara is running.
132 EF SRCH 1/197 1/5 gen-ReachabilityCardinality-01 12365 m, 2473 m/sec, 14300 t fired, .

Time elapsed: 45 secs. Pages in use: 13
# running tasks: 4 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-01: EF 0 2 3 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
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66 EF EXCL 15/254 17/32 gen-ReachabilityCardinality-07 402025 m, 34284 m/sec, 474961 t fired, .
129 EF FNDP 6/186 0/5 gen-ReachabilityCardinality-01 75590 t fired, 2186 attempts, .
130 EF STEQ 6/186 0/5 gen-ReachabilityCardinality-01 sara is running.
132 EF SRCH 6/196 4/5 gen-ReachabilityCardinality-01 88261 m, 15179 m/sec, 102751 t fired, .

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66 EF EXCL 20/254 25/32 gen-ReachabilityCardinality-07 575311 m, 34657 m/sec, 680075 t fired, .
129 EF FNDP 11/181 0/5 gen-ReachabilityCardinality-01 140640 t fired, 3994 attempts, .
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66 EF EXCL 25/254 32/32 gen-ReachabilityCardinality-07 751591 m, 35256 m/sec, 888188 t fired, .
129 EF FNDP 16/186 0/5 gen-ReachabilityCardinality-01 205376 t fired, 5761 attempts, .
130 EF STEQ 16/186 0/5 gen-ReachabilityCardinality-01 sara is running.
149 EF FNDP 5/186 0/5 gen-ReachabilityCardinality-02 66792 t fired, 1482 attempts, .

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129 EF FNDP 21/181 0/5 gen-ReachabilityCardinality-01 269536 t fired, 7495 attempts, .
130 EF STEQ 21/181 0/5 gen-ReachabilityCardinality-01 sara is running.
149 EF FNDP 10/181 0/5 gen-ReachabilityCardinality-02 128102 t fired, 2967 attempts, .

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120 EF EXCL 5/271 7/32 gen-ReachabilityCardinality-08 146628 m, 29325 m/sec, 172761 t fired, .
129 EF FNDP 26/176 0/5 gen-ReachabilityCardinality-01 323685 t fired, 8931 attempts, .
130 EF STEQ 26/176 0/5 gen-ReachabilityCardinality-01 sara is running.
149 EF FNDP 15/176 0/5 gen-ReachabilityCardinality-02 189582 t fired, 4427 attempts, .

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120 EF EXCL 10/271 14/32 gen-ReachabilityCardinality-08 320639 m, 34802 m/sec, 378423 t fired, .
129 EF FNDP 31/171 0/5 gen-ReachabilityCardinality-01 388840 t fired, 10651 attempts, .
130 EF STEQ 31/171 0/5 gen-ReachabilityCardinality-01 sara is running.
149 EF FNDP 20/171 0/5 gen-ReachabilityCardinality-02 251035 t fired, 5877 attempts, .

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120 EF EXCL 15/271 21/32 gen-ReachabilityCardinality-08 492186 m, 34309 m/sec, 581687 t fired, .
129 EF FNDP 36/166 0/5 gen-ReachabilityCardinality-01 454061 t fired, 12360 attempts, .
130 EF STEQ 36/166 0/5 gen-ReachabilityCardinality-01 sara is running.
149 EF FNDP 25/166 0/5 gen-ReachabilityCardinality-02 312476 t fired, 7319 attempts, .

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120 EF EXCL 20/271 29/32 gen-ReachabilityCardinality-08 668968 m, 35356 m/sec, 790254 t fired, .
129 EF FNDP 41/161 0/5 gen-ReachabilityCardinality-01 519462 t fired, 14049 attempts, .
130 EF STEQ 41/161 0/5 gen-ReachabilityCardinality-01 sara is running.
149 EF FNDP 30/161 0/5 gen-ReachabilityCardinality-02 373823 t fired, 8751 attempts, .

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129 EF FNDP 46/156 0/5 gen-ReachabilityCardinality-01 584824 t fired, 15737 attempts, .
130 EF STEQ 46/156 0/5 gen-ReachabilityCardinality-01 sara is running.
149 EF FNDP 35/156 0/5 gen-ReachabilityCardinality-02 435568 t fired, 10193 attempts, .

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90 EF EXCL 5/390 7/32 gen-ReachabilityCardinality-09 155998 m, 31199 m/sec, 183950 t fired, .
142 EF FNDP 1/233 0/5 gen-ReachabilityCardinality-00 11918 t fired, 261 attempts, .
143 EF STEQ 1/233 0/5 gen-ReachabilityCardinality-00 sara is running.
149 EF FNDP 40/214 0/5 gen-ReachabilityCardinality-02 495152 t fired, 11585 attempts, .

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90 EF EXCL 10/390 14/32 gen-ReachabilityCardinality-09 317087 m, 32217 m/sec, 374376 t fired, .
142 EF FNDP 6/232 0/5 gen-ReachabilityCardinality-00 77621 t fired, 1791 attempts, .
143 EF STEQ 6/232 0/5 gen-ReachabilityCardinality-00 sara is running.
149 EF FNDP 45/213 0/5 gen-ReachabilityCardinality-02 556278 t fired, 13009 attempts, .

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90 EF EXCL 15/390 20/32 gen-ReachabilityCardinality-09 477348 m, 32052 m/sec, 564326 t fired, .
142 EF FNDP 11/227 0/5 gen-ReachabilityCardinality-00 143857 t fired, 3340 attempts, .
143 EF STEQ 11/227 0/5 gen-ReachabilityCardinality-00 sara is running.
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90 EF EXCL 20/390 28/32 gen-ReachabilityCardinality-09 639164 m, 32363 m/sec, 755438 t fired, .
142 EF FNDP 16/222 0/5 gen-ReachabilityCardinality-00 210174 t fired, 4883 attempts, .
143 EF STEQ 16/222 0/5 gen-ReachabilityCardinality-00 sara is running.
149 EF FNDP 55/203 0/5 gen-ReachabilityCardinality-02 678631 t fired, 15857 attempts, .

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lola: fired transitions : 250726
lola: tried executions : 5826
lola: time used : 19.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 69 (type FNDP) for gen-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 36
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 70 (type EQUN) for gen-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 84 (type FNDP) for 18 gen-ReachabilityCardinality-06
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lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type EQUN) for 18 gen-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
lola: CANCELED task # 90 (type EXCL) for gen-ReachabilityCardinality-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-03: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-06: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
84 EF FNDP 2/290 0/5 gen-ReachabilityCardinality-06 21560 t fired, 462 attempts, .
87 EF STEQ 2/290 0/5 gen-ReachabilityCardinality-06 sara is running.
149 EF FNDP 60/237 0/5 gen-ReachabilityCardinality-02 734290 t fired, 17145 attempts, .

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lola: FINISHED task # 140 (type EXCL) for gen-ReachabilityCardinality-03
lola: result : true
lola: markings : 13212
lola: fired transitions : 15490
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lola: memory pages used : 1
lola: LAUNCH task # 113 (type EXCL) for 36 gen-ReachabilityCardinality-12
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lola: FINISHED task # 113 (type EXCL) for gen-ReachabilityCardinality-12
lola: result : true
lola: markings : 334
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lola: LAUNCH task # 99 (type EXCL) for 45 gen-ReachabilityCardinality-15
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lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-06: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
84 EF FNDP 7/345 0/5 gen-ReachabilityCardinality-06 78169 t fired, 1659 attempts, .
87 EF STEQ 7/384 0/5 gen-ReachabilityCardinality-06 sara is running.
99 EF EXCL 4/871 5/32 gen-ReachabilityCardinality-15 109251 m, 21850 m/sec, 128694 t fired, .
149 EF FNDP 65/332 0/5 gen-ReachabilityCardinality-02 782552 t fired, 18265 attempts, .

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gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-06: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
84 EF FNDP 12/341 0/5 gen-ReachabilityCardinality-06 128783 t fired, 2729 attempts, .
87 EF STEQ 12/380 0/5 gen-ReachabilityCardinality-06 sara is running.
99 EF EXCL 9/871 11/32 gen-ReachabilityCardinality-15 239496 m, 26049 m/sec, 282657 t fired, .
149 EF FNDP 70/328 0/5 gen-ReachabilityCardinality-02 832261 t fired, 19417 attempts, .

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lola: FINISHED task # 87 (type EQUN) for gen-ReachabilityCardinality-06
lola: result : true
lola: CANCELED task # 84 (type FNDP) for gen-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 76 (type FNDP) for 30 gen-ReachabilityCardinality-10
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lola: LAUNCH task # 77 (type EQUN) for 30 gen-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 84 (type FNDP) for gen-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 164035
lola: tried executions : 3475
lola: time used : 15.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-77.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
76 EF FNDP 2/434 0/5 gen-ReachabilityCardinality-10 15882 t fired, 690 attempts, .
77 EF STEQ 2/434 0/5 gen-ReachabilityCardinality-10 sara is running.
99 EF EXCL 14/1161 16/32 gen-ReachabilityCardinality-15 371993 m, 26499 m/sec, 439371 t fired, .
149 EF FNDP 75/370 0/5 gen-ReachabilityCardinality-02 878612 t fired, 20493 attempts, .

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sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
76 EF FNDP 7/432 0/5 gen-ReachabilityCardinality-10 64707 t fired, 2397 attempts, .
77 EF STEQ 7/432 0/5 gen-ReachabilityCardinality-10 sara is running.
99 EF EXCL 19/1161 21/32 gen-ReachabilityCardinality-15 492037 m, 24008 m/sec, 581771 t fired, .
149 EF FNDP 80/368 0/5 gen-ReachabilityCardinality-02 932540 t fired, 21748 attempts, .

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gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
76 EF FNDP 12/427 0/5 gen-ReachabilityCardinality-10 119652 t fired, 4190 attempts, .
77 EF STEQ 12/427 0/5 gen-ReachabilityCardinality-10 sara is running.
99 EF EXCL 24/1161 27/32 gen-ReachabilityCardinality-15 615229 m, 24638 m/sec, 727102 t fired, .
149 EF FNDP 85/363 0/5 gen-ReachabilityCardinality-02 981250 t fired, 22876 attempts, .

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gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
76 EF FNDP 17/422 0/5 gen-ReachabilityCardinality-10 170908 t fired, 5810 attempts, .
77 EF STEQ 17/422 0/5 gen-ReachabilityCardinality-10 sara is running.
99 EF EXCL 29/1161 32/32 gen-ReachabilityCardinality-15 737284 m, 24411 m/sec, 871251 t fired, .
149 EF FNDP 90/358 0/5 gen-ReachabilityCardinality-02 1031765 t fired, 24047 attempts, .

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lola: CANCELED task # 99 (type EXCL) for gen-ReachabilityCardinality-15 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
76 EF FNDP 22/417 0/5 gen-ReachabilityCardinality-10 233512 t fired, 7708 attempts, .
77 EF STEQ 22/417 0/5 gen-ReachabilityCardinality-10 sara is running.
149 EF FNDP 95/353 0/5 gen-ReachabilityCardinality-02 1091891 t fired, 25439 attempts, .

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lola: LAUNCH task # 80 (type EXCL) for 30 gen-ReachabilityCardinality-10
lola: time limit : 1725 sec
lola: memory limit: 32 pages

lola: FINISHED task # 70 (type EQUN) for gen-ReachabilityCardinality-05
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 2 3 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
76 EF FNDP 27/409 0/5 gen-ReachabilityCardinality-10 285534 t fired, 9283 attempts, .
77 EF STEQ 27/409 0/5 gen-ReachabilityCardinality-10 sara is running.
80 EF EXCL 5/1725 7/32 gen-ReachabilityCardinality-10 144567 m, 28913 m/sec, 170412 t fired, .
149 EF FNDP 100/345 0/5 gen-ReachabilityCardinality-02 1145186 t fired, 26677 attempts, .

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gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 2 3 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
76 EF FNDP 32/407 0/5 gen-ReachabilityCardinality-10 348675 t fired, 11140 attempts, .
77 EF STEQ 32/407 0/5 gen-ReachabilityCardinality-10 sara is running.
80 EF EXCL 10/1725 14/32 gen-ReachabilityCardinality-10 313039 m, 33694 m/sec, 369591 t fired, .
149 EF FNDP 105/343 0/5 gen-ReachabilityCardinality-02 1205810 t fired, 28079 attempts, .

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gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 2 3 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
76 EF FNDP 37/402 0/5 gen-ReachabilityCardinality-10 411876 t fired, 13007 attempts, .
77 EF STEQ 37/402 0/5 gen-ReachabilityCardinality-10 sara is running.
80 EF EXCL 15/1725 21/32 gen-ReachabilityCardinality-10 480468 m, 33485 m/sec, 568032 t fired, .
149 EF FNDP 110/338 0/5 gen-ReachabilityCardinality-02 1266700 t fired, 29491 attempts, .

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gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-10: AG 0 2 3 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
76 EF FNDP 42/397 0/5 gen-ReachabilityCardinality-10 475498 t fired, 14865 attempts, .
77 EF STEQ 42/397 0/5 gen-ReachabilityCardinality-10 sara is running.
80 EF EXCL 20/1725 28/32 gen-ReachabilityCardinality-10 651650 m, 34236 m/sec, 770150 t fired, .
149 EF FNDP 115/333 0/5 gen-ReachabilityCardinality-02 1327547 t fired, 30900 attempts, .

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lola: FINISHED task # 77 (type EQUN) for gen-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 76 (type FNDP) for gen-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 80 (type EXCL) for gen-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 153 (type EXCL) for 6 gen-ReachabilityCardinality-02
lola: time limit : 3428 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 95 (type FNDP) for 45 gen-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type EQUN) for 45 gen-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 76 (type FNDP) for gen-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 498301
lola: tried executions : 15532
lola: time used : 44.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-15: EF 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
95 EF FNDP 3/489 0/5 gen-ReachabilityCardinality-15 39790 t fired, 889 attempts, .
96 EF STEQ 3/489 0/5 gen-ReachabilityCardinality-15 sara is running.
149 EF FNDP 120/473 0/5 gen-ReachabilityCardinality-02 1386689 t fired, 32269 attempts, .
153 EF EXCL 3/3428 5/32 gen-ReachabilityCardinality-02 98267 m, 19653 m/sec, 115760 t fired, .

Time elapsed: 175 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-15: EF 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
95 EF FNDP 8/486 0/5 gen-ReachabilityCardinality-15 109460 t fired, 2429 attempts, .
96 EF STEQ 8/486 0/5 gen-ReachabilityCardinality-15 sara is running.
149 EF FNDP 125/470 0/5 gen-ReachabilityCardinality-02 1448832 t fired, 33707 attempts, .
153 EF EXCL 8/3428 12/32 gen-ReachabilityCardinality-02 261776 m, 32701 m/sec, 308979 t fired, .

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# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 96 (type EQUN) for gen-ReachabilityCardinality-15
lola: result : false
lola: CANCELED task # 95 (type FNDP) for gen-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 83 (type FNDP) for 27 gen-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type EQUN) for 27 gen-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 95 (type FNDP) for gen-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 146270
lola: tried executions : 3242
lola: time used : 11.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-85.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
83 EF FNDP 2/569 0/5 gen-ReachabilityCardinality-09 29560 t fired, 1339 attempts, .
85 EF STEQ 2/683 0/5 gen-ReachabilityCardinality-09 sara is running.
149 EF FNDP 130/581 0/5 gen-ReachabilityCardinality-02 1507883 t fired, 35075 attempts, .
153 EF EXCL 13/3428 18/32 gen-ReachabilityCardinality-02 417463 m, 31137 m/sec, 493255 t fired, .

Time elapsed: 185 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
83 EF FNDP 7/567 0/5 gen-ReachabilityCardinality-09 96887 t fired, 3945 attempts, .
85 EF STEQ 7/681 0/5 gen-ReachabilityCardinality-09 sara is running.
149 EF FNDP 135/579 0/5 gen-ReachabilityCardinality-02 1569170 t fired, 36491 attempts, .
153 EF EXCL 18/3428 25/32 gen-ReachabilityCardinality-02 581037 m, 32714 m/sec, 686831 t fired, .

Time elapsed: 190 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 85 (type EQUN) for gen-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 83 (type FNDP) for gen-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 116 (type FNDP) for 24 gen-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type EQUN) for 24 gen-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 83 (type FNDP) for gen-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 124989
lola: tried executions : 4965
lola: time used : 9.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-117.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
116 EF FNDP 3/852 0/5 gen-ReachabilityCardinality-08 35746 t fired, 807 attempts, .
117 EF STEQ 3/852 0/5 gen-ReachabilityCardinality-08 sara is running.
149 EF FNDP 140/749 0/5 gen-ReachabilityCardinality-02 1628552 t fired, 37866 attempts, .
153 EF EXCL 23/3428 32/32 gen-ReachabilityCardinality-02 740375 m, 31867 m/sec, 874895 t fired, .

Time elapsed: 195 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 153 (type EXCL) for gen-ReachabilityCardinality-02 (memory limit exceeded)
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
116 EF FNDP 8/849 0/5 gen-ReachabilityCardinality-08 102799 t fired, 2328 attempts, .
117 EF STEQ 8/849 0/5 gen-ReachabilityCardinality-08 sara is running.
149 EF FNDP 145/746 0/5 gen-ReachabilityCardinality-02 1690675 t fired, 39299 attempts, .

Time elapsed: 200 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 62 (type FNDP) for 21 gen-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 5/1133 0/5 gen-ReachabilityCardinality-07 65366 t fired, 2149 attempts, .
116 EF FNDP 13/1128 0/5 gen-ReachabilityCardinality-08 170139 t fired, 3853 attempts, .
117 EF STEQ 13/1128 0/5 gen-ReachabilityCardinality-08 sara is running.
149 EF FNDP 150/1036 0/5 gen-ReachabilityCardinality-02 1752902 t fired, 40738 attempts, .

Time elapsed: 205 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 10/1128 0/5 gen-ReachabilityCardinality-07 131471 t fired, 4159 attempts, .
116 EF FNDP 18/1123 0/5 gen-ReachabilityCardinality-08 237533 t fired, 5381 attempts, .
117 EF STEQ 18/1123 0/5 gen-ReachabilityCardinality-08 sara is running.
149 EF FNDP 155/1031 0/5 gen-ReachabilityCardinality-02 1814837 t fired, 42170 attempts, .

Time elapsed: 210 secs. Pages in use: 32
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 15/1123 0/5 gen-ReachabilityCardinality-07 197584 t fired, 6130 attempts, .
116 EF FNDP 23/1118 0/5 gen-ReachabilityCardinality-08 304861 t fired, 6910 attempts, .
117 EF STEQ 23/1118 0/5 gen-ReachabilityCardinality-08 sara is running.
149 EF FNDP 160/1026 0/5 gen-ReachabilityCardinality-02 1876854 t fired, 43608 attempts, .

Time elapsed: 215 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 20/1118 0/5 gen-ReachabilityCardinality-07 264023 t fired, 8064 attempts, .
116 EF FNDP 28/1113 0/5 gen-ReachabilityCardinality-08 372126 t fired, 8437 attempts, .
117 EF STEQ 28/1113 0/5 gen-ReachabilityCardinality-08 sara is running.
149 EF FNDP 165/1021 0/5 gen-ReachabilityCardinality-02 1938746 t fired, 45042 attempts, .

Time elapsed: 220 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 117 (type EQUN) for gen-ReachabilityCardinality-08
lola: result : unknown
lola: LAUNCH task # 150 (type EQUN) for 6 gen-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-150.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 2 1 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 25/1110 0/5 gen-ReachabilityCardinality-07 328432 t fired, 9925 attempts, .
116 EF FNDP 33/1105 0/5 gen-ReachabilityCardinality-08 437193 t fired, 9916 attempts, .
149 EF FNDP 170/1604 0/5 gen-ReachabilityCardinality-02 1998852 t fired, 46431 attempts, .
150 EF STEQ 2/1125 0/5 gen-ReachabilityCardinality-02 sara is running.

Time elapsed: 225 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 2 1 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 30/1108 0/5 gen-ReachabilityCardinality-07 395121 t fired, 11835 attempts, .
116 EF FNDP 38/1103 0/5 gen-ReachabilityCardinality-08 504209 t fired, 11437 attempts, .
149 EF FNDP 175/1602 0/5 gen-ReachabilityCardinality-02 2060788 t fired, 47866 attempts, .
150 EF STEQ 7/1123 0/5 gen-ReachabilityCardinality-02 sara is running.

Time elapsed: 230 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16

FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-02: AG 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 2 1 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 35/1103 0/5 gen-ReachabilityCardinality-07 461729 t fired, 13722 attempts, .
116 EF FNDP 43/1098 0/5 gen-ReachabilityCardinality-08 571326 t fired, 12959 attempts, .
149 EF FNDP 180/1597 0/5 gen-ReachabilityCardinality-02 2122593 t fired, 49297 attempts, .
150 EF STEQ 12/1118 0/5 gen-ReachabilityCardinality-02 sara is running.

Time elapsed: 235 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 150 (type EQUN) for gen-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 149 (type FNDP) for gen-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 63 (type EQUN) for 21 gen-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SRCH) for 21 gen-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 149 (type FNDP) for gen-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 2127329
lola: tried executions : 49407
lola: time used : 181.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-63.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF false state equation
gen-ReachabilityCardinality-01: EF false state equation
gen-ReachabilityCardinality-02: AG true state equation
gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 40/1664 0/5 gen-ReachabilityCardinality-07 525582 t fired, 15523 attempts, .
63 EF STEQ 4/1682 0/5 gen-ReachabilityCardinality-07 sara is running.
65 EF SRCH 4/1682 3/5 gen-ReachabilityCardinality-07 47182 m, 9436 m/sec, 54910 t fired, .
116 EF FNDP 48/3364 0/5 gen-ReachabilityCardinality-08 636108 t fired, 14429 attempts, .

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gen-ReachabilityCardinality-03: AG false tandem / relaxed
gen-ReachabilityCardinality-04: AG false tandem / relaxed
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

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62 EF FNDP 45/1660 0/5 gen-ReachabilityCardinality-07 592025 t fired, 17393 attempts, .
63 EF STEQ 9/1678 0/5 gen-ReachabilityCardinality-07 sara is running.
65 EF SRCH 9/1678 5/5 gen-ReachabilityCardinality-07 100475 m, 10658 m/sec, 117117 t fired, .
116 EF FNDP 53/3360 0/5 gen-ReachabilityCardinality-08 703751 t fired, 15963 attempts, .

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lola: FINISHED task # 63 (type EQUN) for gen-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 62 (type FNDP) for gen-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 65 (type SRCH) for gen-ReachabilityCardinality-07 (obsolete)
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lola: time limit : 32000000 sec
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lola: FINISHED task # 62 (type FNDP) for gen-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 608034
lola: tried executions : 17840
lola: time used : 46.000000
lola: memory pages used : 0
lola: FINISHED task # 121 (type SRCH) for gen-ReachabilityCardinality-08
lola: result : unknown
lola: markings : 739
lola: fired transitions : 865
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gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-07: AG true state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
gen-ReachabilityCardinality-14: AG false findpath
gen-ReachabilityCardinality-15: EF false state equation

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116 EF FNDP 58/3408 0/5 gen-ReachabilityCardinality-08 769257 t fired, 17451 attempts, .
119 EF SRCH 4/3354 3/5 gen-ReachabilityCardinality-08 48777 m, 9755 m/sec, 53837 t fired, .

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gen-ReachabilityCardinality-09: EF false state equation
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gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
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116 EF FNDP 63/3408 0/5 gen-ReachabilityCardinality-08 836771 t fired, 18987 attempts, .

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116 EF FNDP 68/3408 0/5 gen-ReachabilityCardinality-08 904221 t fired, 20516 attempts, .

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gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-07: AG true state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
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116 EF FNDP 73/3408 0/5 gen-ReachabilityCardinality-08 971618 t fired, 22045 attempts, .

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gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
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116 EF FNDP 78/3408 0/5 gen-ReachabilityCardinality-08 1038592 t fired, 23567 attempts, .

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gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-07: AG true state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
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gen-ReachabilityCardinality-15: EF false state equation

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116 EF FNDP 83/3408 0/5 gen-ReachabilityCardinality-08 1105498 t fired, 25087 attempts, .

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gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-07: AG true state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF true findpath
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116 EF FNDP 88/3408 0/5 gen-ReachabilityCardinality-08 1172512 t fired, 26615 attempts, .

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gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG false state equation
gen-ReachabilityCardinality-07: AG true state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: AG false tandem / relaxed
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116 EF FNDP 93/3408 0/5 gen-ReachabilityCardinality-08 1239585 t fired, 28142 attempts, .

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gen-ReachabilityCardinality-10: AG true state equation
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gen-ReachabilityCardinality-12: AG false tandem / relaxed
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116 EF FNDP 98/3408 0/5 gen-ReachabilityCardinality-08 1306473 t fired, 29667 attempts, .

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116 EF FNDP 103/3408 0/5 gen-ReachabilityCardinality-08 1373620 t fired, 31192 attempts, .

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116 EF FNDP 108/3408 0/5 gen-ReachabilityCardinality-08 1440844 t fired, 32718 attempts, .

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116 EF FNDP 113/3408 0/5 gen-ReachabilityCardinality-08 1508149 t fired, 34247 attempts, .

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116 EF FNDP 118/3408 0/5 gen-ReachabilityCardinality-08 1575454 t fired, 35781 attempts, .

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116 EF FNDP 1978/3408 0/5 gen-ReachabilityCardinality-08 26699466 t fired, 610145 attempts, .

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