Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2022-input.r215-oct2-165281606000260.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2022-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool gold2021
Input is SharedMemory-PT-000100, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r215-oct2-165281606000260
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 223M
-rw-r--r-- 1 mcc users 1.5M Apr 30 16:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 5.3M Apr 30 16:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3M Apr 30 15:17 CTLFireability.txt
-rw-r--r-- 1 mcc users 24M Apr 30 15:17 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 10 09:34 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 10 09:34 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 1.1M May 9 08:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 2.8M May 9 08:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1M May 9 08:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 6.1M May 9 08:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5M Apr 30 23:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 13M Apr 30 23:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 30M Apr 30 21:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 117M Apr 30 21:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 198K May 9 08:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 409K May 9 08:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 10 09:34 equiv_col
-rw-r--r-- 1 mcc users 7 May 10 09:34 instance
-rw-r--r-- 1 mcc users 6 May 10 09:34 iscolored
-rw-r--r-- 1 mcc users 11M May 10 09:34 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-00
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-01
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-02
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-03
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-04
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-05
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-06
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-07
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-08
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-09
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-10
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-11
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-12
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-13
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-14
FORMULA_NAME SharedMemory-PT-000100-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1655069138812

Running Version 0
[2022-06-12 21:25:47] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -spotpath, /home/mcc/BenchKit/bin//..//ltlfilt, -z3path, /home/mcc/BenchKit/bin//..//z3/bin/z3, -yices2path, /home/mcc/BenchKit/bin//..//yices/bin/yices, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2022-06-12 21:25:47] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2022-06-12 21:25:48] [INFO ] Load time of PNML (sax parser for PT used): 760 ms
[2022-06-12 21:25:48] [INFO ] Transformed 10301 places.
[2022-06-12 21:25:48] [INFO ] Transformed 20100 transitions.
[2022-06-12 21:25:48] [INFO ] Found NUPN structural information;
[2022-06-12 21:25:48] [INFO ] Completing missing partition info from NUPN : creating a component with [Ext_Mem_Acc_57_1, Ext_Mem_Acc_56_1, Ext_Mem_Acc_19_2, Ext_Mem_Acc_18_2, Ext_Mem_Acc_72_2, Ext_Mem_Acc_63_2, Ext_Mem_Acc_11_3, Ext_Mem_Acc_12_3, Ext_Mem_Acc_64_3, Ext_Mem_Acc_61_3, Ext_Mem_Acc_49_4, Ext_Mem_Acc_48_4, Ext_Mem_Acc_12_5, Ext_Mem_Acc_17_5, Ext_Mem_Acc_22_5, Ext_Mem_Acc_21_5, Ext_Mem_Acc_95_5, Ext_Mem_Acc_98_5, Ext_Mem_Acc_28_6, Ext_Mem_Acc_29_6, Ext_Mem_Acc_41_7, Ext_Mem_Acc_80_6, Ext_Mem_Acc_2_8, Ext_Mem_Acc_99_7, Ext_Mem_Acc_47_8, Ext_Mem_Acc_46_8, Ext_Mem_Acc_23_9, Ext_Mem_Acc_26_9, Ext_Mem_Acc_84_8, Ext_Mem_Acc_85_8, Ext_Mem_Acc_39_9, Ext_Mem_Acc_40_9, Ext_Mem_Acc_28_10, Ext_Mem_Acc_29_10, Ext_Mem_Acc_3_11, Ext_Mem_Acc_2_11, Ext_Mem_Acc_99_11, Ext_Mem_Acc_100_11, Ext_Mem_Acc_42_11, Ext_Mem_Acc_43_11, Ext_Mem_Acc_95_11, Ext_Mem_Acc_94_11, Ext_Mem_Acc_73_13, Ext_Mem_Acc_72_13, Ext_Mem_Acc_91_12, Ext_Mem_Acc_92_12, Ext_Mem_Acc_71_14, Ext_Mem_Acc_68_14, Ext_Mem_Acc_22_14, Ext_Mem_Acc_21_14, Ext_Mem_Acc_25_14, Ext_Mem_Acc_26_14, Ext_Mem_Acc_43_16, Ext_Mem_Acc_44_16, Ext_Mem_Acc_69_15, Ext_Mem_Acc_70_15, Ext_Mem_Acc_71_17, Ext_Mem_Acc_78_17, Ext_Mem_Acc_90_16, Ext_Mem_Acc_91_16, Ext_Mem_Acc_73_16, Ext_Mem_Acc_72_16, Ext_Mem_Acc_59_18, Ext_Mem_Acc_58_18, Ext_Mem_Acc_86_17, Ext_Mem_Acc_85_17, Ext_Mem_Acc_19_20, Ext_Mem_Acc_21_20, Ext_Mem_Acc_64_19, Ext_Mem_Acc_63_19, Ext_Mem_Acc_8_19, Ext_Mem_Acc_9_19, Ext_Mem_Acc_3_21, Ext_Mem_Acc_2_21, Ext_Mem_Acc_54_20, Ext_Mem_Acc_55_20, Ext_Mem_Acc_99_22, Ext_Mem_Acc_98_22, Ext_Mem_Acc_79_23, Ext_Mem_Acc_80_23, Ext_Mem_Acc_86_21, Ext_Mem_Acc_85_21, Ext_Mem_Acc_3_22, Ext_Mem_Acc_4_22, Ext_Mem_Acc_93_22, Ext_Mem_Acc_92_22, Ext_Mem_Acc_75_25, Ext_Mem_Acc_76_25, Ext_Mem_Acc_48_26, Ext_Mem_Acc_49_26, Ext_Mem_Acc_30_24, Ext_Mem_Acc_31_24, Ext_Mem_Acc_85_24, Ext_Mem_Acc_84_24, Ext_Mem_Acc_33_25, Ext_Mem_Acc_34_25, Ext_Mem_Acc_43_28, Ext_Mem_Acc_44_28, Ext_Mem_Acc_25_29, Ext_Mem_Acc_24_29, Ext_Mem_Acc_48_27, Ext_Mem_Acc_47_27, Ext_Mem_Acc_92_26, Ext_Mem_Acc_93_26, Ext_Mem_Acc_49_27, Ext_Mem_Acc_50_27, Ext_Mem_Acc_83_30, Ext_Mem_Acc_82_30, Ext_Mem_Acc_85_31, Ext_Mem_Acc_86_31, Ext_Mem_Acc_83_29, Ext_Mem_Acc_84_29, Ext_Mem_Acc_40_30, Ext_Mem_Acc_41_30, Ext_Mem_Acc_31_30, Ext_Mem_Acc_29_30, Ext_Mem_Acc_58_34, Ext_Mem_Acc_59_34, Ext_Mem_Acc_41_33, Ext_Mem_Acc_44_33, Ext_Mem_Acc_85_32, Ext_Mem_Acc_84_32, Ext_Mem_Acc_28_32, Ext_Mem_Acc_27_32, Ext_Mem_Acc_46_32, Ext_Mem_Acc_47_32, Ext_Mem_Acc_98_36, Ext_Mem_Acc_1_37, Ext_Mem_Acc_20_36, Ext_Mem_Acc_17_36, Ext_Mem_Acc_56_35, Ext_Mem_Acc_55_35, Ext_Mem_Acc_74_34, Ext_Mem_Acc_75_34, Ext_Mem_Acc_9_35, Ext_Mem_Acc_8_35, Ext_Mem_Acc_41_39, Ext_Mem_Acc_42_39, Ext_Mem_Acc_68_38, Ext_Mem_Acc_69_38, Ext_Mem_Acc_29_38, Ext_Mem_Acc_30_38, Ext_Mem_Acc_74_37, Ext_Mem_Acc_73_37, Ext_Mem_Acc_18_37, Ext_Mem_Acc_19_37, Ext_Mem_Acc_89_41, Ext_Mem_Acc_90_41, Ext_Mem_Acc_9_41, Ext_Mem_Acc_8_41, Ext_Mem_Acc_91_40, Ext_Mem_Acc_90_40, Ext_Mem_Acc_9_40, Ext_Mem_Acc_10_40, Ext_Mem_Acc_42_45, Ext_Mem_Acc_43_45, Ext_Mem_Acc_94_44, Ext_Mem_Acc_1_45, Ext_Mem_Acc_76_45, Ext_Mem_Acc_89_45, Ext_Mem_Acc_59_46, Ext_Mem_Acc_60_46, Ext_Mem_Acc_38_47, Ext_Mem_Acc_32_47, Ext_Mem_Acc_68_42, Ext_Mem_Acc_75_42, Ext_Mem_Acc_59_42, Ext_Mem_Acc_60_42, Ext_Mem_Acc_14_43, Ext_Mem_Acc_9_43, Ext_Mem_Acc_17_44, Ext_Mem_Acc_73_43, Ext_Mem_Acc_90_44, Ext_Mem_Acc_89_44, Ext_Mem_Acc_28_50, Ext_Mem_Acc_41_50, Ext_Mem_Acc_58_50, Ext_Mem_Acc_53_50, Ext_Mem_Acc_39_51, Ext_Mem_Acc_9_51, Ext_Mem_Acc_3_52, Ext_Mem_Acc_98_51, Ext_Mem_Acc_18_52, Ext_Mem_Acc_7_52, Ext_Mem_Acc_67_47, Ext_Mem_Acc_62_47, Ext_Mem_Acc_10_48, Ext_Mem_Acc_18_48, Ext_Mem_Acc_66_48, Ext_Mem_Acc_67_48, Ext_Mem_Acc_22_49, Ext_Mem_Acc_23_49, Ext_Mem_Acc_66_49, Ext_Mem_Acc_65_49, Ext_Mem_Acc_43_56, Ext_Mem_Acc_44_56, Ext_Mem_Acc_87_55, Ext_Mem_Acc_88_55, Ext_Mem_Acc_42_55, Ext_Mem_Acc_41_55, Ext_Mem_Acc_53_57, Ext_Mem_Acc_52_57, Ext_Mem_Acc_2_57, Ext_Mem_Acc_3_57, Ext_Mem_Acc_97_53, Ext_Mem_Acc_98_53, Ext_Mem_Acc_17_53, Ext_Mem_Acc_16_53, Ext_Mem_Acc_86_52, Ext_Mem_Acc_87_52, Ext_Mem_Acc_72_54, Ext_Mem_Acc_73_54, Ext_Mem_Acc_99_53, Ext_Mem_Acc_100_53, Ext_Mem_Acc_25_61, Ext_Mem_Acc_24_61, Ext_Mem_Acc_68_60, Ext_Mem_Acc_69_60, Ext_Mem_Acc_79_60, Ext_Mem_Acc_78_60, Ext_Mem_Acc_72_62, Ext_Mem_Acc_73_62, Ext_Mem_Acc_24_62, Ext_Mem_Acc_23_62, Ext_Mem_Acc_68_58, Ext_Mem_Acc_69_58, Ext_Mem_Acc_88_57, Ext_Mem_Acc_87_57, Ext_Mem_Acc_81_59, Ext_Mem_Acc_82_59, Ext_Mem_Acc_36_60, Ext_Mem_Acc_35_60, Ext_Mem_Acc_49_59, Ext_Mem_Acc_63_59, Ext_Mem_Acc_43_67, Ext_Mem_Acc_42_67, Ext_Mem_Acc_91_67, Ext_Mem_Acc_92_67, Ext_Mem_Acc_98_65, Ext_Mem_Acc_97_65, Ext_Mem_Acc_83_65, Ext_Mem_Acc_84_65, Ext_Mem_Acc_40_66, Ext_Mem_Acc_39_66, Ext_Mem_Acc_70_64, Ext_Mem_Acc_71_64, Ext_Mem_Acc_42_65, Ext_Mem_Acc_43_65, Ext_Mem_Acc_56_63, Ext_Mem_Acc_57_63, Ext_Mem_Acc_15_63, Ext_Mem_Acc_14_63, Ext_Mem_Acc_95_63, Ext_Mem_Acc_96_63, Ext_Mem_Acc_55_72, Ext_Mem_Acc_56_72, Ext_Mem_Acc_3_73, Ext_Mem_Acc_2_73, Ext_Mem_Acc_93_70, Ext_Mem_Acc_92_70, Ext_Mem_Acc_38_71, Ext_Mem_Acc_39_71, Ext_Mem_Acc_94_71, Ext_Mem_Acc_95_71, Ext_Mem_Acc_9_70, Ext_Mem_Acc_8_70, Ext_Mem_Acc_16_70, Ext_Mem_Acc_17_70, Ext_Mem_Acc_45_68, Ext_Mem_Acc_46_68, Ext_Mem_Acc_61_68, Ext_Mem_Acc_2_69, Ext_Mem_Acc_18_69, Ext_Mem_Acc_25_69, Ext_Mem_Acc_92_77, Ext_Mem_Acc_5_78, Ext_Mem_Acc_85_77, Ext_Mem_Acc_88_77, Ext_Mem_Acc_96_76, Ext_Mem_Acc_22_77, Ext_Mem_Acc_39_76, Ext_Mem_Acc_42_76, Ext_Mem_Acc_26_76, Ext_Mem_Acc_15_76, Ext_Mem_Acc_62_75, Ext_Mem_Acc_57_75, Ext_Mem_Acc_13_75, Ext_Mem_Acc_85_74, Ext_Mem_Acc_48_74, Ext_Mem_Acc_47_74, Ext_Mem_Acc_99_73, Ext_Mem_Acc_100_73, Ext_Mem_Acc_38_73, Ext_Mem_Acc_41_73, Ext_Mem_Acc_52_83, Ext_Mem_Acc_53_83, Ext_Mem_Acc_67_82, Ext_Mem_Acc_79_82, Ext_Mem_Acc_4_82, Ext_Mem_Acc_9_82, Ext_Mem_Acc_22_81, Ext_Mem_Acc_21_81, Ext_Mem_Acc_69_81, Ext_Mem_Acc_62_81, Ext_Mem_Acc_10_81, Ext_Mem_Acc_84_80, Ext_Mem_Acc_37_80, Ext_Mem_Acc_36_80, Ext_Mem_Acc_35_79, Ext_Mem_Acc_34_79, Ext_Mem_Acc_76_78, Ext_Mem_Acc_77_78, Ext_Mem_Acc_90_78, Ext_Mem_Acc_89_78, Ext_Mem_Acc_72_89, Ext_Mem_Acc_71_89, Ext_Mem_Acc_93_88, Ext_Mem_Acc_90_88, Ext_Mem_Acc_33_91, Ext_Mem_Acc_34_91, Ext_Mem_Acc_51_90, Ext_Mem_Acc_54_90, Ext_Mem_Acc_63_92, Ext_Mem_Acc_62_92, Ext_Mem_Acc_18_92, Ext_Mem_Acc_19_92, Ext_Mem_Acc_76_91, Ext_Mem_Acc_79_91, Ext_Mem_Acc_80_93, Ext_Mem_Acc_79_93, Ext_Mem_Acc_24_93, Ext_Mem_Acc_23_93, Ext_Mem_Acc_40_84, Ext_Mem_Acc_37_84, Ext_Mem_Acc_98_84, Ext_Mem_Acc_1_85, Ext_Mem_Acc_18_84, Ext_Mem_Acc_19_84, Ext_Mem_Acc_12_86, Ext_Mem_Acc_11_86, Ext_Mem_Acc_32_85, Ext_Mem_Acc_33_85, Ext_Mem_Acc_25_87, Ext_Mem_Acc_24_87, Ext_Mem_Acc_38_87, Ext_Mem_Acc_39_87, Ext_Mem_Acc_92_86, Ext_Mem_Acc_65_86, Ext_Mem_Acc_85_88, Ext_Mem_Acc_86_88, Ext_Mem_Acc_72_87, Ext_Mem_Acc_75_87, Ext_Mem_Acc_61_99, Ext_Mem_Acc_62_99, Ext_Mem_Acc_42_99, Ext_Mem_Acc_41_99, Ext_Mem_Acc_93_99, Ext_Mem_Acc_16_100, Ext_Mem_Acc_76_100, Ext_Mem_Acc_73_100, Ext_Mem_Acc_51_94, Ext_Mem_Acc_52_94, Ext_Mem_Acc_95_94, Ext_Mem_Acc_93_94, Ext_Mem_Acc_51_95, Ext_Mem_Acc_50_95, Ext_Mem_Acc_100_95, Ext_Mem_Acc_8_96, Ext_Mem_Acc_56_96, Ext_Mem_Acc_49_96, Ext_Mem_Acc_26_97, Ext_Mem_Acc_17_97, Ext_Mem_Acc_37_97, Ext_Mem_Acc_30_97, Ext_Mem_Acc_26_98, Ext_Mem_Acc_95_97, Ext_Mem_Acc_82_98, Ext_Mem_Acc_75_98, Ext_Mem_Acc_91_98, Ext_Mem_Acc_7_99]
[2022-06-12 21:25:48] [INFO ] Parsed PT model containing 10301 places and 20100 transitions in 1051 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 5140 ms.
Working with output stream class java.io.PrintStream
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Interrupted random walk after 8542 steps, including 2 resets, run timeout after 30019 ms. (steps per millisecond=0 ) properties seen :{1=1, 2=1, 4=1}
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-04 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 887 ms. (steps per millisecond=11 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 1999 ms. (steps per millisecond=5 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 2965 ms. (steps per millisecond=3 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 48 ms. (steps per millisecond=208 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 12) seen :0
Running SMT prover for 12 properties.
// Phase 1: matrix 20100 rows 10301 cols
[2022-06-12 21:26:32] [INFO ] Computed 201 place invariants in 2502 ms
[2022-06-12 21:26:37] [INFO ] [Real]Absence check using 201 positive place invariants in 367 ms returned sat
[2022-06-12 21:26:37] [INFO ] SMT Verify possible in real domain returnedunsat :2 sat :0 real:10
[2022-06-12 21:26:39] [INFO ] [Nat]Absence check using 201 positive place invariants in 329 ms returned sat
[2022-06-12 21:26:39] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2022-06-12 21:26:55] [INFO ] [Nat]Absence check using state equation in 15122 ms returned unsat :8 sat :4
Attempting to minimize the solution found.
Minimization took 2061 ms.
[2022-06-12 21:26:57] [INFO ] SMT Verify possible in nat domain returned unsat :8 sat :4
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-11 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 12 Parikh solutions to 2 different solutions.
Incomplete Parikh walk after 10000 steps, including 98 resets, run finished after 195 ms. (steps per millisecond=51 ) properties (out of 2) seen :1 could not realise parikh vector
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Finished Parikh walk after 90 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=30 )
FORMULA SharedMemory-PT-000100-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
All properties solved without resorting to model-checking.

BK_STOP 1655069220256

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit/bin//..//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ cut -d . -f 9
++ ls /home/mcc/BenchKit/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202104292328.jar
+ VERSION=0
+ echo 'Running Version 0'
+ /home/mcc/BenchKit/bin//..//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -spotpath /home/mcc/BenchKit/bin//..//ltlfilt -z3path /home/mcc/BenchKit/bin//..//z3/bin/z3 -yices2path /home/mcc/BenchKit/bin//..//yices/bin/yices -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000100"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2021"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool gold2021"
echo " Input is SharedMemory-PT-000100, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r215-oct2-165281606000260"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000100.tgz
mv SharedMemory-PT-000100 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;