Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2022-input.r183-tajo-165281569500594.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2022-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-4028
Executing tool tapaal
Input is ResAllocation-PT-R003C002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r183-tajo-165281569500594
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 240K
-rw-r--r-- 1 mcc users 6.5K Apr 30 02:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Apr 30 02:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Apr 30 02:46 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Apr 30 02:46 CTLFireability.xml
-rw-r--r-- 1 mcc users 6 May 10 09:34 equiv_col
-rw-r--r-- 1 mcc users 4.2K May 10 09:34 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 10 09:34 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 9 May 10 09:34 instance
-rw-r--r-- 1 mcc users 6 May 10 09:34 iscolored
-rw-r--r-- 1 mcc users 4.1K May 9 08:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K May 9 08:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 9 08:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 9 08:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K May 10 09:34 model.pnml
-rw-r--r-- 1 mcc users 1.8K May 9 08:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 9 08:38 UpperBounds.xml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-00
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-01
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-02
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-03
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-04
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-05
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-06
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-07
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-08
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-09
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1652856747832

tapaal
Got BK_BIN_PATH=/home/mcc/BenchKit/bin/
---> tapaal --- TAPAAL v5
Setting MODEL_PATH=.
Setting VERIFYPN=/home/mcc/BenchKit/bin/verifypn
Got BK_TIME_CONFINEMENT=3600
Setting TEMPDIR=/home/mcc/BenchKit/bin/tmp
Got BK_MEMORY_CONFINEMENT=16384
Limiting to 16265216 kB
Total timeout: 3590
Time left: 3590

*************************************
* TAPAAL verifying CTLFireability *
*************************************
TEMPDIR=/home/mcc/BenchKit/bin/tmp
QF=/home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6
MF=/home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
/home/mcc/BenchKit/bin/verifypn -n -c -q 718 -l 29 -d 299 -z 4 -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
CPN OverApproximation is only usable on colored models
Time left: 3590
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
timeout 3590 /home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --binary-query-io 2 --write-simplified /home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6 --write-reduced /home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
FORMULA ResAllocation-PT-R003C002-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 1 was solved

Query is NOT satisfied.

FORMULA ResAllocation-PT-R003C002-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 2 was solved

Query is NOT satisfied.

FORMULA ResAllocation-PT-R003C002-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 3 was solved

Query is NOT satisfied.

FORMULA ResAllocation-PT-R003C002-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 7 was solved

Query is satisfied.

FORMULA ResAllocation-PT-R003C002-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 10 was solved

Query is NOT satisfied.

FORMULA ResAllocation-PT-R003C002-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 13 was solved

Query is satisfied.

FORMULA ResAllocation-PT-R003C002-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 15 was solved

Query is satisfied.
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Time left: 3590

---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (9 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.05764 on verification
@@@0.06,59264@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz /home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6 --binary-query-io 1 -x 1 -n

FORMULA ResAllocation-PT-R003C002-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3589
------------------- QUERY 2 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.055922 on verification
@@@0.05,59264@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz /home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6 --binary-query-io 1 -x 2 -n

FORMULA ResAllocation-PT-R003C002-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3589
------------------- QUERY 3 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.060478 on verification
@@@0.06,59344@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz /home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6 --binary-query-io 1 -x 3 -n

FORMULA ResAllocation-PT-R003C002-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3589
------------------- QUERY 4 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.068874 on verification
@@@0.07,59256@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz /home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6 --binary-query-io 1 -x 4 -n

FORMULA ResAllocation-PT-R003C002-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3588
------------------- QUERY 5 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.061886 on verification
@@@0.06,59364@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz /home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6 --binary-query-io 1 -x 5 -n

FORMULA ResAllocation-PT-R003C002-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3588
------------------- QUERY 6 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.051082 on verification
@@@0.05,59284@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz /home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6 --binary-query-io 1 -x 6 -n

FORMULA ResAllocation-PT-R003C002-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3588
------------------- QUERY 7 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.074127 on verification


Query index 0 was solved
Query is NOT satisfied.

Spent 0.06408 on verification
@@@0.07,59292@@@
@@@0.06,59256@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz /home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6 --binary-query-io 1 -x 7 -n
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz /home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6 --binary-query-io 1 -x 7 -n

FORMULA ResAllocation-PT-R003C002-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3587
------------------- QUERY 8 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.062424 on verification
@@@0.06,59296@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz /home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6 --binary-query-io 1 -x 8 -n

FORMULA ResAllocation-PT-R003C002-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3587
------------------- QUERY 9 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.060747 on verification
@@@0.06,59400@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BestFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.5Vf4xLAHFz /home/mcc/BenchKit/bin/tmp/tmp.VFTTXWv6b6 --binary-query-io 1 -x 9 -n

FORMULA ResAllocation-PT-R003C002-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3587
All queries are solved
Time left: 3587
terminated-with-cleanup

BK_STOP 1652856750644

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="tapaal"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool tapaal"
echo " Input is ResAllocation-PT-R003C002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r183-tajo-165281569500594"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C002.tgz
mv ResAllocation-PT-R003C002 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;