Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2022-input.r183-tajo-165281569000186.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2022-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-4028
Executing tool tapaal
Input is RERS17pb115-PT-6, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r183-tajo-165281569000186
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 70M
-rw-r--r-- 1 mcc users 6.2K Apr 30 06:10 CTLCardinality.txt
-rw-r--r-- 1 mcc users 64K Apr 30 06:10 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Apr 30 06:06 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Apr 30 06:06 CTLFireability.xml
-rw-r--r-- 1 mcc users 6 May 10 09:34 equiv_col
-rw-r--r-- 1 mcc users 4.2K May 10 09:34 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 10 09:34 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2 May 10 09:34 instance
-rw-r--r-- 1 mcc users 6 May 10 09:34 iscolored
-rw-r--r-- 1 mcc users 3.8K May 9 08:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K May 9 08:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K May 9 08:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 9 08:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 69M May 10 09:34 model.pnml
-rw-r--r-- 1 mcc users 1.6K May 9 08:34 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 9 08:34 UpperBounds.xml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-00
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-01
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-02
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-03
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-04
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-05
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-06
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-07
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-08
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-09
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-10
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-11
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-12
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-13
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-14
FORMULA_NAME RERS17pb115-PT-6-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1652838585249

tapaal
Got BK_BIN_PATH=/home/mcc/BenchKit/bin/
---> tapaal --- TAPAAL v5
Setting MODEL_PATH=.
Setting VERIFYPN=/home/mcc/BenchKit/bin/verifypn
Got BK_TIME_CONFINEMENT=3600
Setting TEMPDIR=/home/mcc/BenchKit/bin/tmp
Got BK_MEMORY_CONFINEMENT=16384
Limiting to 16265216 kB
Total timeout: 3590
Time left: 3590

*************************************
* TAPAAL verifying CTLFireability *
*************************************
TEMPDIR=/home/mcc/BenchKit/bin/tmp
QF=/home/mcc/BenchKit/bin/tmp/tmp.qAY26XYqOl
MF=/home/mcc/BenchKit/bin/tmp/tmp.du8sczYBOD
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
/home/mcc/BenchKit/bin/verifypn -n -c -q 718 -l 29 -d 299 -z 4 -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
CPN OverApproximation is only usable on colored models
Time left: 3588
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
timeout 3588 /home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --binary-query-io 2 --write-simplified /home/mcc/BenchKit/bin/tmp/tmp.qAY26XYqOl --write-reduced /home/mcc/BenchKit/bin/tmp/tmp.du8sczYBOD -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml

Time left: 2831

---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (16 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
No solution found



Time left: 2530
------------------- QUERY 2 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.420464 on verification
@@@20.47,554212@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.du8sczYBOD /home/mcc/BenchKit/bin/tmp/tmp.qAY26XYqOl --binary-query-io 1 -x 2 -n

FORMULA RERS17pb115-PT-6-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2509
------------------- QUERY 3 ----------------------
No solution found
Command terminated by signal 9
@@@174.27,10333836@@@


Time left: 2207
------------------- QUERY 4 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 40.065 on verification
@@@59.98,552268@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.du8sczYBOD /home/mcc/BenchKit/bin/tmp/tmp.qAY26XYqOl --binary-query-io 1 -x 4 -n

FORMULA RERS17pb115-PT-6-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2147
------------------- QUERY 5 ----------------------
No solution found
Command terminated by signal 9
@@@224.79,10299056@@@


Time left: 1846
------------------- QUERY 6 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 190.715 on verification
@@@209.78,9425308@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.du8sczYBOD /home/mcc/BenchKit/bin/tmp/tmp.qAY26XYqOl --binary-query-io 1 -x 6 -n

FORMULA RERS17pb115-PT-6-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1635
------------------- QUERY 7 ----------------------
No solution found
Command terminated by signal 9
@@@282.48,8481928@@@


Time left: 1333
------------------- QUERY 8 ----------------------
No solution found



Time left: 1031
------------------- QUERY 9 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 257.496 on verification
@@@276.47,551160@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BestFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.du8sczYBOD /home/mcc/BenchKit/bin/tmp/tmp.qAY26XYqOl --binary-query-io 1 -x 9 -n

FORMULA RERS17pb115-PT-6-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 755
------------------- QUERY 10 ----------------------
No solution found
Command terminated by signal 9
@@@160.66,10223016@@@


Time left: 453
------------------- QUERY 11 ----------------------
No solution found
Command terminated by signal 9
@@@242.48,11233392@@@


Time left: 150
------------------- QUERY 12 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.080143 on verification
@@@15.06,551596@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.du8sczYBOD /home/mcc/BenchKit/bin/tmp/tmp.qAY26XYqOl --binary-query-io 1 -x 12 -n

FORMULA RERS17pb115-PT-6-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 135
------------------- QUERY 13 ----------------------
No solution found



Time left: -3
Out of time, terminating!
terminated-with-cleanup

BK_STOP 1652842178486

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb115-PT-6"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="tapaal"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool tapaal"
echo " Input is RERS17pb115-PT-6, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r183-tajo-165281569000186"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb115-PT-6.tgz
mv RERS17pb115-PT-6 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;