About the Execution of Tapaal for RERS17pb113-PT-5
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16218.579 | 3591673.00 | 12094272.00 | 505.50 | ?T?FTTF?????TTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2022-input.r183-tajo-165281568700034.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2022-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-4028
Executing tool tapaal
Input is RERS17pb113-PT-5, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r183-tajo-165281568700034
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 7.4K Apr 30 05:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K Apr 30 05:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Apr 30 05:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Apr 30 05:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 6 May 10 09:34 equiv_col
-rw-r--r-- 1 mcc users 4.2K May 10 09:34 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 10 09:34 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2 May 10 09:34 instance
-rw-r--r-- 1 mcc users 6 May 10 09:34 iscolored
-rw-r--r-- 1 mcc users 3.6K May 9 08:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 9 08:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 9 08:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 9 08:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 15M May 10 09:34 model.pnml
-rw-r--r-- 1 mcc users 1.6K May 9 08:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 9 08:31 UpperBounds.xml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-00
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-01
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-02
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-03
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-04
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-05
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-06
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-07
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-08
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-09
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-10
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-11
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-12
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-13
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-14
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1652823892336
tapaal
Got BK_BIN_PATH=/home/mcc/BenchKit/bin/
---> tapaal --- TAPAAL v5
Setting MODEL_PATH=.
Setting VERIFYPN=/home/mcc/BenchKit/bin/verifypn
Got BK_TIME_CONFINEMENT=3600
Setting TEMPDIR=/home/mcc/BenchKit/bin/tmp
Got BK_MEMORY_CONFINEMENT=16384
Limiting to 16265216 kB
Total timeout: 3590
Time left: 3590
*************************************
* TAPAAL verifying CTLFireability *
*************************************
TEMPDIR=/home/mcc/BenchKit/bin/tmp
QF=/home/mcc/BenchKit/bin/tmp/tmp.7T5HdXfDWG
MF=/home/mcc/BenchKit/bin/tmp/tmp.zWnBS2xN3B
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
/home/mcc/BenchKit/bin/verifypn -n -c -q 718 -l 29 -d 299 -z 4 -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
CPN OverApproximation is only usable on colored models
Time left: 3589
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
timeout 3589 /home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --binary-query-io 2 --write-simplified /home/mcc/BenchKit/bin/tmp/tmp.7T5HdXfDWG --write-reduced /home/mcc/BenchKit/bin/tmp/tmp.zWnBS2xN3B -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
Time left: 2860
---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (16 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 21.5628 on verification
@@@23.66,123596@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.zWnBS2xN3B /home/mcc/BenchKit/bin/tmp/tmp.7T5HdXfDWG --binary-query-io 1 -x 1 -n
FORMULA RERS17pb113-PT-5-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT EXPLICIT STATE_COMPRESSION STUBBORN_SETS
Time left: 2836
------------------- QUERY 2 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 0.107728 on verification
@@@2.46,123536@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.zWnBS2xN3B /home/mcc/BenchKit/bin/tmp/tmp.7T5HdXfDWG --binary-query-io 1 -x 2 -n
FORMULA RERS17pb113-PT-5-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2833
------------------- QUERY 3 ----------------------
No solution found
Time left: 2531
------------------- QUERY 4 ----------------------
No solution found
Time left: 2230
------------------- QUERY 5 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 2.24509 on verification
@@@4.18,230096@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BestFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.zWnBS2xN3B /home/mcc/BenchKit/bin/tmp/tmp.7T5HdXfDWG --binary-query-io 1 -x 5 -n
FORMULA RERS17pb113-PT-5-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2225
------------------- QUERY 6 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 0.164134 on verification
@@@1.60,122572@@@
Query index 0 was solved
Query is satisfied.
Spent 0.162295 on verification
Query index 0 was solved
Query is satisfied.
Spent 0.164751 on verification
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.zWnBS2xN3B /home/mcc/BenchKit/bin/tmp/tmp.7T5HdXfDWG --binary-query-io 1 -x 6 -n
FORMULA RERS17pb113-PT-5-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2223
------------------- QUERY 7 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 0.185328 on verification
Query index 0 was solved
Query is satisfied.
Spent 0.181555 on verification
@@@1.60,123796@@@
Query index 0 was solved
Query is satisfied.
Spent 0.183902 on verification
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.zWnBS2xN3B /home/mcc/BenchKit/bin/tmp/tmp.7T5HdXfDWG --binary-query-io 1 -x 7 -n
FORMULA RERS17pb113-PT-5-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2222
------------------- QUERY 8 ----------------------
No solution found
Command terminated by signal 9
@@@155.81,9523116@@@
Time left: 1919
------------------- QUERY 9 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 0.113405 on verification
@@@2.75,123308@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.zWnBS2xN3B /home/mcc/BenchKit/bin/tmp/tmp.7T5HdXfDWG --binary-query-io 1 -x 9 -n
FORMULA RERS17pb113-PT-5-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1916
------------------- QUERY 10 ----------------------
No solution found
Time left: 1614
------------------- QUERY 11 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 0.380851 on verification
@@@1.46,122780@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.zWnBS2xN3B /home/mcc/BenchKit/bin/tmp/tmp.7T5HdXfDWG --binary-query-io 1 -x 11 -n
FORMULA RERS17pb113-PT-5-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1613
------------------- QUERY 12 ----------------------
No solution found
Command terminated by signal 9
@@@173.06,8617604@@@
Time left: 1310
------------------- QUERY 13 ----------------------
No solution found
Time left: 1008
------------------- QUERY 14 ----------------------
No solution found
Command terminated by signal 9
@@@95.80,7663168@@@
Command terminated by signal 9
@@@187.33,10669952@@@
Time left: 706
------------------- QUERY 15 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.138918 on verification
@@@1.42,122680@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.zWnBS2xN3B /home/mcc/BenchKit/bin/tmp/tmp.7T5HdXfDWG --binary-query-io 1 -x 15 -n
FORMULA RERS17pb113-PT-5-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 704
------------------- QUERY 16 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.139548 on verification
@@@1.22,122736@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.zWnBS2xN3B /home/mcc/BenchKit/bin/tmp/tmp.7T5HdXfDWG --binary-query-io 1 -x 16 -n
FORMULA RERS17pb113-PT-5-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 703
---------------------------------------------------
Step 2: Sequential processing
---------------------------------------------------
Remaining 7 queries are verified sequentially.
Each query is verified for a dynamic timeout (at least 598 seconds)
Time left: 703
------------------- QUERY 3 ----------------------
Running query 3 for 598 seconds. Remaining: 7 queries and 703 seconds
No solution found
Time left: 103
------------------- QUERY 4 ----------------------
Time left: 103
---------------------------------------------------
Step 4: Random Parallel processing
---------------------------------------------------
Doing random parallel verification of individual queries (7 in total)
Each query is verified by 4 parallel strategies for 14 seconds
------------------- QUERY 3 ----------------------
No solution found
Time left: 87
------------------- QUERY 4 ----------------------
No solution found
Time left: 70
------------------- QUERY 8 ----------------------
No solution found
Time left: 54
------------------- QUERY 10 ----------------------
No solution found
Time left: 37
------------------- QUERY 12 ----------------------
No solution found
Time left: 21
------------------- QUERY 13 ----------------------
No solution found
Time left: 4
------------------- QUERY 14 ----------------------
No solution found
Time left: -2
Out of time, terminating!
terminated-with-cleanup
BK_STOP 1652827484009
--------------------
content from stderr:
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb113-PT-5"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="tapaal"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool tapaal"
echo " Input is RERS17pb113-PT-5, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r183-tajo-165281568700034"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb113-PT-5.tgz
mv RERS17pb113-PT-5 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;