Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2022-input.r078-tall-165260110700698.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2022-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is FamilyReunion-COL-L08000M0800C400P400G200, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r078-tall-165260110700698
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 892K
-rw-r--r-- 1 mcc users 7.5K Apr 30 08:09 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Apr 30 08:09 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Apr 30 08:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 39K Apr 30 08:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 10 09:33 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 10 09:33 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K May 9 07:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 9 07:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K May 9 07:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 9 07:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 2.0K May 9 07:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K May 9 07:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 10 09:33 equiv_pt
-rw-r--r-- 1 mcc users 24 May 10 09:33 instance
-rw-r--r-- 1 mcc users 5 May 10 09:33 iscolored
-rw-r--r-- 1 mcc users 661K May 10 09:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-00
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-01
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-02
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-03
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-04
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-05
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-06
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-07
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-08
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-09
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-10
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-11
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-12
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-13
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-14
FORMULA_NAME FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1652718047682

Running Version 202205111006
[2022-05-16 16:20:48] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -spotpath, /home/mcc/BenchKit/bin//..//ltlfilt, -z3path, /home/mcc/BenchKit/bin//..//z3/bin/z3, -yices2path, /home/mcc/BenchKit/bin//..//yices/bin/yices, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2022-05-16 16:20:48] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2022-05-16 16:20:48] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2022-05-16 16:20:49] [WARNING] Using fallBack plugin, rng conformance not checked
[2022-05-16 16:20:49] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 811 ms
[2022-05-16 16:20:50] [INFO ] Detected 5 constant HL places corresponding to 2006 PT places.
[2022-05-16 16:20:50] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 200760109 PT places and 1.9257647E8 transition bindings in 1110 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
[2022-05-16 16:20:51] [INFO ] Built PT skeleton of HLPN with 104 places and 66 transitions 198 arcs in 148 ms.
[2022-05-16 16:20:51] [INFO ] Skeletonized 16 HLPN properties in 1 ms.
Initial state reduction rules removed 3 formulas.
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 104 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 6 formulas.
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Remains 11 properties that can be checked using skeleton over-approximation.
Initial state reduction rules removed 1 formulas.
Reduce places removed 5 places and 0 transitions.
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 99 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 99 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Incomplete random walk after 16006 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=842 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=33 ) properties (out of 29) seen :5
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=28 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 24) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 23) seen :0
Running SMT prover for 23 properties.
// Phase 1: matrix 66 rows 99 cols
[2022-05-16 16:20:51] [INFO ] Computed 33 place invariants in 15 ms
[2022-05-16 16:20:51] [INFO ] [Real]Absence check using 4 positive place invariants in 3 ms returned sat
[2022-05-16 16:20:51] [INFO ] [Real]Absence check using 4 positive and 29 generalized place invariants in 8 ms returned sat
[2022-05-16 16:20:51] [INFO ] After 306ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:23
[2022-05-16 16:20:51] [INFO ] [Nat]Absence check using 4 positive place invariants in 2 ms returned sat
[2022-05-16 16:20:51] [INFO ] [Nat]Absence check using 4 positive and 29 generalized place invariants in 7 ms returned sat
[2022-05-16 16:20:52] [INFO ] After 118ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :23
[2022-05-16 16:20:52] [INFO ] After 262ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :23
Attempting to minimize the solution found.
Minimization took 99 ms.
[2022-05-16 16:20:52] [INFO ] After 527ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :23
Fused 23 Parikh solutions to 17 different solutions.
Finished Parikh walk after 818 steps, including 1 resets, run visited all 23 properties in 49 ms. (steps per millisecond=16 )
Parikh walk visited 23 properties in 49 ms.
[2022-05-16 16:20:52] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2022-05-16 16:20:52] [INFO ] Flatten gal took : 26 ms
FORMULA FamilyReunion-COL-L08000M0800C400P400G200-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2022-05-16 16:20:52] [INFO ] Flatten gal took : 8 ms
Transition Gate2ANDJoin forces synchronizations/join behavior on parameter l of sort LegalResident
Transition ReceiveLangChoice forces synchronizations/join behavior on parameter m of sort MICSystem
Symmetric sort wr.t. initial and guards and successors and join/free detected :CINFORMI
Symmetric sort wr.t. initial detected :CINFORMI
Symmetric sort wr.t. initial and guards detected :CINFORMI
Applying symmetric unfolding of full symmetric sort :CINFORMI domain size was 401
Transition Gate1ANDJoin forces synchronizations/join behavior on parameter p of sort PublicAdminOffice
Symmetric sort wr.t. initial and guards and successors and join/free detected :GovernmentCommission
Symmetric sort wr.t. initial detected :GovernmentCommission
Symmetric sort wr.t. initial and guards detected :GovernmentCommission
Applying symmetric unfolding of full symmetric sort :GovernmentCommission domain size was 201
Symmetric sort wr.t. initial and guards and successors and join/free detected :Response
Symmetric sort wr.t. initial detected :Response
Transition SendClearanceToRel : guard parameter $r(Response:2) in guard (EQ $r 0)introduces in Response(2) partition with 2 elements
Total runtime 33788 ms.
Its-tools:
An error has occurred. See the log file
/home/mcc/BenchKit/itstools/configuration/1652718048242.log.

BK_STOP 1652718082765

--------------------
content from stderr:

+ export LANG=C
+ LANG=C
+ export BINDIR=/home/mcc/BenchKit/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//..//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ export PYTHONPATH=/usr/lib/python3.9/site-packages/
+ PYTHONPATH=/usr/lib/python3.9/site-packages/
+ export LD_LIBRARY_PATH=/usr/local/lib:
+ LD_LIBRARY_PATH=/usr/local/lib:
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202205111006.jar
+ VERSION=202205111006
+ echo 'Running Version 202205111006'
+ /home/mcc/BenchKit/bin//..//itstools/its-tools -data @none -pnfolder /home/mcc/execution -examination CTLFireability -spotpath /home/mcc/BenchKit/bin//..//ltlfilt -z3path /home/mcc/BenchKit/bin//..//z3/bin/z3 -yices2path /home/mcc/BenchKit/bin//..//yices/bin/yices -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=@none -Xss128m -Xms40m -Xmx8192m

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L08000M0800C400P400G200"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is FamilyReunion-COL-L08000M0800C400P400G200, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r078-tall-165260110700698"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L08000M0800C400P400G200.tgz
mv FamilyReunion-COL-L08000M0800C400P400G200 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;