About the Execution of Tapaal for FamilyReunion-COL-L00020M0002C001P001G001
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16206.031 | 3591959.00 | 12554920.00 | 3098.60 | ???TT?T?TF?F?F?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2022-input.r075-tall-165260107300626.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2022-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool tapaal
Input is FamilyReunion-COL-L00020M0002C001P001G001, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r075-tall-165260107300626
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 372K
-rw-r--r-- 1 mcc users 8.0K Apr 30 08:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Apr 30 08:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Apr 30 08:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 40K Apr 30 08:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 5 May 10 09:33 equiv_pt
-rw-r--r-- 1 mcc users 4.2K May 10 09:33 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 10 09:33 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 24 May 10 09:33 instance
-rw-r--r-- 1 mcc users 5 May 10 09:33 iscolored
-rw-r--r-- 1 mcc users 3.8K May 9 07:47 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 9 07:47 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K May 9 07:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 9 07:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 135K May 10 09:33 model.pnml
-rw-r--r-- 1 mcc users 2.0K May 9 07:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K May 9 07:48 UpperBounds.xml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-01
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-02
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1652702439659
tapaal
Got BK_BIN_PATH=/home/mcc/BenchKit/bin/
---> tapaal --- TAPAAL v5
Setting MODEL_PATH=.
Setting VERIFYPN=/home/mcc/BenchKit/bin/verifypn
Got BK_TIME_CONFINEMENT=3600
Setting TEMPDIR=/home/mcc/BenchKit/bin/tmp
Got BK_MEMORY_CONFINEMENT=16384
Limiting to 16265216 kB
Total timeout: 3590
Time left: 3590
*************************************
* TAPAAL verifying CTLFireability *
*************************************
TEMPDIR=/home/mcc/BenchKit/bin/tmp
QF=/home/mcc/BenchKit/bin/tmp/tmp.AVT2Fnp0eg
MF=/home/mcc/BenchKit/bin/tmp/tmp.l7vllr8eAH
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
/home/mcc/BenchKit/bin/verifypn -n -c -q 718 -l 29 -d 299 -z 4 -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-02
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-01
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00
Unable to decide if FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04 is satisfied.
Query is MAYBE satisfied.
Spent 0.002552 on verification
Time left: 3590
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
timeout 3590 /home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --binary-query-io 2 --write-simplified /home/mcc/BenchKit/bin/tmp/tmp.AVT2Fnp0eg --write-reduced /home/mcc/BenchKit/bin/tmp/tmp.l7vllr8eAH -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
Time left: 3575
---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (16 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 0.002609 on verification
Query index 0 was solved
Query is satisfied.
Spent 0.003329 on verification
@@@0.06,14460@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BestFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.l7vllr8eAH /home/mcc/BenchKit/bin/tmp/tmp.AVT2Fnp0eg --binary-query-io 1 -x 1 -n
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT EXPLICIT STATE_COMPRESSION STUBBORN_SETS
Time left: 3575
------------------- QUERY 2 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.073632 on verification
@@@0.13,63592@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.l7vllr8eAH /home/mcc/BenchKit/bin/tmp/tmp.AVT2Fnp0eg --binary-query-io 1 -x 2 -n
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3574
------------------- QUERY 3 ----------------------
No solution found
Time left: 3272
------------------- QUERY 4 ----------------------
No solution found
Time left: 2970
------------------- QUERY 5 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.306053 on verification
@@@0.36,78748@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.l7vllr8eAH /home/mcc/BenchKit/bin/tmp/tmp.AVT2Fnp0eg --binary-query-io 1 -x 5 -n
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2970
------------------- QUERY 6 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 0.048998 on verification
@@@0.10,63508@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.l7vllr8eAH /home/mcc/BenchKit/bin/tmp/tmp.AVT2Fnp0eg --binary-query-io 1 -x 6 -n
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2970
------------------- QUERY 7 ----------------------
No solution found
Command terminated by signal 9
@@@89.77,4048800@@@
Command terminated by signal 9
@@@135.88,5400228@@@
Command terminated by signal 9
@@@216.62,8102080@@@
Time left: 2667
------------------- QUERY 8 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 0.056755 on verification
Query index 0 was solved
Query is satisfied.
Spent 0.087502 on verification
@@@0.19,63416@@@
@@@0.21,63524@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.l7vllr8eAH /home/mcc/BenchKit/bin/tmp/tmp.AVT2Fnp0eg --binary-query-io 1 -x 8 -n
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.l7vllr8eAH /home/mcc/BenchKit/bin/tmp/tmp.AVT2Fnp0eg --binary-query-io 1 -x 8 -n
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2667
------------------- QUERY 9 ----------------------
No solution found
Time left: 2366
------------------- QUERY 10 ----------------------
No solution found
Time left: 2064
------------------- QUERY 11 ----------------------
No solution found
Command terminated by signal 9
@@@278.76,10233148@@@
Time left: 1762
------------------- QUERY 12 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 0.489567 on verification
@@@0.55,70504@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.l7vllr8eAH /home/mcc/BenchKit/bin/tmp/tmp.AVT2Fnp0eg --binary-query-io 1 -x 12 -n
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1761
------------------- QUERY 13 ----------------------
No solution found
Time left: 1460
------------------- QUERY 14 ----------------------
No solution found
Time left: 1159
------------------- QUERY 15 ----------------------
No solution found
Time left: 856
------------------- QUERY 16 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.258376 on verification
@@@0.36,64084@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.l7vllr8eAH /home/mcc/BenchKit/bin/tmp/tmp.AVT2Fnp0eg --binary-query-io 1 -x 16 -n
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 856
---------------------------------------------------
Step 2: Sequential processing
---------------------------------------------------
Remaining 9 queries are verified sequentially.
Each query is verified for a dynamic timeout (at least 598 seconds)
Time left: 856
------------------- QUERY 3 ----------------------
Running query 3 for 598 seconds. Remaining: 9 queries and 856 seconds
No solution found
Time left: 256
------------------- QUERY 4 ----------------------
Time left: 256
---------------------------------------------------
Step 4: Random Parallel processing
---------------------------------------------------
Doing random parallel verification of individual queries (9 in total)
Each query is verified by 4 parallel strategies for 28 seconds
------------------- QUERY 3 ----------------------
No solution found
Time left: 225
------------------- QUERY 4 ----------------------
No solution found
Time left: 195
------------------- QUERY 7 ----------------------
No solution found
Time left: 165
------------------- QUERY 9 ----------------------
No solution found
Time left: 135
------------------- QUERY 10 ----------------------
No solution found
Time left: 105
------------------- QUERY 11 ----------------------
No solution found
Time left: 73
------------------- QUERY 13 ----------------------
No solution found
Time left: 43
------------------- QUERY 14 ----------------------
No solution found
Time left: 13
------------------- QUERY 15 ----------------------
No solution found
Time left: -2
Out of time, terminating!
terminated-with-cleanup
BK_STOP 1652706031618
--------------------
content from stderr:
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00020M0002C001P001G001"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="tapaal"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool tapaal"
echo " Input is FamilyReunion-COL-L00020M0002C001P001G001, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r075-tall-165260107300626"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00020M0002C001P001G001.tgz
mv FamilyReunion-COL-L00020M0002C001P001G001 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;