Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2022-input.r058-tall-165254769200130.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2022-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool gspn
Input is DLCround-PT-04a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r058-tall-165254769200130
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 416K
-rw-r--r-- 1 mcc users 6.2K Apr 30 07:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Apr 30 07:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Apr 30 07:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Apr 30 07:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 10 09:33 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 10 09:33 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K May 9 07:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 9 07:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 9 07:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 9 07:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 9 07:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 9 07:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 10 09:33 equiv_col
-rw-r--r-- 1 mcc users 4 May 10 09:33 instance
-rw-r--r-- 1 mcc users 6 May 10 09:33 iscolored
-rw-r--r-- 1 mcc users 200K May 10 09:33 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-04a-CTLFireability-00
FORMULA_NAME DLCround-PT-04a-CTLFireability-01
FORMULA_NAME DLCround-PT-04a-CTLFireability-02
FORMULA_NAME DLCround-PT-04a-CTLFireability-03
FORMULA_NAME DLCround-PT-04a-CTLFireability-04
FORMULA_NAME DLCround-PT-04a-CTLFireability-05
FORMULA_NAME DLCround-PT-04a-CTLFireability-06
FORMULA_NAME DLCround-PT-04a-CTLFireability-07
FORMULA_NAME DLCround-PT-04a-CTLFireability-08
FORMULA_NAME DLCround-PT-04a-CTLFireability-09
FORMULA_NAME DLCround-PT-04a-CTLFireability-10
FORMULA_NAME DLCround-PT-04a-CTLFireability-11
FORMULA_NAME DLCround-PT-04a-CTLFireability-12
FORMULA_NAME DLCround-PT-04a-CTLFireability-13
FORMULA_NAME DLCround-PT-04a-CTLFireability-14
FORMULA_NAME DLCround-PT-04a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1652575217417

----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2021
----------------------------------------------------------------------

Running DLCround-PT-04a

IS_COLORED=
IS_NUPN=1

LOADING model.pnml ...
MODEL CLASS: P/T NET WITH NUPN EXTENSION
PLACES: 139
TRANSITIONS: 823
CONSTANTS: 0
TEMPLATE VARS: 0
ARCS: 3074
NUPN UNITS: 70
LOADING TIME: 0.43

SAVING AS /home/mcc/execution/model.(net/def) ...
exportGspn useExt=true
SAVING TIME: 0.04
SAVING NAME MAP FILE /home/mcc/execution/model.id2name ...
SAVING NUPN UNITS AS FILE /home/mcc/execution/model.nu ...
TOTAL TIME: 0.705
OK.
----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 433
MODEL NAME: /home/mcc/execution/model
139 places, 823 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Building monolithic NSF...
FORMULA DLCround-PT-04a-CTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA DLCround-PT-04a-CTLFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1652575221342

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-04a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="gspn"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool gspn"
echo " Input is DLCround-PT-04a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r058-tall-165254769200130"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-04a.tgz
mv DLCround-PT-04a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;