Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2022-input.r057-tall-165254767800002.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2022-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool tapaal
Input is DLCflexbar-PT-2a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r057-tall-165254767800002
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 812K
-rw-r--r-- 1 mcc users 9.6K Apr 29 20:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 114K Apr 29 20:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.3K Apr 29 19:41 CTLFireability.txt
-rw-r--r-- 1 mcc users 34K Apr 29 19:41 CTLFireability.xml
-rw-r--r-- 1 mcc users 6 May 10 09:33 equiv_col
-rw-r--r-- 1 mcc users 4.2K May 10 09:33 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 10 09:33 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3 May 10 09:33 instance
-rw-r--r-- 1 mcc users 6 May 10 09:33 iscolored
-rw-r--r-- 1 mcc users 3.8K May 9 07:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 9 07:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 9 07:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 9 07:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 545K May 10 09:33 model.pnml
-rw-r--r-- 1 mcc users 1.6K May 9 07:24 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 9 07:24 UpperBounds.xml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-00
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-01
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-02
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-03
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-04
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-05
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-06
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-07
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-08
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-09
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-10
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-11
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-12
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-13
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-14
FORMULA_NAME DLCflexbar-PT-2a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1652548773018

tapaal
Got BK_BIN_PATH=/home/mcc/BenchKit/bin/
---> tapaal --- TAPAAL v5
Setting MODEL_PATH=.
Setting VERIFYPN=/home/mcc/BenchKit/bin/verifypn
Got BK_TIME_CONFINEMENT=3600
Setting TEMPDIR=/home/mcc/BenchKit/bin/tmp
Got BK_MEMORY_CONFINEMENT=16384
Limiting to 16265216 kB
Total timeout: 3590
Time left: 3590

*************************************
* TAPAAL verifying CTLFireability *
*************************************
TEMPDIR=/home/mcc/BenchKit/bin/tmp
QF=/home/mcc/BenchKit/bin/tmp/tmp.04voZyRtbV
MF=/home/mcc/BenchKit/bin/tmp/tmp.T3iLUyxTR3
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
/home/mcc/BenchKit/bin/verifypn -n -c -q 718 -l 29 -d 299 -z 4 -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
CPN OverApproximation is only usable on colored models
Time left: 3590
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
timeout 3590 /home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --binary-query-io 2 --write-simplified /home/mcc/BenchKit/bin/tmp/tmp.04voZyRtbV --write-reduced /home/mcc/BenchKit/bin/tmp/tmp.T3iLUyxTR3 -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
FORMULA DLCflexbar-PT-2a-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 12 was solved

Query is NOT satisfied.
Solution found by parallel simplification (step 0)
Time left: 3590

---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (15 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
Solution found by parallel processing (step 1)
Search strategy option was ignored as the TAR engine is called.
Query index 0 was solved

Query is NOT satisfied.


Solved using Trace Abstraction Refinement

Spent 0.0001 on verification
@@@0.02,9172@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.T3iLUyxTR3 /home/mcc/BenchKit/bin/tmp/tmp.04voZyRtbV --binary-query-io 1 -x 1 -n

FORMULA DLCflexbar-PT-2a-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT TRACE_ABSTRACTION_REFINEMENT
Time left: 3590
------------------- QUERY 2 ----------------------
No solution found
Command terminated by signal 9
@@@115.50,6273508@@@
Command terminated by signal 9
@@@190.84,8125824@@@


Time left: 3288
------------------- QUERY 3 ----------------------
No solution found
Command terminated by signal 9
@@@126.51,6630652@@@
Command terminated by signal 9
@@@224.38,9023240@@@


Time left: 2986
------------------- QUERY 4 ----------------------
No solution found
Command terminated by signal 9
@@@119.70,6410160@@@
Command terminated by signal 9
@@@194.03,8223564@@@


Time left: 2685
------------------- QUERY 5 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.05125 on verification
@@@0.10,61472@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.T3iLUyxTR3 /home/mcc/BenchKit/bin/tmp/tmp.04voZyRtbV --binary-query-io 1 -x 5 -n

FORMULA DLCflexbar-PT-2a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2684
------------------- QUERY 6 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.0429 on verification
@@@0.06,61400@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.T3iLUyxTR3 /home/mcc/BenchKit/bin/tmp/tmp.04voZyRtbV --binary-query-io 1 -x 6 -n

FORMULA DLCflexbar-PT-2a-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2684
------------------- QUERY 7 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.079692 on verification
@@@0.10,61368@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.T3iLUyxTR3 /home/mcc/BenchKit/bin/tmp/tmp.04voZyRtbV --binary-query-io 1 -x 7 -n

FORMULA DLCflexbar-PT-2a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2684
------------------- QUERY 8 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.06464 on verification
@@@0.09,61236@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.T3iLUyxTR3 /home/mcc/BenchKit/bin/tmp/tmp.04voZyRtbV --binary-query-io 1 -x 8 -n

FORMULA DLCflexbar-PT-2a-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2683
------------------- QUERY 9 ----------------------
No solution found
Command terminated by signal 9
@@@111.48,6350992@@@
Command terminated by signal 9
@@@185.93,8665216@@@


Time left: 2382
------------------- QUERY 10 ----------------------
No solution found
Command terminated by signal 9
@@@112.35,6370396@@@
Command terminated by signal 9
@@@188.22,8642152@@@


Time left: 2080
------------------- QUERY 11 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.050872 on verification
@@@0.09,61308@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.T3iLUyxTR3 /home/mcc/BenchKit/bin/tmp/tmp.04voZyRtbV --binary-query-io 1 -x 11 -n

FORMULA DLCflexbar-PT-2a-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2079
------------------- QUERY 12 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.047564 on verification
@@@0.07,61432@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.T3iLUyxTR3 /home/mcc/BenchKit/bin/tmp/tmp.04voZyRtbV --binary-query-io 1 -x 12 -n

FORMULA DLCflexbar-PT-2a-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2079
------------------- QUERY 13 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.066122 on verification
@@@0.10,61356@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.T3iLUyxTR3 /home/mcc/BenchKit/bin/tmp/tmp.04voZyRtbV --binary-query-io 1 -x 13 -n

FORMULA DLCflexbar-PT-2a-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2079
------------------- QUERY 14 ----------------------
No solution found
Command terminated by signal 9
@@@111.21,6379684@@@
Command terminated by signal 9
@@@189.14,8714688@@@


Time left: 1777
------------------- QUERY 15 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.462028 on verification
@@@0.53,67900@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.T3iLUyxTR3 /home/mcc/BenchKit/bin/tmp/tmp.04voZyRtbV --binary-query-io 1 -x 15 -n

FORMULA DLCflexbar-PT-2a-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1776
---------------------------------------------------
Step 2: Sequential processing
---------------------------------------------------
Remaining 6 queries are verified sequentially.
Each query is verified for a dynamic timeout (at least 598 seconds)
Time left: 1776
------------------- QUERY 2 ----------------------
Running query 2 for 598 seconds. Remaining: 6 queries and 1776 seconds
No solution found
Command terminated by signal 9
@@@156.30,8927828@@@
Command terminated by signal 9
@@@355.85,16146120@@@


Time left: 1420
------------------- QUERY 3 ----------------------
Running query 3 for 598 seconds. Remaining: 5 queries and 1420 seconds
No solution found
Command terminated by signal 9
@@@183.45,10062100@@@
Command terminated by signal 9
@@@579.72,16145668@@@


Time left: 840
------------------- QUERY 4 ----------------------
Running query 4 for 598 seconds. Remaining: 4 queries and 840 seconds
No solution found
Command terminated by signal 9
@@@157.36,9007920@@@
Command terminated by signal 9
@@@369.98,16147108@@@


Time left: 470
------------------- QUERY 9 ----------------------
Time left: 470
---------------------------------------------------
Step 4: Random Parallel processing
---------------------------------------------------
Doing random parallel verification of individual queries (6 in total)
Each query is verified by 4 parallel strategies for 78 seconds
------------------- QUERY 2 ----------------------
No solution found
Command terminated by signal 9
@@@77.01,4056464@@@


Time left: 388
------------------- QUERY 3 ----------------------
No solution found
Command terminated by signal 9
@@@74.78,4169328@@@


Time left: 308
------------------- QUERY 4 ----------------------
No solution found
Command terminated by signal 9
@@@68.41,4065140@@@


Time left: 227
------------------- QUERY 9 ----------------------
No solution found
Command terminated by signal 9
@@@69.52,4071528@@@


Time left: 147
------------------- QUERY 10 ----------------------
No solution found
Command terminated by signal 9
@@@68.97,4061508@@@


Time left: 67
------------------- QUERY 14 ----------------------
No solution found



Time left: -3
Out of time, terminating!
terminated-with-cleanup

BK_STOP 1652552366850

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-2a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="tapaal"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool tapaal"
echo " Input is DLCflexbar-PT-2a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r057-tall-165254767800002"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-2a.tgz
mv DLCflexbar-PT-2a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;