fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r308-tall-162132105000578
Last Updated
Jun 28, 2021

About the Execution of LoLA for UtilityControlRoom-PT-Z2T4N08

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
5867.852 372631.00 367628.00 668.10 TTFT?T?F??F?TTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r308-tall-162132105000578.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is UtilityControlRoom-PT-Z2T4N08, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r308-tall-162132105000578
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.6M
-rw-r--r-- 1 mcc users 92K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 408K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 146K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 583K May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 9.6K May 12 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 38K May 12 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 16K May 12 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 54K May 12 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 9.4K May 12 04:37 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 33K May 12 04:37 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 15K May 11 18:09 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 49K May 11 18:09 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.7K May 12 04:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.5K May 12 04:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 8 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 93K May 12 08:13 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-00
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-02
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-03
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-04
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-05
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-06
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-07
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-08
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-09
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-10
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-11
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-12
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-13
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-14
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1621383765078

starting LoLA
BK_INPUT UtilityControlRoom-PT-Z2T4N08
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability

FORMULA UtilityControlRoom-PT-Z2T4N08-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621384137709

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 53 (type SKEL/FNDP) for 3 UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/EQUN) for 3 UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SKEL/SRCH) for 3 UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SKEL/SRCH) for 3 UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 55 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 56 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 53 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 54 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-CTLFireability-01 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 38 (type EXCL) for 37 UtilityControlRoom-PT-Z2T4N08-CTLFireability-11
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: try reading problem file /home/mcc/execution/CTLFireability-54.sara.
sara: place or transition ordering is non-deterministic

lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 54 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 57 (type FNDP) for 3 UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
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lola: LAUNCH task # 58 (type EQUN) for 3 UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
lola: time limit : 32000000 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type SRCH) for 3 UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
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lola: FINISHED task # 60 (type SRCH) for UtilityControlRoom-PT-Z2T4N08-CTLFireability-01
lola: result : true
lola: markings : 2
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lola: CANCELED task # 57 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-CTLFireability-01 (obsolete)
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sara: try reading problem file /home/mcc/execution/CTLFireability-58.sara.
sara: place or transition ordering is non-deterministic

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UtilityControlRoom-PT-Z2T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 92/1667 29/32 UtilityControlRoom-PT-Z2T4N08-CTLFireability-04 6094692 m, 61822 m/sec, 43166966 t fired, .

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UtilityControlRoom-PT-Z2T4N08-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-01: CONJ true CONJ
UtilityControlRoom-PT-Z2T4N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-05: EGEF true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-13: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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UtilityControlRoom-PT-Z2T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

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17 CTL EXCL 97/1667 31/32 UtilityControlRoom-PT-Z2T4N08-CTLFireability-04 6402915 m, 61644 m/sec, 45408361 t fired, .

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UtilityControlRoom-PT-Z2T4N08-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-01: CONJ true CONJ
UtilityControlRoom-PT-Z2T4N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-05: EGEF true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-13: CTL true CTL model checker
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UtilityControlRoom-PT-Z2T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

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UtilityControlRoom-PT-Z2T4N08-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-01: CONJ true CONJ
UtilityControlRoom-PT-Z2T4N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-05: EGEF true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-13: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z2T4N08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for UtilityControlRoom-PT-Z2T4N08-CTLFireability-02
lola: result : false
lola: markings : 19
lola: fired transitions : 33
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lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-01: CONJ true CONJ
UtilityControlRoom-PT-Z2T4N08-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-04: CTL unknown AGGR
UtilityControlRoom-PT-Z2T4N08-CTLFireability-05: EGEF true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-06: CTL unknown AGGR
UtilityControlRoom-PT-Z2T4N08-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-08: CTL unknown AGGR
UtilityControlRoom-PT-Z2T4N08-CTLFireability-09: CTL unknown AGGR
UtilityControlRoom-PT-Z2T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-11: CTL unknown AGGR
UtilityControlRoom-PT-Z2T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-13: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-PT-Z2T4N08-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z2T4N08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-PT-Z2T4N08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r308-tall-162132105000578"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z2T4N08.tgz
mv UtilityControlRoom-PT-Z2T4N08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;