About the Execution of LoLA for TwoPhaseLocking-PT-nC10000vD
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 4391.712 | 145299.00 | 223195.00 | 204.90 | ?TTFTT??TF????TF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r308-tall-162132104700370.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is TwoPhaseLocking-PT-nC10000vD, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r308-tall-162132104700370
=====================================================================
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preparation of the directory to be used:
/home/mcc/execution
total 312K
-rw-r--r-- 1 mcc users 11K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 88K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.7K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 78K May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 2.9K May 12 08:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 12 08:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 12 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 12 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 3.7K May 12 04:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 12 04:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 11 18:05 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 12K May 11 18:05 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 12 04:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 12 04:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 10 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 4.6K May 12 08:13 model.pnml
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content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-00
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-01
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-02
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-03
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-04
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-05
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-06
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-07
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-08
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-09
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-10
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-11
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-12
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-13
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-14
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1621377324689
starting LoLA
BK_INPUT TwoPhaseLocking-PT-nC10000vD
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1621377469988
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 13 (type EXCL) for 12 TwoPhaseLocking-PT-nC10000vD-CTLFireability-04
lola: time limit : 124 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 70 (type FNDP) for 39 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type EQUN) for 39 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SRCH) for 39 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 73 (type SRCH) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-09
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 74 (type FNDP) for 29 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
sara: try reading problem file /home/mcc/execution/CTLFireability-71.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:664
lola: rewrite Frontend/Parser/formula_rewrite.k:674
lola: rewrite Frontend/Parser/formula_rewrite.k:674
lola: rewrite Frontend/Parser/formula_rewrite.k:674
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 13 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-04
lola: result : true
lola: markings : 44999
lola: fired transitions : 140013
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 66 (type EXCL) for 61 TwoPhaseLocking-PT-nC10000vD-CTLFireability-15
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-15
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 59 (type EXCL) for 58 TwoPhaseLocking-PT-nC10000vD-CTLFireability-14
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-14
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 55 TwoPhaseLocking-PT-nC10000vD-CTLFireability-13
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 71 (type EQUN) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-09
lola: result : unknown
lola: LAUNCH task # 79 (type FNDP) for 61 TwoPhaseLocking-PT-nC10000vD-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 79 (type FNDP) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-15
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 75 (type EQUN) for 29 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/CTLFireability-75.sara.
lola: FINISHED task # 75 (type EQUN) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-07
lola: result : unknown
lola: LAUNCH task # 77 (type SRCH) for 29 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 77 (type SRCH) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-07
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 4/211 21/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-13 4790658 m, 958131 m/sec, 9571316 t fired, .
70 EF FNDP 5/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09 2935140 t fired, 3 attempts, .
74 EF FNDP 5/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07 4144322 t fired, 5 attempts, .
Time elapsed: 5 secs. Pages in use: 21
# running tasks: 3 of 4 Visible: 16
lola: CANCELED task # 56 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
70 EF FNDP 10/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09 7684833 t fired, 8 attempts, .
74 EF FNDP 10/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07 6351840 t fired, 7 attempts, .
Time elapsed: 10 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
lola: LAUNCH task # 50 (type EXCL) for 49 TwoPhaseLocking-PT-nC10000vD-CTLFireability-11
lola: time limit : 224 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
50 CTL EXCL 5/224 6/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-11 1376988 m, 275397 m/sec, 8536527 t fired, .
70 EF FNDP 15/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09 10416024 t fired, 11 attempts, .
74 EF FNDP 15/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07 10673131 t fired, 11 attempts, .
Time elapsed: 15 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
50 CTL EXCL 10/224 11/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-11 2670078 m, 258618 m/sec, 16973516 t fired, .
70 EF FNDP 20/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09 13418702 t fired, 14 attempts, .
74 EF FNDP 20/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07 14743821 t fired, 15 attempts, .
Time elapsed: 20 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
50 CTL EXCL 15/224 16/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-11 3930645 m, 252113 m/sec, 25187089 t fired, .
70 EF FNDP 25/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09 16433269 t fired, 17 attempts, .
74 EF FNDP 25/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07 18790876 t fired, 19 attempts, .
Time elapsed: 25 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
50 CTL EXCL 20/224 21/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-11 5174812 m, 248833 m/sec, 33391517 t fired, .
70 EF FNDP 30/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09 19458033 t fired, 20 attempts, .
74 EF FNDP 30/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07 22823411 t fired, 23 attempts, .
Time elapsed: 30 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
50 CTL EXCL 25/224 26/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-11 6377693 m, 240576 m/sec, 41540827 t fired, .
70 EF FNDP 35/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09 22469579 t fired, 23 attempts, .
74 EF FNDP 35/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07 26924276 t fired, 27 attempts, .
Time elapsed: 35 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
50 CTL EXCL 30/224 31/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-11 7583742 m, 241209 m/sec, 49585004 t fired, .
70 EF FNDP 40/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09 25492979 t fired, 26 attempts, .
74 EF FNDP 40/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07 30984702 t fired, 31 attempts, .
Time elapsed: 40 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
lola: CANCELED task # 50 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ 0 3 0 0 3 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ 0 2 1 0 4 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
70 EF FNDP 45/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09 27965201 t fired, 28 attempts, .
74 EF FNDP 45/3600 0/5 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07 35321751 t fired, 36 attempts, .
Time elapsed: 45 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
lola: LAUNCH task # 44 (type EXCL) for 39 TwoPhaseLocking-PT-nC10000vD-CTLFireability-09
lola: time limit : 237 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-09
lola: result : false
lola: markings : 54996
lola: fired transitions : 149990
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 70 (type FNDP) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-09 (obsolete)
lola: LAUNCH task # 22 (type EXCL) for 15 TwoPhaseLocking-PT-nC10000vD-CTLFireability-05
lola: time limit : 273 sec
lola: memory limit: 32 pages
lola: FINISHED task # 70 (type FNDP) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-09
lola: result : unknown
lola: fired transitions : 28006237
lola: tried executions : 30
lola: time used : 45.000000
lola: memory pages used : 0
lola: FINISHED task # 22 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-05
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 TwoPhaseLocking-PT-nC10000vD-CTLFireability-03
lola: time limit : 296 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-03
lola: result : false
lola: markings : 20004
lola: fired transitions : 60004
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 76 (type EXCL) for 29 TwoPhaseLocking-PT-nC10000vD-CTLFireability-07
lola: time limit : 323 sec
lola: memory limit: 32 pages
lola: FINISHED task # 76 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-07
lola: result : true
lola: markings : 99977
lola: fired transitions : 124969
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 74 (type FNDP) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-07 (obsolete)
lola: LAUNCH task # 81 (type EXCL) for 15 TwoPhaseLocking-PT-nC10000vD-CTLFireability-05
lola: time limit : 355 sec
lola: memory limit: 32 pages
lola: FINISHED task # 74 (type FNDP) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-07
lola: result : unknown
lola: fired transitions : 35995540
lola: tried executions : 37
lola: time used : 46.000000
lola: memory pages used : 0
lola: FINISHED task # 81 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-05
lola: result : false
lola: markings : 20003
lola: fired transitions : 20003
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 26 TwoPhaseLocking-PT-nC10000vD-CTLFireability-06
lola: time limit : 444 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ true LTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
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47 CTL EXCL 10/505 29/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-10 6982573 m, 630867 m/sec, 17905302 t fired, .
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lola: FINISHED task # 37 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-08
lola: result : true
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL false CTL model checker
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 0 0 0 6 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 5/1165 21/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-12 4932554 m, 986510 m/sec, 9889497 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ true LTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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lola: LAUNCH task # 1 (type EXCL) for 0 TwoPhaseLocking-PT-nC10000vD-CTLFireability-00
lola: time limit : 1742 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ true LTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 0 0 0 6 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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1 CTL EXCL 5/1742 7/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-00 1563033 m, 312606 m/sec, 8344356 t fired, .
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ true LTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
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1 CTL EXCL 10/1742 13/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-00 3045787 m, 296550 m/sec, 16552640 t fired, .
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ true LTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 0 0 0 6 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
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1 CTL EXCL 15/1742 19/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-00 4502708 m, 291384 m/sec, 24721101 t fired, .
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ true LTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 0 0 0 6 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
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1 CTL EXCL 20/1742 24/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-00 5925000 m, 284458 m/sec, 32842340 t fired, .
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ true LTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 0 0 0 6 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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1 CTL EXCL 25/1742 30/32 TwoPhaseLocking-PT-nC10000vD-CTLFireability-00 7282627 m, 271525 m/sec, 40768128 t fired, .
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lola: CANCELED task # 1 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ true LTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
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TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ 0 0 0 0 6 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
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lola: LAUNCH task # 4 (type EXCL) for 3 TwoPhaseLocking-PT-nC10000vD-CTLFireability-01
lola: time limit : 3455 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-CTLFireability-01
lola: result : true
lola: markings : 20003
lola: fired transitions : 95007
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC10000vD-CTLFireability-00: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLFireability-01: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-02: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-05: DISJ true LTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-06: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLFireability-07: CONJ unknown CONJ
TwoPhaseLocking-PT-nC10000vD-CTLFireability-08: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-09: CONJ false CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-10: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLFireability-11: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLFireability-12: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLFireability-13: CTL unknown AGGR
TwoPhaseLocking-PT-nC10000vD-CTLFireability-14: CTL true CTL model checker
TwoPhaseLocking-PT-nC10000vD-CTLFireability-15: CONJ false findpath
Time elapsed: 145 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC10000vD"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is TwoPhaseLocking-PT-nC10000vD, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r308-tall-162132104700370"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC10000vD.tgz
mv TwoPhaseLocking-PT-nC10000vD execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;