Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r308-tall-162132104400198.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is ServersAndClients-PT-400080, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r308-tall-162132104400198
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 63M
-rw-r--r-- 1 mcc users 13K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 17K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 113K May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 12 08:02 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K May 12 08:02 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 12 08:02 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 12 08:02 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 3.4K May 11 20:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 11 20:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.9K May 11 17:33 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 11 17:33 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 12 04:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K May 12 04:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 7 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 62M May 12 08:13 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME gen-ReachabilityCardinality-00
FORMULA_NAME gen-ReachabilityCardinality-01
FORMULA_NAME gen-ReachabilityCardinality-02
FORMULA_NAME gen-ReachabilityCardinality-03
FORMULA_NAME gen-ReachabilityCardinality-04
FORMULA_NAME gen-ReachabilityCardinality-05
FORMULA_NAME gen-ReachabilityCardinality-06
FORMULA_NAME gen-ReachabilityCardinality-07
FORMULA_NAME gen-ReachabilityCardinality-08
FORMULA_NAME gen-ReachabilityCardinality-09
FORMULA_NAME gen-ReachabilityCardinality-10
FORMULA_NAME gen-ReachabilityCardinality-11
FORMULA_NAME gen-ReachabilityCardinality-12
FORMULA_NAME gen-ReachabilityCardinality-13
FORMULA_NAME gen-ReachabilityCardinality-14
FORMULA_NAME gen-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1621363518364

starting LoLA
BK_INPUT ServersAndClients-PT-400080
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA gen-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621364272536

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 0 gen-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 0 gen-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 gen-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 0 gen-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 53 (type SKEL/SRCH) for gen-ReachabilityCardinality-00
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for gen-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 51 (type EQUN) for gen-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 54 (type SRCH) for gen-ReachabilityCardinality-00 (obsolete)
lola: FINISHED task # 50 (type SKEL/FNDP) for gen-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 51 (type SKEL/EQUN) for gen-ReachabilityCardinality-00
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 57 (type SKEL/FNDP) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type SKEL/SRCH) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SKEL/SRCH) for gen-ReachabilityCardinality-01
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for gen-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 58 (type EQUN) for gen-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 61 (type SRCH) for gen-ReachabilityCardinality-01 (obsolete)
lola: FINISHED task # 61 (type SKEL/SRCH) for gen-ReachabilityCardinality-01
lola: result : true
lola: markings : 33
lola: fired transitions : 55
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 57 (type SKEL/FNDP) for gen-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 58 (type SKEL/EQUN) for gen-ReachabilityCardinality-01
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type SKEL/FNDP) for 24 gen-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 24 gen-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 68 (type SKEL/SRCH) for 24 gen-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 24 gen-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type SKEL/SRCH) for gen-ReachabilityCardinality-08
lola: result : false
lola: markings : 31
lola: fired transitions : 50
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 65 (type FNDP) for gen-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 66 (type EQUN) for gen-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 69 (type SRCH) for gen-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 73 (type SKEL/FNDP) for 45 gen-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/EQUN) for 45 gen-ReachabilityCardinality-15
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 76 (type SKEL/SRCH) for 45 gen-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SKEL/SRCH) for 45 gen-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 73 (type SKEL/FNDP) for gen-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 74 (type EQUN) for gen-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 76 (type SRCH) for gen-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 77 (type SRCH) for gen-ReachabilityCardinality-15 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-66.sara.
sara: place or transition ordering is non-deterministic

lola: LAUNCH task # 79 (type SKEL/FNDP) for 12 gen-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type SKEL/EQUN) for 12 gen-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 82 (type SKEL/SRCH) for 12 gen-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/SRCH) for 12 gen-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-74.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 74 (type SKEL/EQUN) for gen-ReachabilityCardinality-15
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-80.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 82 (type SKEL/SRCH) for gen-ReachabilityCardinality-04
lola: result : false
lola: markings : 91
lola: fired transitions : 162
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 83 (type SKEL/SRCH) for gen-ReachabilityCardinality-04
lola: result : false
lola: markings : 91
lola: fired transitions : 162
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 79 (type FNDP) for gen-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 80 (type EQUN) for gen-ReachabilityCardinality-04 (obsolete)
lola: FINISHED task # 80 (type SKEL/EQUN) for gen-ReachabilityCardinality-04
lola: result : unknown
lola: FINISHED task # 66 (type SKEL/EQUN) for gen-ReachabilityCardinality-08
lola: result : false
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-02: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-05: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-06: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-09: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 675 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 87 (type SKEL/FNDP) for 15 gen-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type SKEL/EQUN) for 15 gen-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type SKEL/SRCH) for 15 gen-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type SKEL/SRCH) for 15 gen-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 91 (type SKEL/SRCH) for gen-ReachabilityCardinality-05
lola: result : true
lola: markings : 23
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 87 (type FNDP) for gen-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 88 (type EQUN) for gen-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 90 (type SRCH) for gen-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 95 (type SKEL/FNDP) for 33 gen-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/EQUN) for 33 gen-ReachabilityCardinality-11
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SKEL/SRCH) for 33 gen-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 99 (type SKEL/SRCH) for 33 gen-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 87 (type SKEL/FNDP) for gen-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-88.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 99 (type SKEL/SRCH) for gen-ReachabilityCardinality-11
lola: result : true
lola: markings : 26
lola: fired transitions : 43
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
lola: CANCELED task # 95 (type FNDP) for gen-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 96 (type EQUN) for gen-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 98 (type SRCH) for gen-ReachabilityCardinality-11 (obsolete)
lola: FINISHED task # 96 (type SKEL/EQUN) for gen-ReachabilityCardinality-11
lola: result : unknown
lola: FINISHED task # 95 (type SKEL/FNDP) for gen-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 88 (type SKEL/EQUN) for gen-ReachabilityCardinality-05
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: planning for gen-ReachabilityCardinality-08 stopped (result already fixed).
lola: planning for gen-ReachabilityCardinality-04 stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 102 (type SKEL/FNDP) for 21 gen-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SKEL/EQUN) for 21 gen-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 105 (type SKEL/SRCH) for 21 gen-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SKEL/SRCH) for 21 gen-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 105 (type SKEL/SRCH) for gen-ReachabilityCardinality-07
lola: result : false
lola: markings : 25
lola: fired transitions : 40
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 102 (type FNDP) for gen-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 103 (type EQUN) for gen-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 106 (type SRCH) for gen-ReachabilityCardinality-07 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 109 (type SKEL/FNDP) for 36 gen-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SKEL/EQUN) for 36 gen-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SKEL/SRCH) for 36 gen-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SKEL/SRCH) for 36 gen-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-110.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 113 (type SKEL/SRCH) for gen-ReachabilityCardinality-12
lola: result : true
lola: markings : 17
lola: fired transitions : 27
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 109 (type FNDP) for gen-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 110 (type EQUN) for gen-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 112 (type SRCH) for gen-ReachabilityCardinality-12 (obsolete)
lola: FINISHED task # 109 (type SKEL/FNDP) for gen-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 112 (type SKEL/SRCH) for gen-ReachabilityCardinality-12
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 110 (type SKEL/EQUN) for gen-ReachabilityCardinality-12
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 117 (type SKEL/FNDP) for 9 gen-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type SKEL/EQUN) for 9 gen-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SKEL/SRCH) for 9 gen-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SKEL/SRCH) for 9 gen-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 121 (type SKEL/SRCH) for gen-ReachabilityCardinality-03
lola: result : true
lola: markings : 8
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 117 (type FNDP) for gen-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 118 (type EQUN) for gen-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 120 (type SRCH) for gen-ReachabilityCardinality-03 (obsolete)
lola: FINISHED task # 117 (type SKEL/FNDP) for gen-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 118 (type SKEL/EQUN) for gen-ReachabilityCardinality-03
lola: result : unknown
lola: FINISHED task # 103 (type SKEL/EQUN) for gen-ReachabilityCardinality-07
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 124 (type SKEL/FNDP) for 18 gen-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 125 (type SKEL/EQUN) for 18 gen-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type SKEL/SRCH) for 18 gen-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 128 (type SKEL/SRCH) for 18 gen-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 127 (type SKEL/SRCH) for gen-ReachabilityCardinality-06
lola: result : false
lola: markings : 36
lola: fired transitions : 60
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 124 (type FNDP) for gen-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 125 (type EQUN) for gen-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 128 (type SRCH) for gen-ReachabilityCardinality-06 (obsolete)
lola: FINISHED task # 124 (type SKEL/FNDP) for gen-ReachabilityCardinality-06
lola: result : unknown
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-125.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 125 (type SKEL/EQUN) for gen-ReachabilityCardinality-06
lola: result : false
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 131 (type SKEL/FNDP) for 6 gen-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type SKEL/EQUN) for 6 gen-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 134 (type SKEL/SRCH) for 6 gen-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type SKEL/SRCH) for 6 gen-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 135 (type SKEL/SRCH) for gen-ReachabilityCardinality-02
lola: result : false
lola: markings : 9
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 131 (type FNDP) for gen-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 132 (type EQUN) for gen-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 134 (type SRCH) for gen-ReachabilityCardinality-02 (obsolete)
lola: FINISHED task # 131 (type SKEL/FNDP) for gen-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 6079
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-132.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 132 (type SKEL/EQUN) for gen-ReachabilityCardinality-02
lola: result : false
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 138 (type SKEL/FNDP) for 27 gen-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SKEL/EQUN) for 27 gen-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type SKEL/SRCH) for 27 gen-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 142 (type SKEL/SRCH) for 27 gen-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 142 (type SKEL/SRCH) for gen-ReachabilityCardinality-09
lola: result : false
lola: markings : 73
lola: fired transitions : 128
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 138 (type FNDP) for gen-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 139 (type EQUN) for gen-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 141 (type SRCH) for gen-ReachabilityCardinality-09 (obsolete)
lola: FINISHED task # 138 (type SKEL/FNDP) for gen-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 532
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-139.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 139 (type SKEL/EQUN) for gen-ReachabilityCardinality-09
lola: result : false
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 146 (type SKEL/FNDP) for 30 gen-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 147 (type SKEL/EQUN) for 30 gen-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type SKEL/SRCH) for 30 gen-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 150 (type SKEL/SRCH) for 30 gen-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 150 (type SKEL/SRCH) for gen-ReachabilityCardinality-10
lola: result : false
lola: markings : 9
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 146 (type FNDP) for gen-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 147 (type EQUN) for gen-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 149 (type SRCH) for gen-ReachabilityCardinality-10 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 146 (type SKEL/FNDP) for gen-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 21
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 680 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-147.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 147 (type SKEL/EQUN) for gen-ReachabilityCardinality-10
lola: result : false
lola: Created skeleton in 2.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 153 (type SKEL/FNDP) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 154 (type SKEL/EQUN) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type SKEL/SRCH) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 157 (type SKEL/SRCH) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 157 (type SKEL/SRCH) for gen-ReachabilityCardinality-14
lola: result : false
lola: markings : 16
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 153 (type FNDP) for gen-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 154 (type EQUN) for gen-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 156 (type SRCH) for gen-ReachabilityCardinality-14 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-154.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 154 (type SKEL/EQUN) for gen-ReachabilityCardinality-14
lola: result : false
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 160 (type SKEL/FNDP) for 39 gen-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 161 (type SKEL/EQUN) for 39 gen-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 163 (type SKEL/SRCH) for 39 gen-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 164 (type SKEL/SRCH) for 39 gen-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 164 (type SKEL/SRCH) for gen-ReachabilityCardinality-13
lola: result : false
lola: markings : 9
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 160 (type FNDP) for gen-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 161 (type EQUN) for gen-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 163 (type SRCH) for gen-ReachabilityCardinality-13 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-161.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 161 (type SKEL/EQUN) for gen-ReachabilityCardinality-13
lola: result : false
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 685 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 690 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 695 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 700 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 705 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 710 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 715 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 720 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 725 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
lola: planning for gen-ReachabilityCardinality-14 stopped (result already fixed).
lola: planning for gen-ReachabilityCardinality-10 stopped (result already fixed).
lola: planning for gen-ReachabilityCardinality-13 stopped (result already fixed).
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-11: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-15: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 730 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
lola: planning for gen-ReachabilityCardinality-09 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: planning for gen-ReachabilityCardinality-06 stopped (result already fixed).
lola: LAUNCH task # 171 (type EXCL) for 45 gen-ReachabilityCardinality-15
lola: time limit : 409 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 167 (type FNDP) for 45 gen-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 168 (type EQUN) for 45 gen-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 170 (type SRCH) for 45 gen-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 170 (type SRCH) for gen-ReachabilityCardinality-15
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 167 (type FNDP) for gen-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 168 (type EQUN) for gen-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 171 (type EXCL) for gen-ReachabilityCardinality-15 (obsolete)
lola: FINISHED task # 167 (type FNDP) for gen-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 178 (type EXCL) for 33 gen-ReachabilityCardinality-11
lola: time limit : 477 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 174 (type FNDP) for 33 gen-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 175 (type EQUN) for 33 gen-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 177 (type SRCH) for 33 gen-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-168.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 178 (type EXCL) for gen-ReachabilityCardinality-11
lola: result : true
lola: markings : 65
lola: fired transitions : 306
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 174 (type FNDP) for gen-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 175 (type EQUN) for gen-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 177 (type SRCH) for gen-ReachabilityCardinality-11 (obsolete)
lola: FINISHED task # 174 (type FNDP) for gen-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 177 (type SRCH) for gen-ReachabilityCardinality-11
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: planning for gen-ReachabilityCardinality-02 stopped (result already fixed).
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-175.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-01: EF 0 0 0 0 4 0 0 1
gen-ReachabilityCardinality-03: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2
gen-ReachabilityCardinality-12: EF 0 0 0 0 4 0 0 1

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 735 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: planning for gen-ReachabilityCardinality-07 stopped (result already fixed).
lola: LAUNCH task # 185 (type EXCL) for 9 gen-ReachabilityCardinality-03
lola: time limit : 572 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 181 (type FNDP) for 9 gen-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 182 (type EQUN) for 9 gen-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 184 (type SRCH) for 9 gen-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 184 (type SRCH) for gen-ReachabilityCardinality-03
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 181 (type FNDP) for gen-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 182 (type EQUN) for gen-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 185 (type EXCL) for gen-ReachabilityCardinality-03 (obsolete)
lola: FINISHED task # 181 (type FNDP) for gen-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-182.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 191 (type EXCL) for 36 gen-ReachabilityCardinality-12
lola: time limit : 715 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 187 (type FNDP) for 36 gen-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 188 (type EQUN) for 36 gen-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 190 (type SRCH) for 36 gen-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 187 (type FNDP) for gen-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 188 (type EQUN) for gen-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 190 (type SRCH) for gen-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 191 (type EXCL) for gen-ReachabilityCardinality-12 (obsolete)

sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-188.sara.

lola: FINISHED task # 168 (type EQUN) for gen-ReachabilityCardinality-15
lola: result : true
lola: FINISHED task # 182 (type EQUN) for gen-ReachabilityCardinality-03
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 198 (type EXCL) for 15 gen-ReachabilityCardinality-05
lola: time limit : 954 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 194 (type FNDP) for 15 gen-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 195 (type EQUN) for 15 gen-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 197 (type SRCH) for 15 gen-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 198 (type EXCL) for gen-ReachabilityCardinality-05
lola: result : true
lola: markings : 510
lola: fired transitions : 1518
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 194 (type FNDP) for gen-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 195 (type EQUN) for gen-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 197 (type SRCH) for gen-ReachabilityCardinality-05 (obsolete)
lola: FINISHED task # 194 (type FNDP) for gen-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-195.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 204 (type EXCL) for 3 gen-ReachabilityCardinality-01
lola: time limit : 1430 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 200 (type FNDP) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 201 (type EQUN) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 203 (type SRCH) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 203 (type SRCH) for gen-ReachabilityCardinality-01
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 200 (type FNDP) for gen-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 201 (type EQUN) for gen-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 204 (type EXCL) for gen-ReachabilityCardinality-01 (obsolete)
lola: FINISHED task # 200 (type FNDP) for gen-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-201.sara.

lola: FINISHED task # 175 (type EQUN) for gen-ReachabilityCardinality-11
lola: result : true
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 195 (type EQUN) for gen-ReachabilityCardinality-05
lola: result : true

lola: FINISHED task # 188 (type EQUN) for gen-ReachabilityCardinality-12
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-01: EF true tandem / insertion
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-03: AG false tandem / insertion
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-05: AG false tandem / relaxed
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: EF true findpath
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 740 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 201 (type EQUN) for gen-ReachabilityCardinality-01
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-01: EF true tandem / insertion
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-03: AG false tandem / insertion
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-05: AG false tandem / relaxed
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: EF true findpath
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 745 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-01: EF true tandem / insertion
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-03: AG false tandem / insertion
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-05: AG false tandem / relaxed
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: EF true findpath
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-15: AG false tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 750 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 211 (type EXCL) for 0 gen-ReachabilityCardinality-00
lola: time limit : 2847 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 207 (type FNDP) for 0 gen-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 208 (type EQUN) for 0 gen-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 210 (type SRCH) for 0 gen-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 207 (type FNDP) for gen-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 208 (type EQUN) for gen-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 210 (type SRCH) for gen-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 211 (type EXCL) for gen-ReachabilityCardinality-00 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: AG false findpath
gen-ReachabilityCardinality-01: EF true tandem / insertion
gen-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-03: AG false tandem / insertion
gen-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-05: AG false tandem / relaxed
gen-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
gen-ReachabilityCardinality-09: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-10: AG true skeleton: tandem / relaxed
gen-ReachabilityCardinality-11: AG false tandem / relaxed
gen-ReachabilityCardinality-12: EF true findpath
gen-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-14: EF false skeleton: tandem / relaxed
gen-ReachabilityCardinality-15: AG false tandem / insertion


Time elapsed: 754 secs. Pages in use: 3

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ServersAndClients-PT-400080"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is ServersAndClients-PT-400080, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r308-tall-162132104400198"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ServersAndClients-PT-400080.tgz
mv ServersAndClients-PT-400080 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;