fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r289-tall-162124152900702
Last Updated
Jun 28, 2021

About the Execution of LoLA for MultiCrashLeafsetExtension-PT-S24C11

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16230.212 548676.00 1256143.00 1925.80 ?????T??T??????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r289-tall-162124152900702.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is MultiCrashLeafsetExtension-PT-S24C11, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r289-tall-162124152900702
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 37M
-rw-r--r-- 1 mcc users 37K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 135K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 29K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 97K May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.8K May 12 07:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K May 12 07:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.2K May 12 07:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 12 07:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 6.4K May 11 19:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K May 11 19:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.3K May 11 16:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 11 16:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K May 12 04:40 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K May 12 04:40 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 7 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 36M May 12 08:13 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME gen-ReachabilityCardinality-00
FORMULA_NAME gen-ReachabilityCardinality-01
FORMULA_NAME gen-ReachabilityCardinality-02
FORMULA_NAME gen-ReachabilityCardinality-03
FORMULA_NAME gen-ReachabilityCardinality-04
FORMULA_NAME gen-ReachabilityCardinality-05
FORMULA_NAME gen-ReachabilityCardinality-06
FORMULA_NAME gen-ReachabilityCardinality-07
FORMULA_NAME gen-ReachabilityCardinality-08
FORMULA_NAME gen-ReachabilityCardinality-09
FORMULA_NAME gen-ReachabilityCardinality-10
FORMULA_NAME gen-ReachabilityCardinality-11
FORMULA_NAME gen-ReachabilityCardinality-12
FORMULA_NAME gen-ReachabilityCardinality-13
FORMULA_NAME gen-ReachabilityCardinality-14
FORMULA_NAME gen-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1621310933241

starting LoLA
BK_INPUT MultiCrashLeafsetExtension-PT-S24C11
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA gen-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621311481917

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-01: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-02: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-06: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

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gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-02: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-06: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

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gen-ReachabilityCardinality-01: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-02: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-06: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

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gen-ReachabilityCardinality-02: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
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gen-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

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gen-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
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gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
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gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
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gen-ReachabilityCardinality-02: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
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lola: LAUNCH task # 58 (type EXCL) for 42 gen-ReachabilityCardinality-14
lola: time limit : 206 sec
lola: memory limit: 32 pages
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lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 57 (type SRCH) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-55.sara.
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gen-ReachabilityCardinality-05: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-06: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: EF 0 1 4 0 1 0 0 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 EF FNDP 4/1551 0/5 gen-ReachabilityCardinality-14 700 t fired, 11 attempts, .
55 EF STEQ 4/3102 0/5 gen-ReachabilityCardinality-14 sara is running.
57 EF SRCH 4/3102 1/5 gen-ReachabilityCardinality-14 --
58 EF EXCL 4/206 1/32 gen-ReachabilityCardinality-14 --

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gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-06: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: EF 0 1 4 0 1 0 0 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 EF FNDP 9/1547 0/5 gen-ReachabilityCardinality-14 12542 t fired, 185 attempts, .
55 EF STEQ 9/3098 0/5 gen-ReachabilityCardinality-14 sara is running.
57 EF SRCH 9/3098 1/5 gen-ReachabilityCardinality-14 5833 m, 1166 m/sec, 6835 t fired, .
58 EF EXCL 9/206 3/32 gen-ReachabilityCardinality-14 18807 m, 3761 m/sec, 22203 t fired, .

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gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-06: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: EF 0 1 4 0 1 0 0 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 EF FNDP 14/1542 0/5 gen-ReachabilityCardinality-14 25195 t fired, 365 attempts, .
55 EF STEQ 14/3093 0/5 gen-ReachabilityCardinality-14 sara is running.
57 EF SRCH 14/3093 3/5 gen-ReachabilityCardinality-14 17414 m, 2316 m/sec, 20425 t fired, .
58 EF EXCL 14/206 7/32 gen-ReachabilityCardinality-14 43288 m, 4896 m/sec, 51090 t fired, .

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gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-06: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: EF 0 1 4 0 1 0 0 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 EF FNDP 19/1537 0/5 gen-ReachabilityCardinality-14 38336 t fired, 552 attempts, .
55 EF STEQ 19/3088 0/5 gen-ReachabilityCardinality-14 sara is running.
57 EF SRCH 19/3088 5/5 gen-ReachabilityCardinality-14 26445 m, 1806 m/sec, 31028 t fired, .
58 EF EXCL 19/206 10/32 gen-ReachabilityCardinality-14 64392 m, 4220 m/sec, 76047 t fired, .

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lola: CANCELED task # 57 (type SRCH) for gen-ReachabilityCardinality-14 (memory limit exceeded)
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gen-ReachabilityCardinality-05: EF true findpath

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gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-06: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: EF 0 1 3 0 1 0 1 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 EF FNDP 24/1532 0/5 gen-ReachabilityCardinality-14 51425 t fired, 737 attempts, .
55 EF STEQ 24/3083 0/5 gen-ReachabilityCardinality-14 sara is running.
58 EF EXCL 24/206 14/32 gen-ReachabilityCardinality-14 88728 m, 4867 m/sec, 104871 t fired, .

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lola: LAUNCH task # 59 (type SRCH) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-05: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-06: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 4 0 1 0 1 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 EF FNDP 29/1525 0/5 gen-ReachabilityCardinality-14 61824 t fired, 884 attempts, .
55 EF STEQ 29/1525 0/5 gen-ReachabilityCardinality-14 sara is running.
58 EF EXCL 29/206 18/32 gen-ReachabilityCardinality-14 120457 m, 6345 m/sec, 142444 t fired, .
59 EF SRCH 5/1024 1/5 gen-ReachabilityCardinality-14 --

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lola: result : unknown
lola: markings : 1587
lola: fired transitions : 1873
lola: time used : 8.000000
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lola: time limit : 32000000 sec
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-06: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-08: EF 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 3 0 2 0 1 0
gen-ReachabilityCardinality-15: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 EF FNDP 34/1519 0/5 gen-ReachabilityCardinality-14 73285 t fired, 1046 attempts, .
55 EF STEQ 34/1519 0/5 gen-ReachabilityCardinality-14 sara is running.
58 EF EXCL 34/206 21/32 gen-ReachabilityCardinality-14 140355 m, 3979 m/sec, 166043 t fired, .
60 EF FNDP 2/1535 0/5 gen-ReachabilityCardinality-08 --

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gen-ReachabilityCardinality-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-10: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-15: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 EF FNDP 39/1517 0/5 gen-ReachabilityCardinality-14 87538 t fired, 1248 attempts, .
55 EF STEQ 39/1517 0/5 gen-ReachabilityCardinality-14 sara is running.
58 EF EXCL 39/206 24/32 gen-ReachabilityCardinality-14 162641 m, 4457 m/sec, 192488 t fired, .
60 EF FNDP 7/1533 0/5 gen-ReachabilityCardinality-08 --

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lola: FINISHED task # 60 (type FNDP) for gen-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 8997
lola: tried executions : 132
lola: time used : 11.000000
lola: memory pages used : 0
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gen-ReachabilityCardinality-02: EF 0 0 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 EF FNDP 44/3102 0/5 gen-ReachabilityCardinality-14 99173 t fired, 1413 attempts, .
55 EF STEQ 44/3102 0/5 gen-ReachabilityCardinality-14 sara is running.
58 EF EXCL 44/221 26/32 gen-ReachabilityCardinality-14 177419 m, 2955 m/sec, 210038 t fired, .

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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 66 (type FNDP) for 18 gen-ReachabilityCardinality-06
lola: time limit : 32000000 sec
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lola: result : unknown
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lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
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gen-ReachabilityCardinality-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 EF FNDP 49/3054 0/5 gen-ReachabilityCardinality-14 103222 t fired, 1470 attempts, .
58 EF EXCL 49/221 28/32 gen-ReachabilityCardinality-14 187761 m, 2068 m/sec, 222344 t fired, .
66 EF FNDP 5/1525 0/5 gen-ReachabilityCardinality-06 --
67 EF STEQ 1/1527 0/5 gen-ReachabilityCardinality-06 sara not yet started (preprocessing).

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/home/mcc/BenchKit/BenchKit_head.sh: line 62: 411 Killed lola --conf=$BIN_DIR/configfiles/reachabilitycardinalityconf --formula=$DIR/ReachabilityCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MultiCrashLeafsetExtension-PT-S24C11"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is MultiCrashLeafsetExtension-PT-S24C11, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r289-tall-162124152900702"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MultiCrashLeafsetExtension-PT-S24C11.tgz
mv MultiCrashLeafsetExtension-PT-S24C11 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;