fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r289-tall-162124152800638
Last Updated
Jun 28, 2021

About the Execution of LoLA for MultiCrashLeafsetExtension-PT-S24C03

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16245.407 140429.00 315536.00 819.60 ???F???????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r289-tall-162124152800638.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is MultiCrashLeafsetExtension-PT-S24C03, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r289-tall-162124152800638
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 18M
-rw-r--r-- 1 mcc users 49K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 171K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 38K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 125K May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.3K May 12 07:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K May 12 07:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.2K May 12 07:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 12 07:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 5.2K May 11 18:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 11 18:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 4.2K May 11 15:58 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 11 15:58 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K May 12 04:40 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K May 12 04:40 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 7 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 18M May 12 08:13 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME gen-ReachabilityCardinality-00
FORMULA_NAME gen-ReachabilityCardinality-01
FORMULA_NAME gen-ReachabilityCardinality-02
FORMULA_NAME gen-ReachabilityCardinality-03
FORMULA_NAME gen-ReachabilityCardinality-04
FORMULA_NAME gen-ReachabilityCardinality-05
FORMULA_NAME gen-ReachabilityCardinality-06
FORMULA_NAME gen-ReachabilityCardinality-07
FORMULA_NAME gen-ReachabilityCardinality-08
FORMULA_NAME gen-ReachabilityCardinality-09
FORMULA_NAME gen-ReachabilityCardinality-10
FORMULA_NAME gen-ReachabilityCardinality-11
FORMULA_NAME gen-ReachabilityCardinality-12
FORMULA_NAME gen-ReachabilityCardinality-13
FORMULA_NAME gen-ReachabilityCardinality-14
FORMULA_NAME gen-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1621306515552

starting LoLA
BK_INPUT MultiCrashLeafsetExtension-PT-S24C03
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA gen-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621306655981

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 2.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-05: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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gen-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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gen-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
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gen-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
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gen-ReachabilityCardinality-11: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-12: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0

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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 9 gen-ReachabilityCardinality-03
lola: time limit : 218 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 9 gen-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 9 gen-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 52 (type SRCH) for 9 gen-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-03: AG 0 1 4 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF FNDP 3/1160 0/5 gen-ReachabilityCardinality-03 --
50 EF STEQ 3/1160 0/5 gen-ReachabilityCardinality-03 sara is running.
52 EF SRCH 3/1742 1/5 gen-ReachabilityCardinality-03 --
53 EF EXCL 3/218 1/32 gen-ReachabilityCardinality-03 6820 m, 1364 m/sec, 8060 t fired, .

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lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 3.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for gen-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 50 (type EQUN) for gen-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 53 (type EXCL) for gen-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 60 (type EXCL) for 6 gen-ReachabilityCardinality-02
lola: time limit : 232 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 56 (type FNDP) for 6 gen-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type EQUN) for 6 gen-ReachabilityCardinality-02
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
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lola: time limit : 32000000 sec
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lola: FINISHED task # 49 (type FNDP) for gen-ReachabilityCardinality-03
lola: result : unknown
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lola: tried executions : 2
lola: time used : 3.000000
lola: memory pages used : 0
lola: FINISHED task # 50 (type EQUN) for gen-ReachabilityCardinality-03
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
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gen-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 1 4 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-11: AG 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-14: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 5/1158 0/5 gen-ReachabilityCardinality-02 5539 t fired, 235 attempts, .
57 EF STEQ 5/1158 0/5 gen-ReachabilityCardinality-02 sara is running.
59 EF SRCH 5/1739 1/5 gen-ReachabilityCardinality-02 4140 m, 828 m/sec, 4801 t fired, .
60 EF EXCL 5/232 2/32 gen-ReachabilityCardinality-02 13400 m, 2680 m/sec, 15848 t fired, .

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gen-ReachabilityCardinality-02: AG 0 1 4 0 1 0 0 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-11: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-14: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 10/1157 0/5 gen-ReachabilityCardinality-02 37510 t fired, 1626 attempts, .
57 EF STEQ 10/1157 0/5 gen-ReachabilityCardinality-02 sara is running.
59 EF SRCH 10/1738 2/5 gen-ReachabilityCardinality-02 19864 m, 3144 m/sec, 23153 t fired, .
60 EF EXCL 10/232 3/32 gen-ReachabilityCardinality-02 26800 m, 2680 m/sec, 31725 t fired, .

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gen-ReachabilityCardinality-02: AG 0 1 4 0 1 0 0 0
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gen-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-14: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 15/1152 0/5 gen-ReachabilityCardinality-02 65317 t fired, 2839 attempts, .
57 EF STEQ 15/1152 0/5 gen-ReachabilityCardinality-02 sara is running.
59 EF SRCH 15/1733 4/5 gen-ReachabilityCardinality-02 37987 m, 3624 m/sec, 44414 t fired, .
60 EF EXCL 15/232 4/32 gen-ReachabilityCardinality-02 41240 m, 2888 m/sec, 48874 t fired, .

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56 EF FNDP 20/1147 0/5 gen-ReachabilityCardinality-02 85472 t fired, 3720 attempts, .
57 EF STEQ 20/1147 0/5 gen-ReachabilityCardinality-02 sara is running.
59 EF SRCH 20/1728 5/5 gen-ReachabilityCardinality-02 57980 m, 3998 m/sec, 67744 t fired, .
60 EF EXCL 20/232 5/32 gen-ReachabilityCardinality-02 54611 m, 2674 m/sec, 64785 t fired, .

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lola: result : unknown
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lola: time limit : 32000000 sec
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gen-ReachabilityCardinality-02: AG 0 1 2 0 2 0 1 0
gen-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
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gen-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-11: AG 0 0 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 25/1719 0/5 gen-ReachabilityCardinality-02 93767 t fired, 4084 attempts, .
60 EF EXCL 25/232 5/32 gen-ReachabilityCardinality-02 59811 m, 1040 m/sec, 70981 t fired, .
62 EF FNDP 1/1731 0/5 gen-ReachabilityCardinality-01 --
63 EF STEQ 1/1731 0/5 gen-ReachabilityCardinality-01 sara not yet started (preprocessing).

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lola: time limit : 32000000 sec
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/home/mcc/BenchKit/BenchKit_head.sh: line 62: 412 Killed lola --conf=$BIN_DIR/configfiles/reachabilitycardinalityconf --formula=$DIR/ReachabilityCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MultiCrashLeafsetExtension-PT-S24C03"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is MultiCrashLeafsetExtension-PT-S24C03, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r289-tall-162124152800638"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MultiCrashLeafsetExtension-PT-S24C03.tgz
mv MultiCrashLeafsetExtension-PT-S24C03 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;