Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r289-tall-162124152800622.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is MultiCrashLeafsetExtension-PT-S16C08, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r289-tall-162124152800622
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 13M
-rw-r--r-- 1 mcc users 53K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 197K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 39K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 134K May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 5.7K May 12 07:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 12 07:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.4K May 12 07:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 12 07:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 6.3K May 11 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K May 11 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 11 15:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 11 15:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 12 04:40 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K May 12 04:40 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 7 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 13M May 12 08:13 model.pnml

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content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME gen-ReachabilityCardinality-00
FORMULA_NAME gen-ReachabilityCardinality-01
FORMULA_NAME gen-ReachabilityCardinality-02
FORMULA_NAME gen-ReachabilityCardinality-03
FORMULA_NAME gen-ReachabilityCardinality-04
FORMULA_NAME gen-ReachabilityCardinality-05
FORMULA_NAME gen-ReachabilityCardinality-06
FORMULA_NAME gen-ReachabilityCardinality-07
FORMULA_NAME gen-ReachabilityCardinality-08
FORMULA_NAME gen-ReachabilityCardinality-09
FORMULA_NAME gen-ReachabilityCardinality-10
FORMULA_NAME gen-ReachabilityCardinality-11
FORMULA_NAME gen-ReachabilityCardinality-12
FORMULA_NAME gen-ReachabilityCardinality-13
FORMULA_NAME gen-ReachabilityCardinality-14
FORMULA_NAME gen-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1621304350169

starting LoLA
BK_INPUT MultiCrashLeafsetExtension-PT-S16C08
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA gen-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621304586388

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-04: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-05: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-07: AG 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-09: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
gen-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 26 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
gen-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 18 gen-ReachabilityCardinality-06
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 52 (type SRCH) for 18 gen-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-00: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-06: AG 0 1 4 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-13: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF FNDP 4/157 0/5 gen-ReachabilityCardinality-06 15745 t fired, 243 attempts, .
50 EF STEQ 4/164 0/5 gen-ReachabilityCardinality-06 sara is running.
52 EF SRCH 4/164 1/5 gen-ReachabilityCardinality-06 15057 m, 3011 m/sec, 17271 t fired, .
53 EF EXCL 5/221 2/32 gen-ReachabilityCardinality-06 32505 m, 6501 m/sec, 38041 t fired, .

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gen-ReachabilityCardinality-00: EF 0 5 0 0 1 0 0 0
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gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-03: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-06: AG 0 1 4 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-13: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF FNDP 9/157 0/5 gen-ReachabilityCardinality-06 72189 t fired, 1136 attempts, .
50 EF STEQ 9/164 0/5 gen-ReachabilityCardinality-06 sara is running.
52 EF SRCH 9/164 4/5 gen-ReachabilityCardinality-06 74944 m, 11977 m/sec, 86906 t fired, .
53 EF EXCL 10/221 10/32 gen-ReachabilityCardinality-06 181048 m, 29708 m/sec, 212574 t fired, .

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gen-ReachabilityCardinality-03: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
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gen-ReachabilityCardinality-06: AG 0 1 3 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-13: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-15: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF FNDP 14/152 0/5 gen-ReachabilityCardinality-06 128721 t fired, 2037 attempts, .
50 EF STEQ 14/159 0/5 gen-ReachabilityCardinality-06 sara is running.
53 EF EXCL 15/221 17/32 gen-ReachabilityCardinality-06 330071 m, 29804 m/sec, 387853 t fired, .

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lola: FINISHED task # 134 (type FNDP) for gen-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 5541
lola: tried executions : 81
lola: time used : 1.000000
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lola: LAUNCH task # 55 (type FNDP) for 33 gen-ReachabilityCardinality-11
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lola: FINISHED task # 55 (type FNDP) for gen-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 65
lola: tried executions : 1
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lola: LAUNCH task # 128 (type FNDP) for 24 gen-ReachabilityCardinality-08
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lola: FINISHED task # 50 (type EQUN) for gen-ReachabilityCardinality-06
lola: result : false
lola: CANCELED task # 49 (type FNDP) for gen-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 53 (type EXCL) for gen-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 151 (type EXCL) for 0 gen-ReachabilityCardinality-00
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lola: FINISHED task # 49 (type FNDP) for gen-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 164213
lola: tried executions : 2606
lola: time used : 17.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 151 (type EXCL) for gen-ReachabilityCardinality-00
lola: result : true
lola: markings : 398
lola: fired transitions : 444
lola: time used : 1.000000
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lola: LAUNCH task # 145 (type EXCL) for 15 gen-ReachabilityCardinality-05
lola: time limit : 293 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-122.sara.
lola: FINISHED task # 121 (type FNDP) for gen-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 2685
lola: tried executions : 64
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 122 (type EQUN) for gen-ReachabilityCardinality-03 (obsolete)
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lola: FINISHED task # 122 (type EQUN) for gen-ReachabilityCardinality-03
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-76.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-04: EF 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-13: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
74 EF FNDP 1/235 0/5 gen-ReachabilityCardinality-04 13855 t fired, 213 attempts, .
76 EF STEQ 1/235 0/5 gen-ReachabilityCardinality-04 sara is running.
128 EF FNDP 4/249 0/5 gen-ReachabilityCardinality-08 48469 t fired, 793 attempts, .
145 EF EXCL 1/320 3/32 gen-ReachabilityCardinality-05 41973 m, 8394 m/sec, 49207 t fired, .

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gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-04: EF 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-13: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
74 EF FNDP 6/234 0/5 gen-ReachabilityCardinality-04 73496 t fired, 1128 attempts, .
76 EF STEQ 6/234 0/5 gen-ReachabilityCardinality-04 sara is running.
128 EF FNDP 9/248 0/5 gen-ReachabilityCardinality-08 107260 t fired, 1734 attempts, .
145 EF EXCL 6/320 10/32 gen-ReachabilityCardinality-05 193743 m, 30354 m/sec, 227637 t fired, .

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sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-04: EF 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-13: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
74 EF FNDP 11/229 0/5 gen-ReachabilityCardinality-04 133254 t fired, 2050 attempts, .
76 EF STEQ 11/229 0/5 gen-ReachabilityCardinality-04 sara is running.
128 EF FNDP 14/243 0/5 gen-ReachabilityCardinality-08 166152 t fired, 2669 attempts, .
145 EF EXCL 11/320 18/32 gen-ReachabilityCardinality-05 345007 m, 30252 m/sec, 405613 t fired, .

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lola: FINISHED task # 76 (type EQUN) for gen-ReachabilityCardinality-04
lola: result : true
lola: CANCELED task # 74 (type FNDP) for gen-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 86 (type FNDP) for 39 gen-ReachabilityCardinality-13
lola: time limit : 32000000 sec
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lola: LAUNCH task # 89 (type EQUN) for 39 gen-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 74 (type FNDP) for gen-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 180805
lola: tried executions : 2783
lola: time used : 15.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-89.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-13: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
86 EF FNDP 1/250 0/5 gen-ReachabilityCardinality-13 10451 t fired, 466 attempts, .
89 EF STEQ 1/270 0/5 gen-ReachabilityCardinality-13 sara is running.
128 EF FNDP 19/253 0/5 gen-ReachabilityCardinality-08 223981 t fired, 3584 attempts, .
145 EF EXCL 16/352 26/32 gen-ReachabilityCardinality-05 492375 m, 29473 m/sec, 579099 t fired, .

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lola: CANCELED task # 145 (type EXCL) for gen-ReachabilityCardinality-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-13: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
86 EF FNDP 6/249 0/5 gen-ReachabilityCardinality-13 67434 t fired, 2641 attempts, .
89 EF STEQ 6/269 0/5 gen-ReachabilityCardinality-13 sara is running.
128 EF FNDP 24/252 0/5 gen-ReachabilityCardinality-08 283127 t fired, 4520 attempts, .

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lola: LAUNCH task # 73 (type EXCL) for 21 gen-ReachabilityCardinality-07
lola: time limit : 389 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-13: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 5/389 8/32 gen-ReachabilityCardinality-07 150900 m, 30180 m/sec, 177187 t fired, .
86 EF FNDP 11/244 0/5 gen-ReachabilityCardinality-13 124886 t fired, 4645 attempts, .
89 EF STEQ 11/264 0/5 gen-ReachabilityCardinality-13 sara is running.
128 EF FNDP 29/247 0/5 gen-ReachabilityCardinality-08 342229 t fired, 5451 attempts, .

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lola: FINISHED task # 89 (type EQUN) for gen-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 86 (type FNDP) for gen-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 115 (type FNDP) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type EQUN) for 42 gen-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 86 (type FNDP) for gen-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 157831
lola: tried executions : 5750
lola: time used : 14.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-116.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 10/438 16/32 gen-ReachabilityCardinality-07 296596 m, 29139 m/sec, 348632 t fired, .
115 EF FNDP 2/291 0/5 gen-ReachabilityCardinality-14 22150 t fired, 497 attempts, .
116 EF STEQ 2/291 0/5 gen-ReachabilityCardinality-14 sara is running.
128 EF FNDP 34/262 0/5 gen-ReachabilityCardinality-08 399047 t fired, 6336 attempts, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 15/438 23/32 gen-ReachabilityCardinality-07 446934 m, 30067 m/sec, 525672 t fired, .
115 EF FNDP 7/289 0/5 gen-ReachabilityCardinality-14 80331 t fired, 1715 attempts, .
116 EF STEQ 7/289 0/5 gen-ReachabilityCardinality-14 sara is running.
128 EF FNDP 39/260 0/5 gen-ReachabilityCardinality-08 457876 t fired, 7251 attempts, .

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sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 20/438 31/32 gen-ReachabilityCardinality-07 596436 m, 29900 m/sec, 701753 t fired, .
115 EF FNDP 12/284 0/5 gen-ReachabilityCardinality-14 138616 t fired, 2898 attempts, .
116 EF STEQ 12/284 0/5 gen-ReachabilityCardinality-14 sara is running.
128 EF FNDP 44/255 0/5 gen-ReachabilityCardinality-08 516665 t fired, 8165 attempts, .

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lola: CANCELED task # 73 (type EXCL) for gen-ReachabilityCardinality-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
115 EF FNDP 17/279 0/5 gen-ReachabilityCardinality-14 196956 t fired, 4071 attempts, .
116 EF STEQ 17/279 0/5 gen-ReachabilityCardinality-14 sara is running.
128 EF FNDP 49/250 0/5 gen-ReachabilityCardinality-08 575555 t fired, 9078 attempts, .

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lola: LAUNCH task # 99 (type EXCL) for 27 gen-ReachabilityCardinality-09
lola: time limit : 497 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-14: AG 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
99 EF EXCL 5/497 8/32 gen-ReachabilityCardinality-09 149828 m, 29965 m/sec, 175914 t fired, .
115 EF FNDP 22/274 0/5 gen-ReachabilityCardinality-14 255241 t fired, 5226 attempts, .
116 EF STEQ 22/274 0/5 gen-ReachabilityCardinality-14 sara is running.
128 EF FNDP 54/245 0/5 gen-ReachabilityCardinality-08 634282 t fired, 9987 attempts, .

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lola: FINISHED task # 116 (type EQUN) for gen-ReachabilityCardinality-14
lola: result : false
lola: CANCELED task # 115 (type FNDP) for gen-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 78 (type FNDP) for 30 gen-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type EQUN) for 30 gen-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: memory limit: 5 pages
lola: FINISHED task # 115 (type FNDP) for gen-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 304303
lola: tried executions : 6195
lola: time used : 26.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-82.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
78 EF FNDP 1/315 0/5 gen-ReachabilityCardinality-10 6513 t fired, 104 attempts, .
82 EF STEQ 1/315 0/5 gen-ReachabilityCardinality-10 sara is running.
99 EF EXCL 10/579 15/32 gen-ReachabilityCardinality-09 293284 m, 28691 m/sec, 344758 t fired, .
128 EF FNDP 59/294 0/5 gen-ReachabilityCardinality-08 690840 t fired, 10861 attempts, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
78 EF FNDP 6/314 0/5 gen-ReachabilityCardinality-10 65708 t fired, 1044 attempts, .
82 EF STEQ 6/314 0/5 gen-ReachabilityCardinality-10 sara is running.
99 EF EXCL 15/579 23/32 gen-ReachabilityCardinality-09 441806 m, 29704 m/sec, 519683 t fired, .
128 EF FNDP 64/293 0/5 gen-ReachabilityCardinality-08 749597 t fired, 11768 attempts, .

Time elapsed: 136 secs. Pages in use: 32
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sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-10: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
78 EF FNDP 11/309 0/5 gen-ReachabilityCardinality-10 124629 t fired, 1989 attempts, .
82 EF STEQ 11/309 0/5 gen-ReachabilityCardinality-10 sara is running.
99 EF EXCL 20/579 30/32 gen-ReachabilityCardinality-09 591417 m, 29922 m/sec, 695876 t fired, .
128 EF FNDP 69/288 0/5 gen-ReachabilityCardinality-08 808503 t fired, 12679 attempts, .

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lola: CANCELED task # 99 (type EXCL) for gen-ReachabilityCardinality-09 (memory limit exceeded)

lola: FINISHED task # 82 (type EQUN) for gen-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 78 (type FNDP) for gen-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 112 (type EXCL) for 36 gen-ReachabilityCardinality-12
lola: time limit : 863 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 102 (type FNDP) for 6 gen-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type EQUN) for 6 gen-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 78 (type FNDP) for gen-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 181689
lola: tried executions : 2903
lola: time used : 16.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:787
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
gen-ReachabilityCardinality-02: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 EF FNDP 0/345 0/5 gen-ReachabilityCardinality-02 --
103 EF STEQ 0/383 0/5 gen-ReachabilityCardinality-02 sara not yet started (preprocessing).
112 EF EXCL 0/863 1/32 gen-ReachabilityCardinality-12 --
128 EF FNDP 74/318 0/5 gen-ReachabilityCardinality-08 865767 t fired, 13564 attempts, .

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lola: FINISHED task # 102 (type FNDP) for gen-ReachabilityCardinality-02
lola: result : true
lola: fired transitions : 445
lola: tried executions : 7
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 103 (type EQUN) for gen-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 62 (type FNDP) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 3 gen-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-63.sara.
lola: FINISHED task # 62 (type FNDP) for gen-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 31366
lola: tried executions : 471
lola: time used : 4.000000
lola: memory pages used : 0
lola: CANCELED task # 63 (type EQUN) for gen-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 91 (type FNDP) for 27 gen-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type EQUN) for 27 gen-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 63 (type EQUN) for gen-ReachabilityCardinality-01
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-94.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 1/492 0/5 gen-ReachabilityCardinality-09 6705 t fired, 182 attempts, .
94 EF STEQ 1/492 0/5 gen-ReachabilityCardinality-09 sara is running.
112 EF EXCL 5/1727 7/32 gen-ReachabilityCardinality-12 116657 m, 23331 m/sec, 136881 t fired, .
128 EF FNDP 79/510 0/5 gen-ReachabilityCardinality-08 908361 t fired, 14222 attempts, .

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sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 6/491 0/5 gen-ReachabilityCardinality-09 56233 t fired, 1386 attempts, .
94 EF STEQ 6/491 0/5 gen-ReachabilityCardinality-09 sara is running.
112 EF EXCL 10/1727 12/32 gen-ReachabilityCardinality-12 226802 m, 22029 m/sec, 266652 t fired, .
128 EF FNDP 84/509 0/5 gen-ReachabilityCardinality-08 956836 t fired, 14970 attempts, .

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sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 11/486 0/5 gen-ReachabilityCardinality-09 106069 t fired, 2520 attempts, .
94 EF STEQ 11/486 0/5 gen-ReachabilityCardinality-09 sara is running.
112 EF EXCL 15/1727 18/32 gen-ReachabilityCardinality-12 342485 m, 23136 m/sec, 402622 t fired, .
128 EF FNDP 89/504 0/5 gen-ReachabilityCardinality-08 1004190 t fired, 15700 attempts, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 16/481 0/5 gen-ReachabilityCardinality-09 151097 t fired, 3525 attempts, .
94 EF STEQ 16/481 0/5 gen-ReachabilityCardinality-09 sara is running.
112 EF EXCL 20/1727 24/32 gen-ReachabilityCardinality-12 460824 m, 23667 m/sec, 541977 t fired, .
128 EF FNDP 94/499 0/5 gen-ReachabilityCardinality-08 1051959 t fired, 16436 attempts, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 21/476 0/5 gen-ReachabilityCardinality-09 195774 t fired, 4507 attempts, .
94 EF STEQ 21/476 0/5 gen-ReachabilityCardinality-09 sara is running.
112 EF EXCL 25/1727 30/32 gen-ReachabilityCardinality-12 581593 m, 24153 m/sec, 684317 t fired, .
128 EF FNDP 99/494 0/5 gen-ReachabilityCardinality-08 1100889 t fired, 17188 attempts, .

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lola: CANCELED task # 112 (type EXCL) for gen-ReachabilityCardinality-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 26/471 0/5 gen-ReachabilityCardinality-09 247026 t fired, 5622 attempts, .
94 EF STEQ 26/471 0/5 gen-ReachabilityCardinality-09 sara is running.
128 EF FNDP 104/489 0/5 gen-ReachabilityCardinality-08 1156007 t fired, 18032 attempts, .

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lola: LAUNCH task # 132 (type EXCL) for 24 gen-ReachabilityCardinality-08
lola: time limit : 3424 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 31/466 0/5 gen-ReachabilityCardinality-09 295367 t fired, 6666 attempts, .
94 EF STEQ 31/466 0/5 gen-ReachabilityCardinality-09 sara is running.
128 EF FNDP 109/484 0/5 gen-ReachabilityCardinality-08 1205058 t fired, 18788 attempts, .
132 EF EXCL 5/3424 7/32 gen-ReachabilityCardinality-08 119537 m, 23907 m/sec, 140261 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 36/461 0/5 gen-ReachabilityCardinality-09 346793 t fired, 7742 attempts, .
94 EF STEQ 36/461 0/5 gen-ReachabilityCardinality-09 sara is running.
128 EF FNDP 114/479 0/5 gen-ReachabilityCardinality-08 1248528 t fired, 19456 attempts, .
132 EF EXCL 10/3424 13/32 gen-ReachabilityCardinality-08 237896 m, 23671 m/sec, 279753 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 41/456 0/5 gen-ReachabilityCardinality-09 395088 t fired, 8759 attempts, .
94 EF STEQ 41/456 0/5 gen-ReachabilityCardinality-09 sara is running.
128 EF FNDP 119/474 0/5 gen-ReachabilityCardinality-08 1295066 t fired, 20170 attempts, .
132 EF EXCL 15/3424 19/32 gen-ReachabilityCardinality-08 360434 m, 24507 m/sec, 423706 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 46/451 0/5 gen-ReachabilityCardinality-09 444852 t fired, 9782 attempts, .
94 EF STEQ 46/451 0/5 gen-ReachabilityCardinality-09 sara is running.
128 EF FNDP 124/469 0/5 gen-ReachabilityCardinality-08 1338801 t fired, 20841 attempts, .
132 EF EXCL 20/3424 25/32 gen-ReachabilityCardinality-08 475894 m, 23092 m/sec, 559681 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 3 2 0 1 0 0 0
gen-ReachabilityCardinality-09: EF 0 2 2 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 51/446 0/5 gen-ReachabilityCardinality-09 492169 t fired, 10758 attempts, .
94 EF STEQ 51/446 0/5 gen-ReachabilityCardinality-09 sara is running.
128 EF FNDP 129/464 0/5 gen-ReachabilityCardinality-08 1387477 t fired, 21585 attempts, .
132 EF EXCL 25/3424 31/32 gen-ReachabilityCardinality-08 595482 m, 23917 m/sec, 700594 t fired, .

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lola: CANCELED task # 132 (type EXCL) for gen-ReachabilityCardinality-08 (memory limit exceeded)

lola: FINISHED task # 94 (type EQUN) for gen-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 91 (type FNDP) for gen-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 108 (type FNDP) for 36 gen-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type EQUN) for 36 gen-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 111 (type SRCH) for 36 gen-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type FNDP) for gen-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 537411
lola: tried executions : 11688
lola: time used : 55.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-109.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 1 3 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
108 EF FNDP 1/848 0/5 gen-ReachabilityCardinality-12 4444 t fired, 77 attempts, .
109 EF STEQ 1/848 0/5 gen-ReachabilityCardinality-12 sara is running.
111 EF SRCH 1/848 1/5 gen-ReachabilityCardinality-12 4278 m, 855 m/sec, 4630 t fired, .
128 EF FNDP 134/749 0/5 gen-ReachabilityCardinality-08 1438447 t fired, 22365 attempts, .

Time elapsed: 206 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-07: AG 0 4 0 0 1 0 1 0
gen-ReachabilityCardinality-08: AG 0 3 1 0 1 0 1 0
gen-ReachabilityCardinality-12: EF 0 1 3 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
108 EF FNDP 6/847 0/5 gen-ReachabilityCardinality-12 54715 t fired, 914 attempts, .
109 EF STEQ 6/847 0/5 gen-ReachabilityCardinality-12 sara is running.
111 EF SRCH 6/847 3/5 gen-ReachabilityCardinality-12 53257 m, 9795 m/sec, 60765 t fired, .
128 EF FNDP 139/748 0/5 gen-ReachabilityCardinality-08 1485253 t fired, 23083 attempts, .

Time elapsed: 211 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 108 (type FNDP) for gen-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 69761
lola: tried executions : 1161
lola: time used : 8.000000
lola: memory pages used : 0
lola: CANCELED task # 109 (type EQUN) for gen-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 111 (type SRCH) for gen-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 69 (type FNDP) for 21 gen-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN) for 21 gen-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SRCH) for 21 gen-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 109 (type EQUN) for gen-ReachabilityCardinality-12
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 69 (type FNDP) for gen-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 30
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 70 (type EQUN) for gen-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 72 (type SRCH) for gen-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 141 (type FNDP) for 15 gen-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 142 (type EQUN) for 15 gen-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SRCH) for 15 gen-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-142.sara.
lola: FINISHED task # 141 (type FNDP) for gen-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 1726
lola: tried executions : 27
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 142 (type EQUN) for gen-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 144 (type SRCH) for gen-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 129 (type EQUN) for 24 gen-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SRCH) for 24 gen-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type SRCH) for 24 gen-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 142 (type EQUN) for gen-ReachabilityCardinality-05
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 133 (type SRCH) for gen-ReachabilityCardinality-08
lola: result : unknown
lola: markings : 1444
lola: fired transitions : 1697
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-129.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-07: AG false findpath
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-12: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-08: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
128 EF FNDP 144/3528 0/5 gen-ReachabilityCardinality-08 1522992 t fired, 23660 attempts, .
129 EF STEQ 2/3386 0/5 gen-ReachabilityCardinality-08 sara is running.
131 EF SRCH 2/3386 2/5 gen-ReachabilityCardinality-08 20772 m, 4154 m/sec, 24011 t fired, .

Time elapsed: 216 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-07: AG false findpath
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-12: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-08: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
128 EF FNDP 149/3528 0/5 gen-ReachabilityCardinality-08 1571161 t fired, 24397 attempts, .
129 EF STEQ 7/3386 0/5 gen-ReachabilityCardinality-08 sara is running.
131 EF SRCH 7/3386 4/5 gen-ReachabilityCardinality-08 61744 m, 8194 m/sec, 71470 t fired, .

Time elapsed: 221 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
sara: place or transition ordering is non-deterministic

sara: place or transition ordering is non-deterministic
lola: FINISHED task # 70 (type EQUN) for gen-ReachabilityCardinality-07
lola: result : true
lola: CANCELED task # 131 (type SRCH) for gen-ReachabilityCardinality-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-07: AG false findpath
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-12: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-08: AG 0 0 2 0 2 0 2 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
128 EF FNDP 154/3528 0/5 gen-ReachabilityCardinality-08 1620910 t fired, 25160 attempts, .
129 EF STEQ 12/3386 0/5 gen-ReachabilityCardinality-08 sara is running.

Time elapsed: 226 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-07: AG false findpath
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-12: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityCardinality-08: AG 0 0 2 0 2 0 2 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
128 EF FNDP 159/3528 0/5 gen-ReachabilityCardinality-08 1680295 t fired, 26069 attempts, .
129 EF STEQ 17/3386 0/5 gen-ReachabilityCardinality-08 sara is running.

Time elapsed: 231 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16

lola: FINISHED task # 129 (type EQUN) for gen-ReachabilityCardinality-08
lola: result : false
lola: CANCELED task # 128 (type FNDP) for gen-ReachabilityCardinality-08 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityCardinality-00: EF true tandem / relaxed
gen-ReachabilityCardinality-01: AG false findpath
gen-ReachabilityCardinality-02: AG false findpath
gen-ReachabilityCardinality-03: EF true findpath
gen-ReachabilityCardinality-04: EF true state equation
gen-ReachabilityCardinality-05: AG false findpath
gen-ReachabilityCardinality-06: AG true state equation
gen-ReachabilityCardinality-07: AG false findpath
gen-ReachabilityCardinality-08: AG true state equation
gen-ReachabilityCardinality-09: EF false state equation
gen-ReachabilityCardinality-10: AG true state equation
gen-ReachabilityCardinality-11: EF true findpath
gen-ReachabilityCardinality-12: EF true findpath
gen-ReachabilityCardinality-13: AG true state equation
gen-ReachabilityCardinality-14: AG true state equation
gen-ReachabilityCardinality-15: EF true findpath


Time elapsed: 236 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MultiCrashLeafsetExtension-PT-S16C08"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is MultiCrashLeafsetExtension-PT-S16C08, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r289-tall-162124152800622"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MultiCrashLeafsetExtension-PT-S16C08.tgz
mv MultiCrashLeafsetExtension-PT-S16C08 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;