MCC'2021- Execution of r289-tall-162124152600522

About the Execution of LoLA for LeafsetExtension-PT-S32C2

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
7274.052	739939.00	758317.00	1569.90	FTT?F?F?????FTF?	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r289-tall-
Waiting for the VM to be ready (probing ssh)
............................................
======================
Generated by BenchKit 2-4028
Executing tool lola
Input is LeafsetExtension-PT-S32C2,
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r289-tall-162124152600
============================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 8.9M
-rw-r--r-- 1 mcc users 50K May 15
-rw-r--r-- 1 mcc users 190K May 15
-rw-r--r-- 1 mcc users 44K May 15
-rw-r--r-- 1 mcc users 141K May 15
-rw-r--r-- 1 mcc users 5.8K May 12
-rw-r--r-- 1 mcc users 25K May 12
-rw-r--r-- 1 mcc users 3.9K May 12
-rw-r--r-- 1 mcc users 20K May 12
-rw-r--r-- 1 mcc users 1 May 12
-rw-r--r-- 1 mcc users 4.8K May 11
-rw-r--r-- 1 mcc users 18K May 11
-rw-r--r-- 1 mcc users 5.2K May 11
-rw-r--r-- 1 mcc users 20K May 11
-rw-r--r-- 1 mcc users 1.9K May 12
-rw-r--r-- 1 mcc users 3.9K May 12
-rw-r--r-- 1 mcc users 6 May 12
-rw-r--r-- 1 mcc users 6 May 12
-rw-r--r-- 1 mcc users 6 May 12
-rw-r--r-- 1 mcc users 8.4M May 12

--------------------
content from stdout:

=== Data for post analysis generated

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFi

=== Now, execution of the tool begins

BK_START 1621288048187

starting LoLA
BK_INPUT LeafsetExtension-PT-S32C2
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability

FORMULA LeafsetExtension-PT-S32C2-CTLFireability-01

FORMULA LeafsetExtension-PT-S32C2-CTLFireability-12

FORMULA LeafsetExtension-PT-S32C2-CTLFireability-14

FORMULA LeafsetExtension-PT-S32C2-CTLFireability-06

FORMULA LeafsetExtension-PT-S32C2-CTLFireability-04

FORMULA LeafsetExtension-PT-S32C2-CTLFireability-02

FORMULA LeafsetExtension-PT-S32C2-CTLFireability-00

FORMULA LeafsetExtension-PT-S32C2-CTLFireability-13

BK_STOP 1621288788126

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution
lola: reading pnml
lola: PNML file contains place/transition
lola: finished parsing
lola: closed net file /home/mcc/execution/
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execu
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 154 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: LAUNCH task # 4 (type EXCL)
lola: time limit : 137 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: LAUNCH task # 68 (type FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: FINISHED task # 71 (type SRCH)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: CANCELED task # 68 (type FNDP)
lola: CANCELED task # 69 (type EQUN)
lola: FINISHED task # 68 (type FNDP)
lola: result : true
lola: tried executions :
lola: time used :
lola: memory pages used :
sara: try reading problem file /home/mcc/exe

lola: FINISHED task # 69 (type EQUN)
lola: result : true
lola: FINISHED task # 4 (type EXCL)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewr
lola: LAUNCH task # 29 (type EXCL)
lola: time limit : 172 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
29 EFEG EXCL 0/172

Time elapsed: 159 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: FINISHED task # 29 (type EXCL)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: LAUNCH task # 78 (type EXCL)
lola: time limit : 214 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: FINISHED task # 78 (type EXCL)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 66 (type EXCL)
lola: time limit : 229 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 1/229

Time elapsed: 164 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 6/229

Time elapsed: 169 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 11/229

Time elapsed: 174 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 16/229

Time elapsed: 179 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 21/229

Time elapsed: 184 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 26/229

Time elapsed: 189 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 31/229

Time elapsed: 194 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 36/229

Time elapsed: 199 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 41/229

Time elapsed: 204 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 46/229

Time elapsed: 209 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 51/229

Time elapsed: 214 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 56/229

Time elapsed: 219 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 61/229

Time elapsed: 224 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 66/229

Time elapsed: 229 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 71/229

Time elapsed: 234 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 76/229

Time elapsed: 239 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 66 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 244 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 63 (type EXCL)
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 63 (type EXCL)
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 50 (type EXCL)
lola: time limit : 258 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
50 CTL EXCL 5/258

Time elapsed: 249 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
50 CTL EXCL 10/258

Time elapsed: 254 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
50 CTL EXCL 15/258

Time elapsed: 259 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
50 CTL EXCL 20/258

Time elapsed: 264 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
50 CTL EXCL 25/258

Time elapsed: 269 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
50 CTL EXCL 30/258

Time elapsed: 274 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
50 CTL EXCL 35/258

Time elapsed: 279 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
50 CTL EXCL 40/258

Time elapsed: 284 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
50 CTL EXCL 45/258

Time elapsed: 289 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
50 CTL EXCL 50/258

Time elapsed: 294 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 50 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 299 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 47 (type EXCL)
lola: time limit : 275 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 5/275

Time elapsed: 304 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 10/275

Time elapsed: 309 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 15/275

Time elapsed: 314 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 20/275

Time elapsed: 319 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 25/275

Time elapsed: 324 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 30/275

Time elapsed: 329 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 35/275

Time elapsed: 334 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 40/275

Time elapsed: 339 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 45/275

Time elapsed: 344 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 50/275

Time elapsed: 349 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 55/275

Time elapsed: 354 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 60/275

Time elapsed: 359 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 47 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 364 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 44 (type EXCL)
lola: time limit : 294 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
44 CTL EXCL 5/294

Time elapsed: 369 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
44 CTL EXCL 10/294

Time elapsed: 374 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
44 CTL EXCL 15/294

Time elapsed: 379 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
44 CTL EXCL 20/294

Time elapsed: 384 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
44 CTL EXCL 25/294

Time elapsed: 389 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
44 CTL EXCL 30/294

Time elapsed: 394 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
44 CTL EXCL 35/294

Time elapsed: 399 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
44 CTL EXCL 40/294

Time elapsed: 404 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
44 CTL EXCL 45/294

Time elapsed: 409 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
44 CTL EXCL 50/294

Time elapsed: 414 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
44 CTL EXCL 55/294

Time elapsed: 419 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 44 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 424 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 41 (type EXCL)
lola: time limit : 317 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
41 CTL EXCL 5/317

Time elapsed: 429 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
41 CTL EXCL 10/317

Time elapsed: 434 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
41 CTL EXCL 15/317

Time elapsed: 439 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
41 CTL EXCL 20/317

Time elapsed: 444 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
41 CTL EXCL 25/317

Time elapsed: 449 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
41 CTL EXCL 30/317

Time elapsed: 454 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
41 CTL EXCL 35/317

Time elapsed: 459 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
41 CTL EXCL 40/317

Time elapsed: 464 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
41 CTL EXCL 45/317

Time elapsed: 469 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
41 CTL EXCL 50/317

Time elapsed: 474 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 41 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 479 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 38 (type EXCL)
lola: time limit : 346 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
38 CTL EXCL 5/346

Time elapsed: 484 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
38 CTL EXCL 10/346

Time elapsed: 489 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
38 CTL EXCL 15/346

Time elapsed: 494 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
38 CTL EXCL 20/346

Time elapsed: 499 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
38 CTL EXCL 25/346

Time elapsed: 504 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
38 CTL EXCL 30/346

Time elapsed: 509 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
38 CTL EXCL 35/346

Time elapsed: 514 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
38 CTL EXCL 40/346

Time elapsed: 519 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
38 CTL EXCL 45/346

Time elapsed: 524 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 38 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 529 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 35 (type EXCL)
lola: time limit : 383 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL)
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 32 (type EXCL)
lola: time limit : 438 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 5/438

Time elapsed: 534 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 10/438

Time elapsed: 539 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 15/438

Time elapsed: 544 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 20/438

Time elapsed: 549 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 25/438

Time elapsed: 554 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 30/438

Time elapsed: 559 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 35/438

Time elapsed: 564 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 40/438

Time elapsed: 569 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 45/438

Time elapsed: 574 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 50/438

Time elapsed: 579 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 55/438

Time elapsed: 584 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 60/438

Time elapsed: 589 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 65/438

Time elapsed: 594 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 70/438

Time elapsed: 599 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 75/438

Time elapsed: 604 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 80/438

Time elapsed: 609 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 85/438

Time elapsed: 614 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 90/438

Time elapsed: 619 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 95/438

Time elapsed: 624 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 100/438

Time elapsed: 629 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 105/438

Time elapsed: 634 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 110/438

Time elapsed: 639 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 115/438

Time elapsed: 644 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 120/438

Time elapsed: 649 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 125/438

Time elapsed: 654 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 130/438

Time elapsed: 659 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 135/438

Time elapsed: 664 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 140/438

Time elapsed: 669 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 145/438

Time elapsed: 674 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
32 CTL EXCL 150/438

Time elapsed: 679 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 32 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 684 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 19 (type EXCL)
lola: time limit : 486 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL)
lola: result : false
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 15 (type EXCL)
lola: time limit : 583 sec
lola: memory limit: 32 pages
lola: FINISHED task # 15 (type EXCL)
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 10 (type EXCL)
lola: time limit : 729 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 5/729

Time elapsed: 689 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 10/729

Time elapsed: 694 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 15/729

Time elapsed: 699 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 20/729

Time elapsed: 704 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 25/729

Time elapsed: 709 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 30/729

Time elapsed: 714 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 35/729

Time elapsed: 719 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 40/729

Time elapsed: 724 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 45/729

Time elapsed: 729 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 50/729

Time elapsed: 734 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 10 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 739 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 7 (type EXCL)
lola: time limit : 953 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 1 (type EXCL)
lola: time limit : 1430 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL)
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 60 (type EXCL)
lola: time limit : 2861 sec
lola: memory limit: 32 pages
lola: FINISHED task # 60 (type EXCL)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: Portfolio finished: no open

FINAL RESULTS
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C2-CTLFireability-00:
LeafsetExtension-PT-S32C2-CTLFireability-01:
LeafsetExtension-PT-S32C2-CTLFireability-02:
LeafsetExtension-PT-S32C2-CTLFireability-03:
LeafsetExtension-PT-S32C2-CTLFireability-04:
LeafsetExtension-PT-S32C2-CTLFireability-05:
LeafsetExtension-PT-S32C2-CTLFireability-06:
LeafsetExtension-PT-S32C2-CTLFireability-07:
LeafsetExtension-PT-S32C2-CTLFireability-08:
LeafsetExtension-PT-S32C2-CTLFireability-09:
LeafsetExtension-PT-S32C2-CTLFireability-10:
LeafsetExtension-PT-S32C2-CTLFireability-11:
LeafsetExtension-PT-S32C2-CTLFireability-12:
LeafsetExtension-PT-S32C2-CTLFireability-13:
LeafsetExtension-PT-S32C2-CTLFireability-14:
LeafsetExtension-PT-S32C2-CTLFireability-15:

Time elapsed: 739 secs. Pages in use: 32
162124152600522.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... =============================================== examination is CTLFireability 522 ========================= 08:57 CTLCardinality.txt 08:57 CTLCardinality.xml 08:57 CTLFireability.txt 08:57 CTLFireability.xml 07:58 LTLCardinality.txt 07:58 LTLCardinality.xml 07:58 LTLFireability.txt 07:58 LTLFireability.xml 08:13 NewModel 18:43 ReachabilityCardinality.txt 18:43 ReachabilityCardinality.xml 15:50 ReachabilityFireability.txt 15:50 ReachabilityFireability.xml 04:40 UpperBounds.txt 04:40 UpperBounds.xml 08:13 equiv_col 08:13 instance 08:13 iscolored 08:13 model.pnml by BenchKit (invocation template) result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT /model.pnml net model.pnml tion/CTLFireability.xml ite.k:457 ite.k:454 ite.k:322 ite.k:331 ite.k:314 ite.k:322 ite.k:328 ite.k:296 ite.k:296 ite.k:253 ite.k:317 ite.k:322 ite.k:337 ite.k:314 ite.k:296 ite.k:325 ite.k:328 ite.k:296 ite.k:322 ite.k:334 ite.k:296 ite.k:314 ite.k:322 ite.k:328 ite.k:296 ite.k:325 ite.k:328 ite.k:296 ite.k:314 ite.k:325 ite.k:340 ite.k:317 ite.k:299 ite.k:322 ite.k:331 ite.k:299 ite.k:325 ite.k:334 ite.k:299 ite.k:317 ite.k:325 ite.k:331 ite.k:299 ite.k:322 ite.k:331 ite.k:299 ite.k:547 ite.k:547 ite.k:457 ite.k:544 ite.k:457 ite.k:544 ite.k:322 ite.k:328 ite.k:322 ite.k:331 ite.k:296 ite.k:322 ite.k:337 ite.k:296 ite.k:296 ite.k:553 ite.k:325 ite.k:328 ite.k:296 ite.k:550 ite.k:317 ite.k:296 ite.k:322 ite.k:334 ite.k:296 ite.k:250 ite.k:317 ite.k:314 ite.k:296 ite.k:325 ite.k:328 ite.k:322 ite.k:334 ite.k:296 ite.k:325 ite.k:334 ite.k:296 ite.k:253 ite.k:325 ite.k:331 ite.k:296 ite.k:253 ite.k:317 ite.k:296 ite.k:317 ite.k:325 ite.k:337 ite.k:296 ite.k:296 ite.k:317 ite.k:322 ite.k:334 ite.k:296 ite.k:322 ite.k:328 ite.k:299 ite.k:253 ite.k:253 ite.k:253 ite.k:253 ite.k:253 ite.k:253 ite.k:325 ite.k:334 ite.k:325 ite.k:334 ite.k:296 ite.k:397 ite.k:397 ite.k:317 ite.k:314 ite.k:296 ite.k:325 ite.k:331 ite.k:296 ite.k:314 ite.k:296 ite.k:325 ite.k:334 ite.k:296 ite.k:544 ite.k:253 ite.k:250 ite.k:544 ite.k:388 ite.k:544 ite.k:388 ite.k:253 ite.k:253 ite.k:253 ite.k:475 ite.k:317 ite.k:322 ite.k:328 ite.k:325 ite.k:334 ite.k:296 ite.k:322 ite.k:328 ite.k:296 ite.k:317 ite.k:314 ite.k:325 ite.k:331 ite.k:322 ite.k:334 ite.k:299 ite.k:325 ite.k:331 ite.k:299 ite.k:296 ite.k:322 ite.k:328 ite.k:296 ite.k:325 ite.k:331 ite.k:299 ite.k:388 places removed VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 DISJ 0 0 0 0 5 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CONJ 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS ite.k:806 ite.k:809 ite.k:806 ite.k:808 ite.k:811 ite.k:808 ite.k:711 for 3 LeafsetExtension-PT-S32C2-CTLFireability-01 ite.k:711 ite.k:711 for 52 LeafsetExtension-PT-S32C2-CTLFireability-12 for 52 LeafsetExtension-PT-S32C2-CTLFireability-12 for 52 LeafsetExtension-PT-S32C2-CTLFireability-12 ite.k:711 ite.k:711 ite.k:711 ite.k:711 for LeafsetExtension-PT-S32C2-CTLFireability-12 2 1 0.000000 1 for LeafsetExtension-PT-S32C2-CTLFireability-12 (obsolete) for LeafsetExtension-PT-S32C2-CTLFireability-12 (obsolete) for LeafsetExtension-PT-S32C2-CTLFireability-12 1 0.000000 0 cution/CTLFireability-69.sara. for LeafsetExtension-PT-S32C2-CTLFireability-12 for LeafsetExtension-PT-S32C2-CTLFireability-01 2992 6221 1.000000 1 ite.k:730 for 12 LeafsetExtension-PT-S32C2-CTLFireability-04 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 DISJ 0 0 1 0 5 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 5 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 1/32 LeafsetExtension-PT-S32C2-CTLFireability-04 -- ite.k:809 ite.k:813 for LeafsetExtension-PT-S32C2-CTLFireability-04 13 12 1.000000 1 ite.k:813 ite.k:806 ite.k:808 ite.k:734 ite.k:787 ite.k:806 ite.k:806 ite.k:811 ite.k:808 ite.k:749 ite.k:787 for 52 LeafsetExtension-PT-S32C2-CTLFireability-12 ite.k:812 ite.k:811 ite.k:812 ite.k:807 ite.k:808 ite.k:811 ite.k:809 ite.k:811 ite.k:807 ite.k:811 ite.k:812 ite.k:812 ite.k:809 ite.k:809 ite.k:809 ite.k:809 for LeafsetExtension-PT-S32C2-CTLFireability-12 13 12 0.000000 1 for 65 LeafsetExtension-PT-S32C2-CTLFireability-15 ite.k:813 ite.k:813 ite.k:812 ite.k:813 ite.k:811 ite.k:813 ite.k:807 ite.k:814 ite.k:814 ite.k:813 ite.k:807 ite.k:813 ite.k:813 ite.k:814 ite.k:807 ite.k:811 ite.k:812 ite.k:813 ite.k:806 ite.k:809 ite.k:808 ite.k:807 ite.k:813 ite.k:813 ite.k:811 ite.k:812 ite.k:812 ite.k:806 ite.k:813 ite.k:812 ite.k:812 ite.k:814 ite.k:808 ite.k:810 ite.k:809 ite.k:807 ite.k:808 VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 1 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 1/32 LeafsetExtension-PT-S32C2-CTLFireability-15 22408 m, 4481 m/sec, 54069 t fired, . ite.k:815 ite.k:807 ite.k:806 ite.k:813 ite.k:813 ite.k:812 ite.k:811 ite.k:814 ite.k:812 ite.k:813 ite.k:809 ite.k:806 ite.k:812 ite.k:814 ite.k:814 ite.k:806 ite.k:806 ite.k:813 ite.k:806 ite.k:807 ite.k:807 ite.k:807 ite.k:814 ite.k:811 ite.k:808 ite.k:812 ite.k:814 ite.k:806 ite.k:813 ite.k:808 ite.k:806 ite.k:807 ite.k:811 ite.k:813 VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 LeafsetExtension-PT-S32C2-CTLFireability-15 104517 m, 16421 m/sec, 322014 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 LeafsetExtension-PT-S32C2-CTLFireability-15 181060 m, 15308 m/sec, 585935 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 LeafsetExtension-PT-S32C2-CTLFireability-15 250312 m, 13850 m/sec, 854515 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 LeafsetExtension-PT-S32C2-CTLFireability-15 314134 m, 12764 m/sec, 1124547 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 LeafsetExtension-PT-S32C2-CTLFireability-15 389371 m, 15047 m/sec, 1389730 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 LeafsetExtension-PT-S32C2-CTLFireability-15 466941 m, 15514 m/sec, 1645618 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 LeafsetExtension-PT-S32C2-CTLFireability-15 543400 m, 15291 m/sec, 1905043 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 LeafsetExtension-PT-S32C2-CTLFireability-15 610912 m, 13502 m/sec, 2163841 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C2-CTLFireability-15 691364 m, 16090 m/sec, 2420513 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 LeafsetExtension-PT-S32C2-CTLFireability-15 777363 m, 17199 m/sec, 2663340 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 LeafsetExtension-PT-S32C2-CTLFireability-15 863949 m, 17317 m/sec, 2915038 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 LeafsetExtension-PT-S32C2-CTLFireability-15 945917 m, 16393 m/sec, 3167337 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 LeafsetExtension-PT-S32C2-CTLFireability-15 1042277 m, 19272 m/sec, 3427709 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 LeafsetExtension-PT-S32C2-CTLFireability-15 1132045 m, 17953 m/sec, 3687902 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 LeafsetExtension-PT-S32C2-CTLFireability-15 1211014 m, 15793 m/sec, 3945193 t fired, . for LeafsetExtension-PT-S32C2-CTLFireability-15 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS for 62 LeafsetExtension-PT-S32C2-CTLFireability-14 for LeafsetExtension-PT-S32C2-CTLFireability-14 4 5 0.000000 1 for 49 LeafsetExtension-PT-S32C2-CTLFireability-11 VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 LeafsetExtension-PT-S32C2-CTLFireability-11 80510 m, 16102 m/sec, 147735 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 LeafsetExtension-PT-S32C2-CTLFireability-11 156331 m, 15164 m/sec, 290591 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 LeafsetExtension-PT-S32C2-CTLFireability-11 226967 m, 14127 m/sec, 429597 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 LeafsetExtension-PT-S32C2-CTLFireability-11 302055 m, 15017 m/sec, 575669 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C2-CTLFireability-11 374504 m, 14489 m/sec, 717748 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 LeafsetExtension-PT-S32C2-CTLFireability-11 446406 m, 14380 m/sec, 858542 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 LeafsetExtension-PT-S32C2-CTLFireability-11 517119 m, 14142 m/sec, 996193 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 LeafsetExtension-PT-S32C2-CTLFireability-11 584897 m, 13555 m/sec, 1131432 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 LeafsetExtension-PT-S32C2-CTLFireability-11 655969 m, 14214 m/sec, 1271317 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 LeafsetExtension-PT-S32C2-CTLFireability-11 731062 m, 15018 m/sec, 1422293 t fired, . for LeafsetExtension-PT-S32C2-CTLFireability-11 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS for 46 LeafsetExtension-PT-S32C2-CTLFireability-10 VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 LeafsetExtension-PT-S32C2-CTLFireability-10 64050 m, 12810 m/sec, 147865 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 LeafsetExtension-PT-S32C2-CTLFireability-10 123625 m, 11915 m/sec, 290317 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 LeafsetExtension-PT-S32C2-CTLFireability-10 186366 m, 12548 m/sec, 430276 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 LeafsetExtension-PT-S32C2-CTLFireability-10 242863 m, 11299 m/sec, 572006 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 LeafsetExtension-PT-S32C2-CTLFireability-10 306282 m, 12683 m/sec, 713796 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C2-CTLFireability-10 368934 m, 12530 m/sec, 855575 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 LeafsetExtension-PT-S32C2-CTLFireability-10 429991 m, 12211 m/sec, 995376 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 LeafsetExtension-PT-S32C2-CTLFireability-10 484570 m, 10915 m/sec, 1133727 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 LeafsetExtension-PT-S32C2-CTLFireability-10 539458 m, 10977 m/sec, 1267133 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 LeafsetExtension-PT-S32C2-CTLFireability-10 596411 m, 11390 m/sec, 1403771 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 LeafsetExtension-PT-S32C2-CTLFireability-10 660803 m, 12878 m/sec, 1543980 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 LeafsetExtension-PT-S32C2-CTLFireability-10 726261 m, 13091 m/sec, 1693450 t fired, . for LeafsetExtension-PT-S32C2-CTLFireability-10 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS for 43 LeafsetExtension-PT-S32C2-CTLFireability-09 VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 LeafsetExtension-PT-S32C2-CTLFireability-09 72778 m, 14555 m/sec, 152262 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 LeafsetExtension-PT-S32C2-CTLFireability-09 140145 m, 13473 m/sec, 299394 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 LeafsetExtension-PT-S32C2-CTLFireability-09 202903 m, 12551 m/sec, 441861 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 LeafsetExtension-PT-S32C2-CTLFireability-09 268266 m, 13072 m/sec, 594588 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 LeafsetExtension-PT-S32C2-CTLFireability-09 331726 m, 12692 m/sec, 738761 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 LeafsetExtension-PT-S32C2-CTLFireability-09 395575 m, 12769 m/sec, 884931 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 LeafsetExtension-PT-S32C2-CTLFireability-09 458361 m, 12557 m/sec, 1027302 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 LeafsetExtension-PT-S32C2-CTLFireability-09 522100 m, 12747 m/sec, 1168162 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 LeafsetExtension-PT-S32C2-CTLFireability-09 578616 m, 11303 m/sec, 1304466 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 LeafsetExtension-PT-S32C2-CTLFireability-09 642666 m, 12810 m/sec, 1446279 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 LeafsetExtension-PT-S32C2-CTLFireability-09 705514 m, 12569 m/sec, 1594206 t fired, . for LeafsetExtension-PT-S32C2-CTLFireability-09 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS for 40 LeafsetExtension-PT-S32C2-CTLFireability-08 VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 LeafsetExtension-PT-S32C2-CTLFireability-08 75687 m, 15137 m/sec, 147414 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 LeafsetExtension-PT-S32C2-CTLFireability-08 147033 m, 14269 m/sec, 289894 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 LeafsetExtension-PT-S32C2-CTLFireability-08 216246 m, 13842 m/sec, 426692 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 LeafsetExtension-PT-S32C2-CTLFireability-08 290402 m, 14831 m/sec, 575729 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C2-CTLFireability-08 360455 m, 14010 m/sec, 716668 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 LeafsetExtension-PT-S32C2-CTLFireability-08 429449 m, 13798 m/sec, 857360 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 LeafsetExtension-PT-S32C2-CTLFireability-08 495317 m, 13173 m/sec, 996149 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 LeafsetExtension-PT-S32C2-CTLFireability-08 553476 m, 11631 m/sec, 1130501 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 LeafsetExtension-PT-S32C2-CTLFireability-08 620448 m, 13394 m/sec, 1268997 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 LeafsetExtension-PT-S32C2-CTLFireability-08 682784 m, 12467 m/sec, 1413279 t fired, . for LeafsetExtension-PT-S32C2-CTLFireability-08 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS for 37 LeafsetExtension-PT-S32C2-CTLFireability-07 VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 LeafsetExtension-PT-S32C2-CTLFireability-07 162601 m, 32520 m/sec, 165261 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 LeafsetExtension-PT-S32C2-CTLFireability-07 285405 m, 24560 m/sec, 314357 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 LeafsetExtension-PT-S32C2-CTLFireability-07 347358 m, 12390 m/sec, 449577 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 LeafsetExtension-PT-S32C2-CTLFireability-07 408459 m, 12220 m/sec, 583971 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 LeafsetExtension-PT-S32C2-CTLFireability-07 465988 m, 11505 m/sec, 714744 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 LeafsetExtension-PT-S32C2-CTLFireability-07 527694 m, 12341 m/sec, 858525 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 LeafsetExtension-PT-S32C2-CTLFireability-07 587006 m, 11862 m/sec, 993042 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 LeafsetExtension-PT-S32C2-CTLFireability-07 646486 m, 11896 m/sec, 1128508 t fired, . VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 LeafsetExtension-PT-S32C2-CTLFireability-07 705256 m, 11754 m/sec, 1261531 t fired, . for LeafsetExtension-PT-S32C2-CTLFireability-07 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS for 34 LeafsetExtension-PT-S32C2-CTLFireability-06 for LeafsetExtension-PT-S32C2-CTLFireability-06 19 37 0.000000 1 for 31 LeafsetExtension-PT-S32C2-CTLFireability-05 VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 LeafsetExtension-PT-S32C2-CTLFireability-05 29104 m, 5820 m/sec, 163967 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 LeafsetExtension-PT-S32C2-CTLFireability-05 53843 m, 4947 m/sec, 312351 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 LeafsetExtension-PT-S32C2-CTLFireability-05 79323 m, 5096 m/sec, 460847 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 LeafsetExtension-PT-S32C2-CTLFireability-05 104136 m, 4962 m/sec, 609658 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 LeafsetExtension-PT-S32C2-CTLFireability-05 129173 m, 5007 m/sec, 758187 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 LeafsetExtension-PT-S32C2-CTLFireability-05 154318 m, 5029 m/sec, 906703 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 LeafsetExtension-PT-S32C2-CTLFireability-05 178577 m, 4851 m/sec, 1051998 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 LeafsetExtension-PT-S32C2-CTLFireability-05 201860 m, 4656 m/sec, 1194260 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 LeafsetExtension-PT-S32C2-CTLFireability-05 224990 m, 4626 m/sec, 1335902 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 LeafsetExtension-PT-S32C2-CTLFireability-05 252558 m, 5513 m/sec, 1502263 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 LeafsetExtension-PT-S32C2-CTLFireability-05 278037 m, 5095 m/sec, 1654774 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 LeafsetExtension-PT-S32C2-CTLFireability-05 302236 m, 4839 m/sec, 1799621 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 LeafsetExtension-PT-S32C2-CTLFireability-05 326101 m, 4773 m/sec, 1945597 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 LeafsetExtension-PT-S32C2-CTLFireability-05 350554 m, 4890 m/sec, 2095858 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C2-CTLFireability-05 375268 m, 4942 m/sec, 2243120 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 LeafsetExtension-PT-S32C2-CTLFireability-05 400333 m, 5013 m/sec, 2392508 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 LeafsetExtension-PT-S32C2-CTLFireability-05 424824 m, 4898 m/sec, 2538233 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 LeafsetExtension-PT-S32C2-CTLFireability-05 448471 m, 4729 m/sec, 2682811 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 LeafsetExtension-PT-S32C2-CTLFireability-05 473286 m, 4963 m/sec, 2828621 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 LeafsetExtension-PT-S32C2-CTLFireability-05 497791 m, 4901 m/sec, 2973732 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 LeafsetExtension-PT-S32C2-CTLFireability-05 521456 m, 4733 m/sec, 3116045 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 LeafsetExtension-PT-S32C2-CTLFireability-05 544378 m, 4584 m/sec, 3256487 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 LeafsetExtension-PT-S32C2-CTLFireability-05 566736 m, 4471 m/sec, 3394328 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 LeafsetExtension-PT-S32C2-CTLFireability-05 589778 m, 4608 m/sec, 3536226 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 LeafsetExtension-PT-S32C2-CTLFireability-05 614802 m, 5004 m/sec, 3684867 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 LeafsetExtension-PT-S32C2-CTLFireability-05 639032 m, 4846 m/sec, 3829533 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 LeafsetExtension-PT-S32C2-CTLFireability-05 661643 m, 4522 m/sec, 3968248 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 LeafsetExtension-PT-S32C2-CTLFireability-05 688153 m, 5302 m/sec, 4128620 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 LeafsetExtension-PT-S32C2-CTLFireability-05 713877 m, 5144 m/sec, 4282557 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 LeafsetExtension-PT-S32C2-CTLFireability-05 740177 m, 5260 m/sec, 4444571 t fired, . for LeafsetExtension-PT-S32C2-CTLFireability-05 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 6 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS for 12 LeafsetExtension-PT-S32C2-CTLFireability-04 for LeafsetExtension-PT-S32C2-CTLFireability-04 0.000000 1 for 12 LeafsetExtension-PT-S32C2-CTLFireability-04 for LeafsetExtension-PT-S32C2-CTLFireability-04 19 40 0.000000 1 for 9 LeafsetExtension-PT-S32C2-CTLFireability-03 VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 LeafsetExtension-PT-S32C2-CTLFireability-03 80193 m, 16038 m/sec, 147486 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 LeafsetExtension-PT-S32C2-CTLFireability-03 155950 m, 15151 m/sec, 290381 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 LeafsetExtension-PT-S32C2-CTLFireability-03 225743 m, 13958 m/sec, 428949 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 LeafsetExtension-PT-S32C2-CTLFireability-03 300649 m, 14981 m/sec, 575380 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C2-CTLFireability-03 372722 m, 14414 m/sec, 717452 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 LeafsetExtension-PT-S32C2-CTLFireability-03 444537 m, 14363 m/sec, 858194 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 LeafsetExtension-PT-S32C2-CTLFireability-03 515174 m, 14127 m/sec, 996238 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 LeafsetExtension-PT-S32C2-CTLFireability-03 582328 m, 13430 m/sec, 1131031 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 LeafsetExtension-PT-S32C2-CTLFireability-03 652750 m, 14084 m/sec, 1270053 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 LeafsetExtension-PT-S32C2-CTLFireability-03 728421 m, 15134 m/sec, 1421600 t fired, . for LeafsetExtension-PT-S32C2-CTLFireability-03 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CONJ false state space / EG CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS for 6 LeafsetExtension-PT-S32C2-CTLFireability-02 for LeafsetExtension-PT-S32C2-CTLFireability-02 19 37 0.000000 1 for 0 LeafsetExtension-PT-S32C2-CTLFireability-00 for LeafsetExtension-PT-S32C2-CTLFireability-00 19 19 0.000000 1 for 59 LeafsetExtension-PT-S32C2-CTLFireability-13 for LeafsetExtension-PT-S32C2-CTLFireability-13 784 1535 0.000000 1 tasks 16 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL unknown AGGR DISJ false DISJ CTL unknown AGGR CTL false CTL model checker CTL unknown AGGR CTL unknown AGGR CTL unknown AGGR CTL unknown AGGR CTL unknown AGGR CONJ false state space / EG CTL true CTL model checker CTL false CTL model checker CTL unknown AGGR

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LeafsetExtension-PT-S32C2"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is LeafsetExtension-PT-S32C2, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r289-tall-162124152600522"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LeafsetExtension-PT-S32C2.tgz
mv LeafsetExtension-PT-S32C2 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;