MCC'2021- Execution of r289-tall-162124152400394

About the Execution of LoLA for HirschbergSinclair-PT-05

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
2517.743	329320.00	335999.00	607.00	FFTTFFFTTFFTFFTF	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r289-tall
Waiting for the VM to be ready (probing
...........................................
=====================
Generated by BenchKit 2-4028
Executing tool lola
Input is HirschbergSinclair-PT-05,
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r289-tall-16212415240
===========================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 600K
-rw-r--r-- 1 mcc users 36K May 15
-rw-r--r-- 1 mcc users 181K May 15
-rw-r--r-- 1 mcc users 18K May 15
-rw-r--r-- 1 mcc users 79K May 15
-rw-r--r-- 1 mcc users 4.2K May 12
-rw-r--r-- 1 mcc users 23K May 12
-rw-r--r-- 1 mcc users 3.2K May 12
-rw-r--r-- 1 mcc users 18K May 12
-rw-r--r-- 1 mcc users 1 May 12
-rw-r--r-- 1 mcc users 3.6K May 11
-rw-r--r-- 1 mcc users 14K May 11
-rw-r--r-- 1 mcc users 3.4K May 11
-rw-r--r-- 1 mcc users 14K May 11
-rw-r--r-- 1 mcc users 1.9K May 12
-rw-r--r-- 1 mcc users 3.9K May 12
-rw-r--r-- 1 mcc users 6 May 12
-rw-r--r-- 1 mcc users 3 May 12
-rw-r--r-- 1 mcc users 6 May 12
-rw-r--r-- 1 mcc users 157K May 12

--------------------
content from stdout:

=== Data for post analysis generated

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi
FORMULA_NAME HirschbergSinclair-PT-05-CTLFi

=== Now, execution of the tool begins

BK_START 1621273173082

starting LoLA
BK_INPUT HirschbergSinclair-PT-05
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability

FORMULA HirschbergSinclair-PT-05-CTLFireability-03

FORMULA HirschbergSinclair-PT-05-CTLFireability-11

FORMULA HirschbergSinclair-PT-05-CTLFireability-13

FORMULA HirschbergSinclair-PT-05-CTLFireability-12

FORMULA HirschbergSinclair-PT-05-CTLFireability-08

FORMULA HirschbergSinclair-PT-05-CTLFireability-07

FORMULA HirschbergSinclair-PT-05-CTLFireability-06

FORMULA HirschbergSinclair-PT-05-CTLFireability-04

FORMULA HirschbergSinclair-PT-05-CTLFireability-02

FORMULA HirschbergSinclair-PT-05-CTLFireability-01

FORMULA HirschbergSinclair-PT-05-CTLFireability-00

FORMULA HirschbergSinclair-PT-05-CTLFireability-14

FORMULA HirschbergSinclair-PT-05-CTLFireability-15

FORMULA HirschbergSinclair-PT-05-CTLFireability-10

FORMULA HirschbergSinclair-PT-05-CTLFireability-05

FORMULA HirschbergSinclair-PT-05-CTLFireability-09

BK_STOP 1621273502402

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/executio
lola: reading pnml
lola: PNML file contains place/transition
lola: finished parsing
lola: closed net file /home/mcc/execution
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/exec
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
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lola: rewrite Frontend/Parser/formula_rew
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lola: rewrite Frontend/Parser/formula_rew
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rew
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lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
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lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: LAUNCH task # 10 (type EXCL)
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
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lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
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lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rew
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lola: rewrite Frontend/Parser/formula_rew
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lola: rewrite Frontend/Parser/formula_rew
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lola: rewrite Frontend/Parser/formula_rew
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lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: LAUNCH task # 69 (type FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rew
lola: FINISHED task # 72 (type SRCH)
lola: result : unknown
lola: time used :
lola: memory pages used :
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 69 (type FNDP)
lola: result : true
lola: tried executions :
lola: time used :
lola: memory pages used :
lola: CANCELED task # 70 (type EQUN)
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rew
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lola: rewrite Frontend/Parser/formula_rew
sara: try reading problem file /home/mcc/ex
lola: rewrite Frontend/Parser/formula_rew
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lola: rewrite Frontend/Parser/formula_rew
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lola: rewrite Frontend/Parser/formula_rew
lola: rewrite Frontend/Parser/formula_rew
sara: place or transition ordering
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.

lola: FINISHED task # 70 (type EQUN)
lola: result : true
FINISHED FORMULA: CATEGORY

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lola: LAUNCH task # 68 (type EXCL)
lola: time limit : 188 sec
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lola: result : false
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lola: time limit : 224 sec
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lola: result : true
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lola: time limit : 238 sec
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lola: time limit : 256 sec
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================================================ examination is CTLFireability 0394 ========================== 08:57 CTLCardinality.txt 08:57 CTLCardinality.xml 08:57 CTLFireability.txt 08:57 CTLFireability.xml 07:57 LTLCardinality.txt 07:57 LTLCardinality.xml 07:57 LTLFireability.txt 07:57 LTLFireability.xml 08:13 NewModel 18:41 ReachabilityCardinality.txt 18:41 ReachabilityCardinality.xml 15:49 ReachabilityFireability.txt 15:49 ReachabilityFireability.xml 04:40 UpperBounds.txt 04:40 UpperBounds.xml 08:13 equiv_col 08:13 instance 08:13 iscolored 08:13 model.pnml by BenchKit (invocation template) result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT n/model.pnml net /model.pnml ution/CTLFireability.xml rite.k:314 rite.k:322 rite.k:334 rite.k:296 rite.k:296 rite.k:250 rite.k:550 rite.k:550 rite.k:314 rite.k:322 rite.k:334 rite.k:296 rite.k:314 rite.k:322 rite.k:334 rite.k:317 rite.k:325 rite.k:328 rite.k:296 rite.k:296 rite.k:322 rite.k:334 rite.k:317 rite.k:296 rite.k:325 rite.k:331 rite.k:296 rite.k:317 rite.k:296 rite.k:325 rite.k:331 rite.k:296 rite.k:250 rite.k:550 rite.k:322 rite.k:334 rite.k:296 rite.k:325 rite.k:331 rite.k:296 rite.k:322 rite.k:328 rite.k:299 rite.k:314 rite.k:325 rite.k:334 rite.k:325 rite.k:334 rite.k:299 rite.k:325 rite.k:331 rite.k:296 rite.k:250 rite.k:250 rite.k:250 rite.k:314 rite.k:322 rite.k:334 rite.k:296 rite.k:314 rite.k:296 rite.k:314 rite.k:317 rite.k:296 rite.k:322 rite.k:331 rite.k:296 rite.k:322 rite.k:328 rite.k:296 rite.k:325 rite.k:328 rite.k:296 rite.k:544 rite.k:547 rite.k:547 rite.k:317 rite.k:296 rite.k:322 rite.k:334 rite.k:296 rite.k:553 rite.k:322 rite.k:337 rite.k:296 rite.k:296 rite.k:253 rite.k:317 rite.k:322 rite.k:334 rite.k:296 rite.k:317 rite.k:296 rite.k:325 rite.k:340 rite.k:299 rite.k:299 rite.k:322 rite.k:337 rite.k:296 rite.k:296 rite.k:250 rite.k:250 rite.k:445 rite.k:469 rite.k:322 rite.k:331 rite.k:296 rite.k:322 rite.k:334 rite.k:325 rite.k:328 rite.k:299 rite.k:317 rite.k:296 rite.k:322 rite.k:331 rite.k:296 rite.k:250 rite.k:314 rite.k:299 rite.k:314 rite.k:325 rite.k:328 rite.k:299 rite.k:296 rite.k:253 rite.k:253 rite.k:317 rite.k:322 rite.k:334 rite.k:296 rite.k:322 rite.k:334 rite.k:322 rite.k:331 rite.k:296 rite.k:314 rite.k:325 rite.k:334 rite.k:299 rite.k:325 rite.k:334 rite.k:325 rite.k:328 rite.k:299 rite.k:439 rite.k:325 rite.k:334 rite.k:314 rite.k:322 rite.k:334 rite.k:296 rite.k:325 rite.k:334 rite.k:296 rite.k:322 rite.k:334 rite.k:317 rite.k:325 rite.k:334 rite.k:299 rite.k:322 rite.k:334 rite.k:299 rite.k:317 rite.k:296 rite.k:322 rite.k:331 rite.k:296 rite.k:325 rite.k:328 rite.k:296 rite.k:391 rite.k:322 rite.k:328 rite.k:296 rite.k:322 rite.k:334 rite.k:296 places removed rite.k:807 rite.k:808 rite.k:806 rite.k:811 rite.k:813 rite.k:811 rite.k:813 rite.k:812 rite.k:806 rite.k:808 rite.k:806 rite.k:814 rite.k:806 rite.k:811 for 9 HirschbergSinclair-PT-05-CTLFireability-03 rite.k:807 rite.k:814 rite.k:807 rite.k:806 rite.k:810 rite.k:812 rite.k:813 rite.k:807 rite.k:813 rite.k:806 rite.k:812 rite.k:814 rite.k:814 rite.k:814 rite.k:807 rite.k:809 rite.k:808 rite.k:807 rite.k:812 rite.k:808 rite.k:806 rite.k:808 rite.k:807 rite.k:813 rite.k:811 rite.k:812 rite.k:807 rite.k:807 rite.k:809 rite.k:811 rite.k:807 rite.k:811 rite.k:754 rite.k:787 rite.k:811 rite.k:806 rite.k:813 rite.k:813 rite.k:806 rite.k:811 rite.k:807 rite.k:811 rite.k:813 rite.k:807 rite.k:812 rite.k:814 rite.k:806 rite.k:808 rite.k:811 rite.k:808 rite.k:812 rite.k:711 rite.k:711 rite.k:711 for 50 HirschbergSinclair-PT-05-CTLFireability-14 for 50 HirschbergSinclair-PT-05-CTLFireability-14 for 50 HirschbergSinclair-PT-05-CTLFireability-14 rite.k:711 for HirschbergSinclair-PT-05-CTLFireability-14 0.000000 1 for HirschbergSinclair-PT-05-CTLFireability-14 1 0.000000 0 for HirschbergSinclair-PT-05-CTLFireability-14 (obsolete) rite.k:813 rite.k:806 rite.k:813 rite.k:812 rite.k:811 rite.k:812 rite.k:811 rite.k:812 rite.k:812 rite.k:813 rite.k:809 ecution/CTLFireability-70.sara. rite.k:807 rite.k:811 rite.k:807 rite.k:813 rite.k:807 rite.k:808 rite.k:807 rite.k:808 rite.k:807 is non-deterministic for HirschbergSinclair-PT-05-CTLFireability-14 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 7 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 HirschbergSinclair-PT-05-CTLFireability-03 992699 m, 198539 m/sec, 3863019 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 7 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 HirschbergSinclair-PT-05-CTLFireability-03 1459138 m, 93287 m/sec, 7369829 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 7 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 HirschbergSinclair-PT-05-CTLFireability-03 1986561 m, 105484 m/sec, 10824332 t fired, . for HirschbergSinclair-PT-05-CTLFireability-03 2041084 11786148 16.000000 9 for 37 HirschbergSinclair-PT-05-CTLFireability-11 for HirschbergSinclair-PT-05-CTLFireability-11 55623 90167 0.000000 1 for 50 HirschbergSinclair-PT-05-CTLFireability-14 for HirschbergSinclair-PT-05-CTLFireability-14 4 3 0.000000 1 for 50 HirschbergSinclair-PT-05-CTLFireability-14 for HirschbergSinclair-PT-05-CTLFireability-14 1 0.000000 1 for 47 HirschbergSinclair-PT-05-CTLFireability-13 for HirschbergSinclair-PT-05-CTLFireability-13 2466 4176 0.000000 1 for 44 HirschbergSinclair-PT-05-CTLFireability-12 for HirschbergSinclair-PT-05-CTLFireability-12 102 236 0.000000 1 for 28 HirschbergSinclair-PT-05-CTLFireability-08 for HirschbergSinclair-PT-05-CTLFireability-08 4777 10229 0.000000 1 for 25 HirschbergSinclair-PT-05-CTLFireability-07 for HirschbergSinclair-PT-05-CTLFireability-07 921828 1847897 4.000000 5 for 22 HirschbergSinclair-PT-05-CTLFireability-06 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 1/32 HirschbergSinclair-PT-05-CTLFireability-06 25136 m, 5027 m/sec, 166090 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 HirschbergSinclair-PT-05-CTLFireability-06 472967 m, 89566 m/sec, 4149239 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 HirschbergSinclair-PT-05-CTLFireability-06 865095 m, 78425 m/sec, 8048981 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 HirschbergSinclair-PT-05-CTLFireability-06 1266459 m, 80272 m/sec, 11978134 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 HirschbergSinclair-PT-05-CTLFireability-06 1642971 m, 75302 m/sec, 15846698 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 HirschbergSinclair-PT-05-CTLFireability-06 2008923 m, 73190 m/sec, 19646843 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 HirschbergSinclair-PT-05-CTLFireability-06 2362276 m, 70670 m/sec, 23460356 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 HirschbergSinclair-PT-05-CTLFireability-06 2761262 m, 79797 m/sec, 27337311 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 HirschbergSinclair-PT-05-CTLFireability-06 3133954 m, 74538 m/sec, 31118089 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 HirschbergSinclair-PT-05-CTLFireability-06 3482309 m, 69671 m/sec, 34887999 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 HirschbergSinclair-PT-05-CTLFireability-06 3806772 m, 64892 m/sec, 38602867 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 HirschbergSinclair-PT-05-CTLFireability-06 4171858 m, 73017 m/sec, 42440531 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 HirschbergSinclair-PT-05-CTLFireability-06 4505569 m, 66742 m/sec, 46170038 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 HirschbergSinclair-PT-05-CTLFireability-06 4831133 m, 65112 m/sec, 49836488 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 HirschbergSinclair-PT-05-CTLFireability-06 5147894 m, 63352 m/sec, 53516168 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 HirschbergSinclair-PT-05-CTLFireability-06 5466971 m, 63815 m/sec, 57171979 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 HirschbergSinclair-PT-05-CTLFireability-06 5790479 m, 64701 m/sec, 60862858 t fired, . in use: 26 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 HirschbergSinclair-PT-05-CTLFireability-06 6098391 m, 61582 m/sec, 64566633 t fired, . in use: 27 for HirschbergSinclair-PT-05-CTLFireability-06 6155403 65219961 86.000000 27 for 12 HirschbergSinclair-PT-05-CTLFireability-04 for HirschbergSinclair-PT-05-CTLFireability-04 0.000000 1 for 12 HirschbergSinclair-PT-05-CTLFireability-04 VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 HirschbergSinclair-PT-05-CTLFireability-04 739133 m, 147826 m/sec, 3162423 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 HirschbergSinclair-PT-05-CTLFireability-04 1549797 m, 162132 m/sec, 6820972 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 3 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 HirschbergSinclair-PT-05-CTLFireability-04 2258585 m, 141757 m/sec, 10310061 t fired, . in use: 27 for HirschbergSinclair-PT-05-CTLFireability-04 2943606 13722130 19.000000 13 for 6 HirschbergSinclair-PT-05-CTLFireability-02 VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 1/32 HirschbergSinclair-PT-05-CTLFireability-02 26478 m, 5295 m/sec, 66094 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 HirschbergSinclair-PT-05-CTLFireability-02 737204 m, 142145 m/sec, 3612209 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 HirschbergSinclair-PT-05-CTLFireability-02 1292657 m, 111090 m/sec, 6939954 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 HirschbergSinclair-PT-05-CTLFireability-02 1837249 m, 108918 m/sec, 10224498 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 HirschbergSinclair-PT-05-CTLFireability-02 2415735 m, 115697 m/sec, 13542230 t fired, . in use: 27 for HirschbergSinclair-PT-05-CTLFireability-02 2449004 14014055 21.000000 11 for 3 HirschbergSinclair-PT-05-CTLFireability-01 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 HirschbergSinclair-PT-05-CTLFireability-01 717442 m, 143488 m/sec, 3106828 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 HirschbergSinclair-PT-05-CTLFireability-01 1458299 m, 148171 m/sec, 6629339 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 HirschbergSinclair-PT-05-CTLFireability-01 2139408 m, 136221 m/sec, 10015072 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 HirschbergSinclair-PT-05-CTLFireability-01 2841832 m, 140484 m/sec, 13426520 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 HirschbergSinclair-PT-05-CTLFireability-01 3498968 m, 131427 m/sec, 16746095 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 HirschbergSinclair-PT-05-CTLFireability-01 4133203 m, 126847 m/sec, 20069045 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 HirschbergSinclair-PT-05-CTLFireability-01 4735315 m, 120422 m/sec, 23273570 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 HirschbergSinclair-PT-05-CTLFireability-01 5285573 m, 110051 m/sec, 26419941 t fired, . in use: 27 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 HirschbergSinclair-PT-05-CTLFireability-01 5886913 m, 120268 m/sec, 29634791 t fired, . in use: 27 for HirschbergSinclair-PT-05-CTLFireability-01 6158095 31202924 46.000000 27 for 0 HirschbergSinclair-PT-05-CTLFireability-00 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 HirschbergSinclair-PT-05-CTLFireability-00 369975 m, 73995 m/sec, 2002719 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 HirschbergSinclair-PT-05-CTLFireability-00 987341 m, 123473 m/sec, 5620896 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 HirschbergSinclair-PT-05-CTLFireability-00 1552632 m, 113058 m/sec, 9126083 t fired, . in use: 27 for HirschbergSinclair-PT-05-CTLFireability-00 1798749 10763285 15.000000 8 for 50 HirschbergSinclair-PT-05-CTLFireability-14 for HirschbergSinclair-PT-05-CTLFireability-14 45521 136135 0.000000 1 for 65 HirschbergSinclair-PT-05-CTLFireability-15 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 HirschbergSinclair-PT-05-CTLFireability-15 395446 m, 79089 m/sec, 2224135 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 HirschbergSinclair-PT-05-CTLFireability-15 1074305 m, 135771 m/sec, 6417357 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 HirschbergSinclair-PT-05-CTLFireability-15 1708807 m, 126900 m/sec, 10523181 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 HirschbergSinclair-PT-05-CTLFireability-15 2334435 m, 125125 m/sec, 14468649 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 HirschbergSinclair-PT-05-CTLFireability-15 2940396 m, 121192 m/sec, 18337237 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 HirschbergSinclair-PT-05-CTLFireability-15 3524575 m, 116835 m/sec, 22195400 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 HirschbergSinclair-PT-05-CTLFireability-15 4079153 m, 110915 m/sec, 25933067 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 HirschbergSinclair-PT-05-CTLFireability-15 4589579 m, 102085 m/sec, 29560925 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 HirschbergSinclair-PT-05-CTLFireability-15 5133884 m, 108861 m/sec, 33254038 t fired, . in use: 27 for HirschbergSinclair-PT-05-CTLFireability-15 5349479 34804920 45.000000 23 for 34 HirschbergSinclair-PT-05-CTLFireability-10 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 HirschbergSinclair-PT-05-CTLFireability-10 453630 m, 90726 m/sec, 2524424 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 HirschbergSinclair-PT-05-CTLFireability-10 1140911 m, 137456 m/sec, 6697811 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 HirschbergSinclair-PT-05-CTLFireability-10 1794150 m, 130647 m/sec, 10752516 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 HirschbergSinclair-PT-05-CTLFireability-10 2452292 m, 131628 m/sec, 14795490 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 HirschbergSinclair-PT-05-CTLFireability-10 3062150 m, 121971 m/sec, 18699279 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 HirschbergSinclair-PT-05-CTLFireability-10 3658814 m, 119332 m/sec, 22597476 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 HirschbergSinclair-PT-05-CTLFireability-10 4229327 m, 114102 m/sec, 26400658 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 HirschbergSinclair-PT-05-CTLFireability-10 4773138 m, 108762 m/sec, 30121838 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 HirschbergSinclair-PT-05-CTLFireability-10 5332920 m, 111956 m/sec, 33937902 t fired, . in use: 27 for HirschbergSinclair-PT-05-CTLFireability-10 5455763 34752178 44.000000 24 for 19 HirschbergSinclair-PT-05-CTLFireability-05 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 HirschbergSinclair-PT-05-CTLFireability-05 552630 m, 110526 m/sec, 3571429 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 HirschbergSinclair-PT-05-CTLFireability-05 1143529 m, 118179 m/sec, 7873125 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 HirschbergSinclair-PT-05-CTLFireability-05 1725194 m, 116333 m/sec, 12120817 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 HirschbergSinclair-PT-05-CTLFireability-05 2286774 m, 112316 m/sec, 16245154 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 HirschbergSinclair-PT-05-CTLFireability-05 2808128 m, 104270 m/sec, 20354700 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 HirschbergSinclair-PT-05-CTLFireability-05 3320648 m, 102504 m/sec, 24387954 t fired, . in use: 27 for HirschbergSinclair-PT-05-CTLFireability-05 3687135 27627233 33.000000 16 for 31 HirschbergSinclair-PT-05-CTLFireability-09 for HirschbergSinclair-PT-05-CTLFireability-09 1119 2442 0.000000 1 formulas VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker DISJ true DISJ CTL false CTL model checker in use: 27

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HirschbergSinclair-PT-05"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is HirschbergSinclair-PT-05, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r289-tall-162124152400394"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HirschbergSinclair-PT-05.tgz
mv HirschbergSinclair-PT-05 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;