fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r289-tall-162124151900059
Last Updated
Jun 28, 2021

About the Execution of LoLA for CANConstruction-PT-070

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16124.684 129677.00 356764.00 109.00 ? ? ? ? ? ? ? ? ? 1 1 ? ? ? ? ? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r289-tall-162124151900059.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is CANConstruction-PT-070, examination is UpperBounds
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r289-tall-162124151900059
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 23M
-rw-r--r-- 1 mcc users 35K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 194K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 19K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 105K May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.3K May 12 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 12 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 12 07:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 12 07:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 4.7K May 11 18:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 11 18:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.9K May 11 15:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 11 15:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 12 04:39 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 12 04:39 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 4 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 23M May 12 08:13 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of positive values
NUM_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME gen-UpperBounds-00
FORMULA_NAME gen-UpperBounds-01
FORMULA_NAME gen-UpperBounds-02
FORMULA_NAME gen-UpperBounds-03
FORMULA_NAME gen-UpperBounds-04
FORMULA_NAME gen-UpperBounds-05
FORMULA_NAME gen-UpperBounds-06
FORMULA_NAME gen-UpperBounds-07
FORMULA_NAME gen-UpperBounds-08
FORMULA_NAME gen-UpperBounds-09
FORMULA_NAME gen-UpperBounds-10
FORMULA_NAME gen-UpperBounds-11
FORMULA_NAME gen-UpperBounds-12
FORMULA_NAME gen-UpperBounds-13
FORMULA_NAME gen-UpperBounds-14
FORMULA_NAME gen-UpperBounds-15

=== Now, execution of the tool begins

BK_START 1621247463315

starting LoLA
BK_INPUT CANConstruction-PT-070
BK_EXAMINATION: UpperBounds
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
Upper Bounds

FORMULA gen-UpperBounds-10 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA gen-UpperBounds-09 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621247592992

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/UpperBounds.xml
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 5 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 10 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 15 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 20 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 25 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 30 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 50 (type EXCL) for 30 gen-UpperBounds-10
lola: time limit : 127 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 30 gen-UpperBounds-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 30 gen-UpperBounds-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 1
lola: REPORT NUM
lola: FINISHED task # 50 (type EXCL) for gen-UpperBounds-10
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 48 (type FNDP) for gen-UpperBounds-10 (obsolete)
lola: CANCELED task # 49 (type EQUN) for gen-UpperBounds-10 (obsolete)
lola: REPORT NUM
lola: FINISHED task # 48 (type FNDP) for gen-UpperBounds-10
lola: tried executions : 1
lola: time used : 0.000000
sara: try reading problem file /home/mcc/execution/UpperBounds-49.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 49 (type EQUN) for gen-UpperBounds-10
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 35 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 40 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 45 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 53 (type EXCL) for 27 gen-UpperBounds-09
lola: time limit : 136 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 51 (type FNDP) for 27 gen-UpperBounds-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type EQUN) for 27 gen-UpperBounds-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 1
lola: REPORT NUM
lola: FINISHED task # 53 (type EXCL) for gen-UpperBounds-09
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 51 (type FNDP) for gen-UpperBounds-09 (obsolete)
lola: CANCELED task # 52 (type EQUN) for gen-UpperBounds-09 (obsolete)
lola: REPORT NUM
lola: FINISHED task # 51 (type FNDP) for gen-UpperBounds-09
lola: tried executions : 1
lola: time used : 0.000000
sara: try reading problem file /home/mcc/execution/UpperBounds-52.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 52 (type EQUN) for gen-UpperBounds-09
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 50 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 55 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 60 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 65 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 70 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 75 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 80 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 85 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 90 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 95 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 100 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 105 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 110 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 115 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 120 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-UpperBounds-09: BOUND 1 state space
gen-UpperBounds-10: BOUND 1 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
gen-UpperBounds-04: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
gen-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 125 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 62: 413 Killed lola --conf=$BIN_DIR/configfiles/upperboundsconf --formula=$DIR/UpperBounds.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CANConstruction-PT-070"
export BK_EXAMINATION="UpperBounds"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is CANConstruction-PT-070, examination is UpperBounds"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r289-tall-162124151900059"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CANConstruction-PT-070.tgz
mv CANConstruction-PT-070 execution
cd execution
if [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "UpperBounds" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] || [ "UpperBounds" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "UpperBounds" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "UpperBounds" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "UpperBounds.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property UpperBounds.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "UpperBounds.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' UpperBounds.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] ; then
echo "FORMULA_NAME UpperBounds"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;