About the Execution of ITS-Tools for Sudoku-COL-AN12
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16246.651 | 3600000.00 | 8191853.00 | 307950.00 | TTFTTTTFTTTF?TFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r254-tall-162106746100486.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is Sudoku-COL-AN12, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r254-tall-162106746100486
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 312K
-rw-r--r-- 1 mcc users 11K May 15 08:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 107K May 15 08:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 15 08:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K May 15 08:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Mar 28 16:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 28 16:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Mar 28 16:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 28 16:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 13 19:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 13 19:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 13 19:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 13 19:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 08:16 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 22 08:16 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:52 equiv_pt
-rw-r--r-- 1 mcc users 5 May 5 16:52 instance
-rw-r--r-- 1 mcc users 5 May 5 16:52 iscolored
-rw-r--r-- 1 mcc users 6.5K May 5 16:52 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-00
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-01
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-02
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-03
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-04
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-05
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-06
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-07
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-08
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-09
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-10
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-11
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-12
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-13
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-14
FORMULA_NAME Sudoku-COL-AN12-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1621213120085
Running Version 0
[2021-05-17 00:58:41] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -spotpath, /home/mcc/BenchKit/bin//..//ltlfilt, -z3path, /home/mcc/BenchKit/bin//..//z3/bin/z3, -yices2path, /home/mcc/BenchKit/bin//..//yices/bin/yices, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2021-05-17 00:58:41] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2021-05-17 00:58:41] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
[2021-05-17 00:58:41] [WARNING] Using fallBack plugin, rng conformance not checked
[2021-05-17 00:58:42] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 502 ms
[2021-05-17 00:58:42] [WARNING] Unknown color function,Tuple skipping symmetry detection on parameters for transition select
[2021-05-17 00:58:42] [INFO ] Imported 4 HL places and 1 HL transitions for a total of 2160 PT places and 1728.0 transition bindings in 15 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 8 ms.
Working with output stream class java.io.PrintStream
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2021-05-17 00:58:42] [INFO ] Built PT skeleton of HLPN with 4 places and 1 transitions in 3 ms.
[2021-05-17 00:58:42] [INFO ] Skeletonized HLPN properties in 0 ms.
Successfully produced net in file /tmp/petri1000_13234210312049658998.dot
Incomplete random walk after 100009 steps, including 684 resets, run finished after 46 ms. (steps per millisecond=2174 ) properties (out of 13) seen :8
Running SMT prover for 5 properties.
// Phase 1: matrix 1 rows 4 cols
[2021-05-17 00:58:42] [INFO ] Computed 3 place invariants in 5 ms
[2021-05-17 00:58:42] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned unsat
[2021-05-17 00:58:42] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned unsat
[2021-05-17 00:58:42] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2021-05-17 00:58:42] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2021-05-17 00:58:42] [INFO ] [Real]Absence check using state equation in 3 ms returned sat
[2021-05-17 00:58:42] [INFO ] Computed and/alt/rep : 0/0/0 causal constraints (skipped 0 transitions) in 1 ms.
[2021-05-17 00:58:42] [INFO ] Added : 0 causal constraints over 0 iterations in 3 ms. Result :sat
[2021-05-17 00:58:42] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned unsat
[2021-05-17 00:58:42] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned unsat
Successfully simplified 4 atomic propositions for a total of 4 simplifications.
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2021-05-17 00:58:42] [INFO ] Flatten gal took : 13 ms
[2021-05-17 00:58:42] [INFO ] Flatten gal took : 1 ms
[2021-05-17 00:58:42] [INFO ] Unfolded HLPN to a Petri net with 2160 places and 1728 transitions in 37 ms.
[2021-05-17 00:58:42] [INFO ] Unfolded HLPN properties in 2 ms.
Successfully produced net in file /tmp/petri1001_12617065318869189906.dot
Incomplete random walk after 10000 steps, including 79 resets, run finished after 2454 ms. (steps per millisecond=4 ) properties (out of 9) seen :3
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 662 ms. (steps per millisecond=15 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 115 ms. (steps per millisecond=86 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 103 ms. (steps per millisecond=97 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 105 ms. (steps per millisecond=95 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 105 ms. (steps per millisecond=95 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 607 ms. (steps per millisecond=16 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
// Phase 1: matrix 1728 rows 2160 cols
[2021-05-17 00:58:46] [INFO ] Computed 432 place invariants in 37 ms
[2021-05-17 00:58:49] [INFO ] [Real]Absence check using 432 positive place invariants in 2046 ms returned sat
[2021-05-17 00:58:49] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2021-05-17 00:58:50] [INFO ] [Real]Absence check using state equation in 989 ms returned sat
[2021-05-17 00:58:50] [INFO ] Solution in real domain found non-integer solution.
[2021-05-17 00:58:55] [INFO ] [Nat]Absence check using 432 positive place invariants in 4769 ms returned unknown
[2021-05-17 00:58:57] [INFO ] [Real]Absence check using 432 positive place invariants in 2175 ms returned sat
[2021-05-17 00:58:57] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2021-05-17 00:58:58] [INFO ] [Real]Absence check using state equation in 957 ms returned sat
[2021-05-17 00:58:58] [INFO ] Solution in real domain found non-integer solution.
[2021-05-17 00:59:00] [INFO ] [Nat]Absence check using 432 positive place invariants in 1494 ms returned sat
[2021-05-17 00:59:00] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2021-05-17 00:59:01] [INFO ] [Nat]Absence check using state equation in 940 ms returned sat
[2021-05-17 00:59:01] [INFO ] Computed and/alt/rep : 0/0/0 causal constraints (skipped 0 transitions) in 64 ms.
[2021-05-17 00:59:01] [INFO ] Added : 0 causal constraints over 0 iterations in 226 ms. Result :sat
Attempting to minimize the solution found.
Minimization took 9 ms.
[2021-05-17 00:59:03] [INFO ] [Real]Absence check using 432 positive place invariants in 1215 ms returned sat
[2021-05-17 00:59:03] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2021-05-17 00:59:04] [INFO ] [Real]Absence check using state equation in 889 ms returned sat
[2021-05-17 00:59:04] [INFO ] Solution in real domain found non-integer solution.
[2021-05-17 00:59:05] [INFO ] [Nat]Absence check using 432 positive place invariants in 1462 ms returned sat
[2021-05-17 00:59:05] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2021-05-17 00:59:06] [INFO ] [Nat]Absence check using state equation in 978 ms returned sat
[2021-05-17 00:59:06] [INFO ] Computed and/alt/rep : 0/0/0 causal constraints (skipped 0 transitions) in 96 ms.
[2021-05-17 00:59:07] [INFO ] Added : 0 causal constraints over 0 iterations in 241 ms. Result :sat
Attempting to minimize the solution found.
Minimization took 2 ms.
[2021-05-17 00:59:12] [INFO ] [Real]Absence check using 432 positive place invariants in 4807 ms returned unknown
[2021-05-17 00:59:13] [INFO ] [Real]Absence check using 432 positive place invariants in 1090 ms returned sat
[2021-05-17 00:59:13] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2021-05-17 00:59:14] [INFO ] [Real]Absence check using state equation in 805 ms returned sat
[2021-05-17 00:59:14] [INFO ] Solution in real domain found non-integer solution.
[2021-05-17 00:59:17] [INFO ] [Nat]Absence check using 432 positive place invariants in 3384 ms returned sat
[2021-05-17 00:59:17] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2021-05-17 00:59:19] [INFO ] [Nat]Absence check using state equation in 1431 ms returned unknown
[2021-05-17 00:59:24] [INFO ] [Real]Absence check using 432 positive place invariants in 4788 ms returned unknown
Fused 6 Parikh solutions to 3 different solutions.
Incomplete Parikh walk after 14300 steps, including 99 resets, run finished after 466 ms. (steps per millisecond=30 ) properties (out of 6) seen :5 could not realise parikh vector
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA Sudoku-COL-AN12-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Incomplete Parikh walk after 14200 steps, including 99 resets, run finished after 433 ms. (steps per millisecond=32 ) properties (out of 1) seen :0 could not realise parikh vector
Support contains 2016 out of 2160 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 2160/2160 places, 1728/1728 transitions.
Applied a total of 0 rules in 79 ms. Remains 2160 /2160 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions, in 1 iterations. Remains : 2160/2160 places, 1728/1728 transitions.
[2021-05-17 00:59:25] [INFO ] Flatten gal took : 220 ms
[2021-05-17 00:59:25] [INFO ] Flatten gal took : 175 ms
[2021-05-17 00:59:25] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality14269046364835214054.gal : 29 ms
[2021-05-17 00:59:25] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality18352086726774725571.prop : 4 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/ReachabilityCardinality14269046364835214054.gal, -t, CGAL, -reachable-file, /tmp/ReachabilityCardinality18352086726774725571.prop, --nowitness, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /tmp/ReachabilityCardinality14269046364835214054.gal -t CGAL -reachable-file /tmp/ReachabilityCardinality18352086726774725571.prop --nowitness --gen-order FOLLOW
Loading property file /tmp/ReachabilityCardinality18352086726774725571.prop.
SDD proceeding with computation,1 properties remain. new max is 4
SDD size :1 after 209
Detected timeout of ITS tools.
[2021-05-17 00:59:41] [INFO ] Flatten gal took : 146 ms
[2021-05-17 00:59:41] [INFO ] Applying decomposition
[2021-05-17 00:59:41] [INFO ] Flatten gal took : 102 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph8300967070179647613.txt, -o, /tmp/graph8300967070179647613.bin, -w, /tmp/graph8300967070179647613.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph8300967070179647613.bin, -l, -1, -v, -w, /tmp/graph8300967070179647613.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-17 00:59:45] [INFO ] Decomposing Gal with order
[2021-05-17 00:59:45] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-17 00:59:50] [INFO ] Flatten gal took : 4560 ms
[2021-05-17 00:59:50] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 14 ms.
[2021-05-17 00:59:51] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality3455026639314151324.gal : 26 ms
[2021-05-17 00:59:51] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality18417684274613162992.prop : 3 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/ReachabilityCardinality3455026639314151324.gal, -t, CGAL, -reachable-file, /tmp/ReachabilityCardinality18417684274613162992.prop, --nowitness, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /tmp/ReachabilityCardinality3455026639314151324.gal -t CGAL -reachable-file /tmp/ReachabilityCardinality18417684274613162992.prop --nowitness --gen-order FOLLOW
Loading property file /tmp/ReachabilityCardinality18417684274613162992.prop.
SDD proceeding with computation,1 properties remain. new max is 4
SDD size :1 after 167
Detected timeout of ITS tools.
Built C files in :
/tmp/ltsmin11164574194746557755
[2021-05-17 01:00:06] [INFO ] Built C files in 46ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin11164574194746557755
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin11164574194746557755]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin11164574194746557755] killed by timeout after 1 SECONDS
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin11164574194746557755] killed by timeout after 1 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:79)
at java.base/java.lang.Thread.run(Thread.java:834)
Interrupted random walk after 238521 steps, including 1891 resets, run timeout after 30001 ms. (steps per millisecond=7 ) properties seen :{}
Interrupted Best-First random walk after 78510 steps, including 1 resets, run timeout after 5024 ms. (steps per millisecond=15 ) properties seen :{}
Interrupted probabilistic random walk after 2091841 steps, run timeout after 30001 ms. (steps per millisecond=69 ) properties seen :{}
Probabilistic random walk after 2091841 steps, saw 454017 distinct states, run finished after 30001 ms. (steps per millisecond=69 ) properties seen :{}
Running SMT prover for 1 properties.
// Phase 1: matrix 1728 rows 2160 cols
[2021-05-17 01:01:12] [INFO ] Computed 432 place invariants in 10 ms
[2021-05-17 01:01:57] [INFO ] [Real]Absence check using 432 positive place invariants in 44743 ms returned unknown
Support contains 2016 out of 2160 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 2160/2160 places, 1728/1728 transitions.
Applied a total of 0 rules in 35 ms. Remains 2160 /2160 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions, in 1 iterations. Remains : 2160/2160 places, 1728/1728 transitions.
Starting structural reductions, iteration 0 : 2160/2160 places, 1728/1728 transitions.
Applied a total of 0 rules in 32 ms. Remains 2160 /2160 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
// Phase 1: matrix 1728 rows 2160 cols
[2021-05-17 01:01:57] [INFO ] Computed 432 place invariants in 8 ms
[2021-05-17 01:01:57] [INFO ] Implicit Places using invariants in 534 ms returned []
// Phase 1: matrix 1728 rows 2160 cols
[2021-05-17 01:01:57] [INFO ] Computed 432 place invariants in 7 ms
[2021-05-17 01:01:59] [INFO ] Implicit Places using invariants and state equation in 1479 ms returned []
Implicit Place search using SMT with State Equation took 2019 ms to find 0 implicit places.
[2021-05-17 01:01:59] [INFO ] Redundant transitions in 97 ms returned []
// Phase 1: matrix 1728 rows 2160 cols
[2021-05-17 01:01:59] [INFO ] Computed 432 place invariants in 6 ms
[2021-05-17 01:02:00] [INFO ] Dead Transitions using invariants and state equation in 1044 ms returned []
Finished structural reductions, in 1 iterations. Remains : 2160/2160 places, 1728/1728 transitions.
Incomplete random walk after 100000 steps, including 793 resets, run finished after 12491 ms. (steps per millisecond=8 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 1728 rows 2160 cols
[2021-05-17 01:02:13] [INFO ] Computed 432 place invariants in 6 ms
[2021-05-17 01:02:33] [INFO ] [Real]Absence check using 432 positive place invariants in 19788 ms returned unknown
[2021-05-17 01:02:33] [INFO ] Flatten gal took : 85 ms
[2021-05-17 01:02:33] [INFO ] Flatten gal took : 91 ms
[2021-05-17 01:02:33] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality12677912333373507954.gal : 11 ms
[2021-05-17 01:02:33] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality6775211729501726578.prop : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/ReachabilityCardinality12677912333373507954.gal, -t, CGAL, -reachable-file, /tmp/ReachabilityCardinality6775211729501726578.prop, --nowitness, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /tmp/ReachabilityCardinality12677912333373507954.gal -t CGAL -reachable-file /tmp/ReachabilityCardinality6775211729501726578.prop --nowitness --gen-order FOLLOW
Loading property file /tmp/ReachabilityCardinality6775211729501726578.prop.
SDD proceeding with computation,1 properties remain. new max is 4
SDD size :1 after 209
SDD proceeding with computation,1 properties remain. new max is 8
SDD size :209 after 2548
Detected timeout of ITS tools.
[2021-05-17 01:02:48] [INFO ] Flatten gal took : 80 ms
[2021-05-17 01:02:48] [INFO ] Applying decomposition
[2021-05-17 01:02:48] [INFO ] Flatten gal took : 80 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph8892618368267254999.txt, -o, /tmp/graph8892618368267254999.bin, -w, /tmp/graph8892618368267254999.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph8892618368267254999.bin, -l, -1, -v, -w, /tmp/graph8892618368267254999.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-17 01:02:53] [INFO ] Decomposing Gal with order
[2021-05-17 01:02:53] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-17 01:02:58] [INFO ] Flatten gal took : 4271 ms
[2021-05-17 01:02:58] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 11 ms.
[2021-05-17 01:02:58] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality17454295329799538374.gal : 14 ms
[2021-05-17 01:02:58] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality13315127868387499915.prop : 35 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/ReachabilityCardinality17454295329799538374.gal, -t, CGAL, -reachable-file, /tmp/ReachabilityCardinality13315127868387499915.prop, --nowitness, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /tmp/ReachabilityCardinality17454295329799538374.gal -t CGAL -reachable-file /tmp/ReachabilityCardinality13315127868387499915.prop --nowitness --gen-order FOLLOW
Loading property file /tmp/ReachabilityCardinality13315127868387499915.prop.
SDD proceeding with computation,1 properties remain. new max is 4
SDD size :1 after 167
SDD proceeding with computation,1 properties remain. new max is 8
SDD size :167 after 4051
Detected timeout of ITS tools.
Built C files in :
/tmp/ltsmin14044261737480180323
[2021-05-17 01:03:13] [INFO ] Built C files in 30ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin14044261737480180323
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin14044261737480180323]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin14044261737480180323] killed by timeout after 1 SECONDS
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin14044261737480180323] killed by timeout after 1 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:79)
at java.base/java.lang.Thread.run(Thread.java:834)
Applied a total of 0 rules in 23 ms. Remains 2160 /2160 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 1728 rows 2160 cols
[2021-05-17 01:03:14] [INFO ] Computed 432 place invariants in 6 ms
[2021-05-17 01:03:59] [INFO ] [Real]Absence check using 432 positive place invariants in 44844 ms returned unknown
[2021-05-17 01:03:59] [INFO ] Flatten gal took : 76 ms
Using solver Z3 to compute partial order matrices.
Built C files in :
/tmp/ltsmin15486117340763249804
[2021-05-17 01:03:59] [INFO ] Too many transitions (1728) to apply POR reductions. Disabling POR matrices.
[2021-05-17 01:03:59] [INFO ] Built C files in 23ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin15486117340763249804
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin15486117340763249804]
[2021-05-17 01:03:59] [INFO ] Applying decomposition
[2021-05-17 01:03:59] [INFO ] Flatten gal took : 159 ms
[2021-05-17 01:03:59] [INFO ] Flatten gal took : 88 ms
[2021-05-17 01:04:00] [INFO ] Input system was already deterministic with 1728 transitions.
[2021-05-17 01:04:00] [INFO ] Ran tautology test, simplified 0 / 1 in 984 ms.
[2021-05-17 01:04:01] [INFO ] BMC solution for property Sudoku-COL-AN12-ReachabilityCardinality-12(UNSAT) depth K=0 took 85 ms
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1728 rows 2160 cols
[2021-05-17 01:04:01] [INFO ] Computed 432 place invariants in 6 ms
inv : Rows_35 + Board_299 + Board_311 + Board_323 + Board_335 + Board_347 + Board_359 + Board_371 + Board_383 + Board_395 + Board_407 + Board_419 + Board_431 = 1
inv : Board_384 + Board_385 + Board_386 + Board_387 + Board_388 + Board_389 + Board_390 + Board_391 + Board_392 + Board_393 + Board_394 + Board_395 + Cells_32 = 1
inv : Board_0 + Board_1 + Board_2 + Board_3 + Board_4 + Board_5 + Board_6 + Board_7 + Board_8 + Board_9 + Board_10 + Board_11 + Cells_0 = 1
inv : Board_1152 + Board_1153 + Board_1154 + Board_1155 + Board_1156 + Board_1157 + Board_1158 + Board_1159 + Board_1160 + Board_1161 + Board_1162 + Board_1163 + Cells_96 = 1
inv : Rows_8 + Board_8 + Board_20 + Board_32 + Board_44 + Board_56 + Board_68 + Board_80 + Board_92 + Board_104 + Board_116 + Board_128 + Board_140 = 1
inv : Board_768 + Board_769 + Board_770 + Board_771 + Board_772 + Board_773 + Board_774 + Board_775 + Board_776 + Board_777 + Board_778 + Board_779 + Cells_64 = 1
inv : Board_59 + Board_203 + Board_347 + Board_491 + Board_635 + Board_779 + Board_923 + Board_1067 + Board_1211 + Board_1355 + Board_1499 + Board_1643 + Columns_59 = 1
inv : Rows_40 + Board_436 + Board_448 + Board_460 + Board_472 + Board_484 + Board_496 + Board_508 + Board_520 + Board_532 + Board_544 + Board_556 + Board_568 = 1
inv : Rows_86 + Board_1010 + Board_1022 + Board_1034 + Board_1046 + Board_1058 + Board_1070 + Board_1082 + Board_1094 + Board_1106 + Board_1118 + Board_1130 + Board_1142 = 1
inv : Board_34 + Board_178 + Board_322 + Board_466 + Board_610 + Board_754 + Board_898 + Board_1042 + Board_1186 + Board_1330 + Board_1474 + Board_1618 + Columns_34 = 1
inv : Board_118 + Board_262 + Board_406 + Board_550 + Board_694 + Board_838 + Board_982 + Board_1126 + Board_1270 + Board_1414 + Board_1558 + Board_1702 + Columns_118 = 1
inv : Rows_140 + Board_1592 + Board_1604 + Board_1616 + Board_1628 + Board_1640 + Board_1652 + Board_1664 + Board_1676 + Board_1688 + Board_1700 + Board_1712 + Board_1724 = 1
inv : Board_852 + Board_853 + Board_854 + Board_855 + Board_856 + Board_857 + Board_858 + Board_859 + Board_860 + Board_861 + Board_862 + Board_863 + Cells_71 = 1
inv : Board_93 + Board_237 + Board_381 + Board_525 + Board_669 + Board_813 + Board_957 + Board_1101 + Board_1245 + Board_1389 + Board_1533 + Board_1677 + Columns_93 = 1
inv : Board_51 + Board_195 + Board_339 + Board_483 + Board_627 + Board_771 + Board_915 + Board_1059 + Board_1203 + Board_1347 + Board_1491 + Board_1635 + Columns_51 = 1
inv : Board_468 + Board_469 + Board_470 + Board_471 + Board_472 + Board_473 + Board_474 + Board_475 + Board_476 + Board_477 + Board_478 + Board_479 + Cells_39 = 1
inv : Rows_81 + Board_873 + Board_885 + Board_897 + Board_909 + Board_921 + Board_933 + Board_945 + Board_957 + Board_969 + Board_981 + Board_993 + Board_1005 = 1
inv : Rows_94 + Board_1018 + Board_1030 + Board_1042 + Board_1054 + Board_1066 + Board_1078 + Board_1090 + Board_1102 + Board_1114 + Board_1126 + Board_1138 + Board_1150 = 1
inv : Board_84 + Board_85 + Board_86 + Board_87 + Board_88 + Board_89 + Board_90 + Board_91 + Board_92 + Board_93 + Board_94 + Board_95 + Cells_7 = 1
inv : Board_126 + Board_270 + Board_414 + Board_558 + Board_702 + Board_846 + Board_990 + Board_1134 + Board_1278 + Board_1422 + Board_1566 + Board_1710 + Columns_126 = 1
inv : Rows_113 + Board_1301 + Board_1313 + Board_1325 + Board_1337 + Board_1349 + Board_1361 + Board_1373 + Board_1385 + Board_1397 + Board_1409 + Board_1421 + Board_1433 = 1
inv : Rows_126 + Board_1446 + Board_1458 + Board_1470 + Board_1482 + Board_1494 + Board_1506 + Board_1518 + Board_1530 + Board_1542 + Board_1554 + Board_1566 + Board_1578 = 1
inv : Board_101 + Board_245 + Board_389 + Board_533 + Board_677 + Board_821 + Board_965 + Board_1109 + Board_1253 + Board_1397 + Board_1541 + Board_1685 + Columns_101 = 1
inv : Board_76 + Board_220 + Board_364 + Board_508 + Board_652 + Board_796 + Board_940 + Board_1084 + Board_1228 + Board_1372 + Board_1516 + Board_1660 + Columns_76 = 1
inv : Rows_0 + Board_0 + Board_12 + Board_24 + Board_36 + Board_48 + Board_60 + Board_72 + Board_84 + Board_96 + Board_108 + Board_120 + Board_132 = 1
inv : Rows_13 + Board_145 + Board_157 + Board_169 + Board_181 + Board_193 + Board_205 + Board_217 + Board_229 + Board_241 + Board_253 + Board_265 + Board_277 = 1
inv : Board_1536 + Board_1537 + Board_1538 + Board_1539 + Board_1540 + Board_1541 + Board_1542 + Board_1543 + Board_1544 + Board_1545 + Board_1546 + Board_1547 + Cells_128 = 1
inv : Rows_22 + Board_154 + Board_166 + Board_178 + Board_190 + Board_202 + Board_214 + Board_226 + Board_238 + Board_250 + Board_262 + Board_274 + Board_286 = 1
inv : Rows_132 + Board_1584 + Board_1596 + Board_1608 + Board_1620 + Board_1632 + Board_1644 + Board_1656 + Board_1668 + Board_1680 + Board_1692 + Board_1704 + Board_1716 = 1
inv : Board_1320 + Board_1321 + Board_1322 + Board_1323 + Board_1324 + Board_1325 + Board_1326 + Board_1327 + Board_1328 + Board_1329 + Board_1330 + Board_1331 + Cells_110 = 1
inv : Board_1368 + Board_1369 + Board_1370 + Board_1371 + Board_1372 + Board_1373 + Board_1374 + Board_1375 + Board_1376 + Board_1377 + Board_1378 + Board_1379 + Cells_114 = 1
inv : Board_600 + Board_601 + Board_602 + Board_603 + Board_604 + Board_605 + Board_606 + Board_607 + Board_608 + Board_609 + Board_610 + Board_611 + Cells_50 = 1
inv : Board_552 + Board_553 + Board_554 + Board_555 + Board_556 + Board_557 + Board_558 + Board_559 + Board_560 + Board_561 + Board_562 + Board_563 + Cells_46 = 1
inv : Board_67 + Board_211 + Board_355 + Board_499 + Board_643 + Board_787 + Board_931 + Board_1075 + Board_1219 + Board_1363 + Board_1507 + Board_1651 + Columns_67 = 1
inv : Rows_26 + Board_290 + Board_302 + Board_314 + Board_326 + Board_338 + Board_350 + Board_362 + Board_374 + Board_386 + Board_398 + Board_410 + Board_422 = 1
inv : Board_26 + Board_170 + Board_314 + Board_458 + Board_602 + Board_746 + Board_890 + Board_1034 + Board_1178 + Board_1322 + Board_1466 + Board_1610 + Columns_26 = 1
inv : Board_68 + Board_212 + Board_356 + Board_500 + Board_644 + Board_788 + Board_932 + Board_1076 + Board_1220 + Board_1364 + Board_1508 + Board_1652 + Columns_68 = 1
inv : Rows_21 + Board_153 + Board_165 + Board_177 + Board_189 + Board_201 + Board_213 + Board_225 + Board_237 + Board_249 + Board_261 + Board_273 + Board_285 = 1
inv : Board_127 + Board_271 + Board_415 + Board_559 + Board_703 + Board_847 + Board_991 + Board_1135 + Board_1279 + Board_1423 + Board_1567 + Board_1711 + Columns_127 = 1
inv : Board_1 + Board_145 + Board_289 + Board_433 + Board_577 + Board_721 + Board_865 + Board_1009 + Board_1153 + Board_1297 + Board_1441 + Board_1585 + Columns_1 = 1
inv : Rows_73 + Board_865 + Board_877 + Board_889 + Board_901 + Board_913 + Board_925 + Board_937 + Board_949 + Board_961 + Board_973 + Board_985 + Board_997 = 1
inv : Rows_95 + Board_1019 + Board_1031 + Board_1043 + Board_1055 + Board_1067 + Board_1079 + Board_1091 + Board_1103 + Board_1115 + Board_1127 + Board_1139 + Board_1151 = 1
inv : Rows_85 + Board_1009 + Board_1021 + Board_1033 + Board_1045 + Board_1057 + Board_1069 + Board_1081 + Board_1093 + Board_1105 + Board_1117 + Board_1129 + Board_1141 = 1
inv : Board_684 + Board_685 + Board_686 + Board_687 + Board_688 + Board_689 + Board_690 + Board_691 + Board_692 + Board_693 + Board_694 + Board_695 + Cells_57 = 1
inv : Board_1236 + Board_1237 + Board_1238 + Board_1239 + Board_1240 + Board_1241 + Board_1242 + Board_1243 + Board_1244 + Board_1245 + Board_1246 + Board_1247 + Cells_103 = 1
inv : Rows_72 + Board_864 + Board_876 + Board_888 + Board_900 + Board_912 + Board_924 + Board_936 + Board_948 + Board_960 + Board_972 + Board_984 + Board_996 = 1
inv : Rows_99 + Board_1155 + Board_1167 + Board_1179 + Board_1191 + Board_1203 + Board_1215 + Board_1227 + Board_1239 + Board_1251 + Board_1263 + Board_1275 + Board_1287 = 1
inv : Rows_112 + Board_1300 + Board_1312 + Board_1324 + Board_1336 + Board_1348 + Board_1360 + Board_1372 + Board_1384 + Board_1396 + Board_1408 + Board_1420 + Board_1432 = 1
inv : Board_102 + Board_246 + Board_390 + Board_534 + Board_678 + Board_822 + Board_966 + Board_1110 + Board_1254 + Board_1398 + Board_1542 + Board_1686 + Columns_102 = 1
inv : Board_1452 + Board_1453 + Board_1454 + Board_1455 + Board_1456 + Board_1457 + Board_1458 + Board_1459 + Board_1460 + Board_1461 + Board_1462 + Board_1463 + Cells_121 = 1
inv : Board_92 + Board_236 + Board_380 + Board_524 + Board_668 + Board_812 + Board_956 + Board_1100 + Board_1244 + Board_1388 + Board_1532 + Board_1676 + Columns_92 = 1
inv : Board_143 + Board_287 + Board_431 + Board_575 + Board_719 + Board_863 + Board_1007 + Board_1151 + Board_1295 + Board_1439 + Board_1583 + Board_1727 + Columns_143 = 1
inv : Board_17 + Board_161 + Board_305 + Board_449 + Board_593 + Board_737 + Board_881 + Board_1025 + Board_1169 + Board_1313 + Board_1457 + Board_1601 + Columns_17 = 1
inv : Board_42 + Board_186 + Board_330 + Board_474 + Board_618 + Board_762 + Board_906 + Board_1050 + Board_1194 + Board_1338 + Board_1482 + Board_1626 + Columns_42 = 1
inv : Board_432 + Board_433 + Board_434 + Board_435 + Board_436 + Board_437 + Board_438 + Board_439 + Board_440 + Board_441 + Board_442 + Board_443 + Cells_36 = 1
inv : Board_119 + Board_263 + Board_407 + Board_551 + Board_695 + Board_839 + Board_983 + Board_1127 + Board_1271 + Board_1415 + Board_1559 + Board_1703 + Columns_119 = 1
inv : Rows_12 + Board_144 + Board_156 + Board_168 + Board_180 + Board_192 + Board_204 + Board_216 + Board_228 + Board_240 + Board_252 + Board_264 + Board_276 = 1
inv : Board_336 + Board_337 + Board_338 + Board_339 + Board_340 + Board_341 + Board_342 + Board_343 + Board_344 + Board_345 + Board_346 + Board_347 + Cells_28 = 1
inv : Board_58 + Board_202 + Board_346 + Board_490 + Board_634 + Board_778 + Board_922 + Board_1066 + Board_1210 + Board_1354 + Board_1498 + Board_1642 + Columns_58 = 1
inv : Rows_34 + Board_298 + Board_310 + Board_322 + Board_334 + Board_346 + Board_358 + Board_370 + Board_382 + Board_394 + Board_406 + Board_418 + Board_430 = 1
inv : Board_1584 + Board_1585 + Board_1586 + Board_1587 + Board_1588 + Board_1589 + Board_1590 + Board_1591 + Board_1592 + Board_1593 + Board_1594 + Board_1595 + Cells_132 = 1
inv : Board_1488 + Board_1489 + Board_1490 + Board_1491 + Board_1492 + Board_1493 + Board_1494 + Board_1495 + Board_1496 + Board_1497 + Board_1498 + Board_1499 + Cells_124 = 1
inv : Rows_14 + Board_146 + Board_158 + Board_170 + Board_182 + Board_194 + Board_206 + Board_218 + Board_230 + Board_242 + Board_254 + Board_266 + Board_278 = 1
inv : Rows_39 + Board_435 + Board_447 + Board_459 + Board_471 + Board_483 + Board_495 + Board_507 + Board_519 + Board_531 + Board_543 + Board_555 + Board_567 = 1
inv : Rows_66 + Board_726 + Board_738 + Board_750 + Board_762 + Board_774 + Board_786 + Board_798 + Board_810 + Board_822 + Board_834 + Board_846 + Board_858 = 1
inv : Rows_7 + Board_7 + Board_19 + Board_31 + Board_43 + Board_55 + Board_67 + Board_79 + Board_91 + Board_103 + Board_115 + Board_127 + Board_139 = 1
inv : Rows_41 + Board_437 + Board_449 + Board_461 + Board_473 + Board_485 + Board_497 + Board_509 + Board_521 + Board_533 + Board_545 + Board_557 + Board_569 = 1
inv : Board_10 + Board_154 + Board_298 + Board_442 + Board_586 + Board_730 + Board_874 + Board_1018 + Board_1162 + Board_1306 + Board_1450 + Board_1594 + Columns_10 = 1
inv : Board_142 + Board_286 + Board_430 + Board_574 + Board_718 + Board_862 + Board_1006 + Board_1150 + Board_1294 + Board_1438 + Board_1582 + Board_1726 + Columns_142 = 1
inv : Board_41 + Board_185 + Board_329 + Board_473 + Board_617 + Board_761 + Board_905 + Board_1049 + Board_1193 + Board_1337 + Board_1481 + Board_1625 + Columns_41 = 1
inv : Board_636 + Board_637 + Board_638 + Board_639 + Board_640 + Board_641 + Board_642 + Board_643 + Board_644 + Board_645 + Board_646 + Board_647 + Cells_53 = 1
inv : Board_1116 + Board_1117 + Board_1118 + Board_1119 + Board_1120 + Board_1121 + Board_1122 + Board_1123 + Board_1124 + Board_1125 + Board_1126 + Board_1127 + Cells_93 = 1
inv : Board_1284 + Board_1285 + Board_1286 + Board_1287 + Board_1288 + Board_1289 + Board_1290 + Board_1291 + Board_1292 + Board_1293 + Board_1294 + Board_1295 + Cells_107 = 1
inv : Board_1020 + Board_1021 + Board_1022 + Board_1023 + Board_1024 + Board_1025 + Board_1026 + Board_1027 + Board_1028 + Board_1029 + Board_1030 + Board_1031 + Cells_85 = 1
inv : Board_900 + Board_901 + Board_902 + Board_903 + Board_904 + Board_905 + Board_906 + Board_907 + Board_908 + Board_909 + Board_910 + Board_911 + Cells_75 = 1
inv : Board_111 + Board_255 + Board_399 + Board_543 + Board_687 + Board_831 + Board_975 + Board_1119 + Board_1263 + Board_1407 + Board_1551 + Board_1695 + Columns_111 = 1
inv : Rows_100 + Board_1156 + Board_1168 + Board_1180 + Board_1192 + Board_1204 + Board_1216 + Board_1228 + Board_1240 + Board_1252 + Board_1264 + Board_1276 + Board_1288 = 1
inv : Rows_23 + Board_155 + Board_167 + Board_179 + Board_191 + Board_203 + Board_215 + Board_227 + Board_239 + Board_251 + Board_263 + Board_275 + Board_287 = 1
inv : Board_8 + Board_152 + Board_296 + Board_440 + Board_584 + Board_728 + Board_872 + Board_1016 + Board_1160 + Board_1304 + Board_1448 + Board_1592 + Columns_8 = 1
inv : Rows_68 + Board_728 + Board_740 + Board_752 + Board_764 + Board_776 + Board_788 + Board_800 + Board_812 + Board_824 + Board_836 + Board_848 + Board_860 = 1
inv : Board_18 + Board_162 + Board_306 + Board_450 + Board_594 + Board_738 + Board_882 + Board_1026 + Board_1170 + Board_1314 + Board_1458 + Board_1602 + Columns_18 = 1
inv : Board_1272 + Board_1273 + Board_1274 + Board_1275 + Board_1276 + Board_1277 + Board_1278 + Board_1279 + Board_1280 + Board_1281 + Board_1282 + Board_1283 + Cells_106 = 1
inv : Board_120 + Board_121 + Board_122 + Board_123 + Board_124 + Board_125 + Board_126 + Board_127 + Board_128 + Board_129 + Board_130 + Board_131 + Cells_10 = 1
inv : Board_648 + Board_649 + Board_650 + Board_651 + Board_652 + Board_653 + Board_654 + Board_655 + Board_656 + Board_657 + Board_658 + Board_659 + Cells_54 = 1
inv : Board_216 + Board_217 + Board_218 + Board_219 + Board_220 + Board_221 + Board_222 + Board_223 + Board_224 + Board_225 + Board_226 + Board_227 + Cells_18 = 1
inv : Board_109 + Board_253 + Board_397 + Board_541 + Board_685 + Board_829 + Board_973 + Board_1117 + Board_1261 + Board_1405 + Board_1549 + Board_1693 + Columns_109 = 1
inv : Rows_74 + Board_866 + Board_878 + Board_890 + Board_902 + Board_914 + Board_926 + Board_938 + Board_950 + Board_962 + Board_974 + Board_986 + Board_998 = 1
inv : Board_69 + Board_213 + Board_357 + Board_501 + Board_645 + Board_789 + Board_933 + Board_1077 + Board_1221 + Board_1365 + Board_1509 + Board_1653 + Columns_69 = 1
inv : Board_49 + Board_193 + Board_337 + Board_481 + Board_625 + Board_769 + Board_913 + Board_1057 + Board_1201 + Board_1345 + Board_1489 + Board_1633 + Columns_49 = 1
inv : Rows_127 + Board_1447 + Board_1459 + Board_1471 + Board_1483 + Board_1495 + Board_1507 + Board_1519 + Board_1531 + Board_1543 + Board_1555 + Board_1567 + Board_1579 = 1
inv : Board_0 + Board_144 + Board_288 + Board_432 + Board_576 + Board_720 + Board_864 + Board_1008 + Board_1152 + Board_1296 + Board_1440 + Board_1584 + Columns_0 = 1
inv : Board_1704 + Board_1705 + Board_1706 + Board_1707 + Board_1708 + Board_1709 + Board_1710 + Board_1711 + Board_1712 + Board_1713 + Board_1714 + Board_1715 + Cells_142 = 1
inv : Rows_128 + Board_1448 + Board_1460 + Board_1472 + Board_1484 + Board_1496 + Board_1508 + Board_1520 + Board_1532 + Board_1544 + Board_1556 + Board_1568 + Board_1580 = 1
inv : Board_588 + Board_589 + Board_590 + Board_591 + Board_592 + Board_593 + Board_594 + Board_595 + Board_596 + Board_597 + Board_598 + Board_599 + Cells_49 = 1
inv : Board_1068 + Board_1069 + Board_1070 + Board_1071 + Board_1072 + Board_1073 + Board_1074 + Board_1075 + Board_1076 + Board_1077 + Board_1078 + Board_1079 + Cells_89 = 1
inv : Board_1332 + Board_1333 + Board_1334 + Board_1335 + Board_1336 + Board_1337 + Board_1338 + Board_1339 + Board_1340 + Board_1341 + Board_1342 + Board_1343 + Cells_111 = 1
inv : Board_50 + Board_194 + Board_338 + Board_482 + Board_626 + Board_770 + Board_914 + Board_1058 + Board_1202 + Board_1346 + Board_1490 + Board_1634 + Columns_50 = 1
inv : Board_60 + Board_204 + Board_348 + Board_492 + Board_636 + Board_780 + Board_924 + Board_1068 + Board_1212 + Board_1356 + Board_1500 + Board_1644 + Columns_60 = 1
inv : Board_804 + Board_805 + Board_806 + Board_807 + Board_808 + Board_809 + Board_810 + Board_811 + Board_812 + Board_813 + Board_814 + Board_815 + Cells_67 = 1
inv : Board_19 + Board_163 + Board_307 + Board_451 + Board_595 + Board_739 + Board_883 + Board_1027 + Board_1171 + Board_1315 + Board_1459 + Board_1603 + Columns_19 = 1
inv : Board_9 + Board_153 + Board_297 + Board_441 + Board_585 + Board_729 + Board_873 + Board_1017 + Board_1161 + Board_1305 + Board_1449 + Board_1593 + Columns_9 = 1
inv : Rows_6 + Board_6 + Board_18 + Board_30 + Board_42 + Board_54 + Board_66 + Board_78 + Board_90 + Board_102 + Board_114 + Board_126 + Board_138 = 1
inv : Rows_93 + Board_1017 + Board_1029 + Board_1041 + Board_1053 + Board_1065 + Board_1077 + Board_1089 + Board_1101 + Board_1113 + Board_1125 + Board_1137 + Board_1149 = 1
inv : Rows_67 + Board_727 + Board_739 + Board_751 + Board_763 + Board_775 + Board_787 + Board_799 + Board_811 + Board_823 + Board_835 + Board_847 + Board_859 = 1
inv : Board_100 + Board_244 + Board_388 + Board_532 + Board_676 + Board_820 + Board_964 + Board_1108 + Board_1252 + Board_1396 + Board_1540 + Board_1684 + Columns_100 = 1
inv : Rows_101 + Board_1157 + Board_1169 + Board_1181 + Board_1193 + Board_1205 + Board_1217 + Board_1229 + Board_1241 + Board_1253 + Board_1265 + Board_1277 + Board_1289 = 1
inv : Board_110 + Board_254 + Board_398 + Board_542 + Board_686 + Board_830 + Board_974 + Board_1118 + Board_1262 + Board_1406 + Board_1550 + Board_1694 + Columns_110 = 1
inv : Board_168 + Board_169 + Board_170 + Board_171 + Board_172 + Board_173 + Board_174 + Board_175 + Board_176 + Board_177 + Board_178 + Board_179 + Cells_14 = 1
inv : Board_120 + Board_264 + Board_408 + Board_552 + Board_696 + Board_840 + Board_984 + Board_1128 + Board_1272 + Board_1416 + Board_1560 + Board_1704 + Columns_120 = 1
inv : Board_864 + Board_865 + Board_866 + Board_867 + Board_868 + Board_869 + Board_870 + Board_871 + Board_872 + Board_873 + Board_874 + Board_875 + Cells_72 = 1
inv : Board_480 + Board_481 + Board_482 + Board_483 + Board_484 + Board_485 + Board_486 + Board_487 + Board_488 + Board_489 + Board_490 + Board_491 + Cells_40 = 1
inv : Board_57 + Board_201 + Board_345 + Board_489 + Board_633 + Board_777 + Board_921 + Board_1065 + Board_1209 + Board_1353 + Board_1497 + Board_1641 + Columns_57 = 1
inv : Board_99 + Board_243 + Board_387 + Board_531 + Board_675 + Board_819 + Board_963 + Board_1107 + Board_1251 + Board_1395 + Board_1539 + Board_1683 + Columns_99 = 1
inv : Board_672 + Board_673 + Board_674 + Board_675 + Board_676 + Board_677 + Board_678 + Board_679 + Board_680 + Board_681 + Board_682 + Board_683 + Cells_56 = 1
inv : Rows_33 + Board_297 + Board_309 + Board_321 + Board_333 + Board_345 + Board_357 + Board_369 + Board_381 + Board_393 + Board_405 + Board_417 + Board_429 = 1
inv : Board_11 + Board_155 + Board_299 + Board_443 + Board_587 + Board_731 + Board_875 + Board_1019 + Board_1163 + Board_1307 + Board_1451 + Board_1595 + Columns_11 = 1
inv : Rows_15 + Board_147 + Board_159 + Board_171 + Board_183 + Board_195 + Board_207 + Board_219 + Board_231 + Board_243 + Board_255 + Board_267 + Board_279 = 1
inv : Board_15 + Board_159 + Board_303 + Board_447 + Board_591 + Board_735 + Board_879 + Board_1023 + Board_1167 + Board_1311 + Board_1455 + Board_1599 + Columns_15 = 1
inv : Board_1632 + Board_1633 + Board_1634 + Board_1635 + Board_1636 + Board_1637 + Board_1638 + Board_1639 + Board_1640 + Board_1641 + Board_1642 + Board_1643 + Cells_136 = 1
inv : Board_137 + Board_281 + Board_425 + Board_569 + Board_713 + Board_857 + Board_1001 + Board_1145 + Board_1289 + Board_1433 + Board_1577 + Board_1721 + Columns_137 = 1
inv : Board_124 + Board_268 + Board_412 + Board_556 + Board_700 + Board_844 + Board_988 + Board_1132 + Board_1276 + Board_1420 + Board_1564 + Board_1708 + Columns_124 = 1
inv : Board_372 + Board_373 + Board_374 + Board_375 + Board_376 + Board_377 + Board_378 + Board_379 + Board_380 + Board_381 + Board_382 + Board_383 + Cells_31 = 1
inv : Board_780 + Board_781 + Board_782 + Board_783 + Board_784 + Board_785 + Board_786 + Board_787 + Board_788 + Board_789 + Board_790 + Board_791 + Cells_65 = 1
inv : Rows_42 + Board_438 + Board_450 + Board_462 + Board_474 + Board_486 + Board_498 + Board_510 + Board_522 + Board_534 + Board_546 + Board_558 + Board_570 = 1
inv : Board_1524 + Board_1525 + Board_1526 + Board_1527 + Board_1528 + Board_1529 + Board_1530 + Board_1531 + Board_1532 + Board_1533 + Board_1534 + Board_1535 + Cells_127 = 1
inv : Board_53 + Board_197 + Board_341 + Board_485 + Board_629 + Board_773 + Board_917 + Board_1061 + Board_1205 + Board_1349 + Board_1493 + Board_1637 + Columns_53 = 1
inv : Rows_134 + Board_1586 + Board_1598 + Board_1610 + Board_1622 + Board_1634 + Board_1646 + Board_1658 + Board_1670 + Board_1682 + Board_1694 + Board_1706 + Board_1718 = 1
inv : Board_91 + Board_235 + Board_379 + Board_523 + Board_667 + Board_811 + Board_955 + Board_1099 + Board_1243 + Board_1387 + Board_1531 + Board_1675 + Columns_91 = 1
inv : Board_28 + Board_172 + Board_316 + Board_460 + Board_604 + Board_748 + Board_892 + Board_1036 + Board_1180 + Board_1324 + Board_1468 + Board_1612 + Columns_28 = 1
inv : Board_86 + Board_230 + Board_374 + Board_518 + Board_662 + Board_806 + Board_950 + Board_1094 + Board_1238 + Board_1382 + Board_1526 + Board_1670 + Columns_86 = 1
inv : Board_756 + Board_757 + Board_758 + Board_759 + Board_760 + Board_761 + Board_762 + Board_763 + Board_764 + Board_765 + Board_766 + Board_767 + Cells_63 = 1
inv : Rows_10 + Board_10 + Board_22 + Board_34 + Board_46 + Board_58 + Board_70 + Board_82 + Board_94 + Board_106 + Board_118 + Board_130 + Board_142 = 1
inv : Board_1608 + Board_1609 + Board_1610 + Board_1611 + Board_1612 + Board_1613 + Board_1614 + Board_1615 + Board_1616 + Board_1617 + Board_1618 + Board_1619 + Cells_134 = 1
inv : Rows_51 + Board_579 + Board_591 + Board_603 + Board_615 + Board_627 + Board_639 + Board_651 + Board_663 + Board_675 + Board_687 + Board_699 + Board_711 = 1
inv : Board_128 + Board_272 + Board_416 + Board_560 + Board_704 + Board_848 + Board_992 + Board_1136 + Board_1280 + Board_1424 + Board_1568 + Board_1712 + Columns_128 = 1
inv : Board_2 + Board_146 + Board_290 + Board_434 + Board_578 + Board_722 + Board_866 + Board_1010 + Board_1154 + Board_1298 + Board_1442 + Board_1586 + Columns_2 = 1
inv : Board_48 + Board_192 + Board_336 + Board_480 + Board_624 + Board_768 + Board_912 + Board_1056 + Board_1200 + Board_1344 + Board_1488 + Board_1632 + Columns_48 = 1
inv : Rows_24 + Board_288 + Board_300 + Board_312 + Board_324 + Board_336 + Board_348 + Board_360 + Board_372 + Board_384 + Board_396 + Board_408 + Board_420 = 1
inv : Board_6 + Board_150 + Board_294 + Board_438 + Board_582 + Board_726 + Board_870 + Board_1014 + Board_1158 + Board_1302 + Board_1446 + Board_1590 + Columns_6 = 1
inv : Rows_78 + Board_870 + Board_882 + Board_894 + Board_906 + Board_918 + Board_930 + Board_942 + Board_954 + Board_966 + Board_978 + Board_990 + Board_1002 = 1
inv : Board_1500 + Board_1501 + Board_1502 + Board_1503 + Board_1504 + Board_1505 + Board_1506 + Board_1507 + Board_1508 + Board_1509 + Board_1510 + Board_1511 + Cells_125 = 1
inv : Board_108 + Board_252 + Board_396 + Board_540 + Board_684 + Board_828 + Board_972 + Board_1116 + Board_1260 + Board_1404 + Board_1548 + Board_1692 + Columns_108 = 1
inv : Rows_98 + Board_1154 + Board_1166 + Board_1178 + Board_1190 + Board_1202 + Board_1214 + Board_1226 + Board_1238 + Board_1250 + Board_1262 + Board_1274 + Board_1286 = 1
inv : Board_264 + Board_265 + Board_266 + Board_267 + Board_268 + Board_269 + Board_270 + Board_271 + Board_272 + Board_273 + Board_274 + Board_275 + Cells_22 = 1
inv : Rows_82 + Board_874 + Board_886 + Board_898 + Board_910 + Board_922 + Board_934 + Board_946 + Board_958 + Board_970 + Board_982 + Board_994 + Board_1006 = 1
inv : Rows_69 + Board_729 + Board_741 + Board_753 + Board_765 + Board_777 + Board_789 + Board_801 + Board_813 + Board_825 + Board_837 + Board_849 + Board_861 = 1
inv : Board_156 + Board_157 + Board_158 + Board_159 + Board_160 + Board_161 + Board_162 + Board_163 + Board_164 + Board_165 + Board_166 + Board_167 + Cells_13 = 1
inv : Board_972 + Board_973 + Board_974 + Board_975 + Board_976 + Board_977 + Board_978 + Board_979 + Board_980 + Board_981 + Board_982 + Board_983 + Cells_81 = 1
inv : Board_1188 + Board_1189 + Board_1190 + Board_1191 + Board_1192 + Board_1193 + Board_1194 + Board_1195 + Board_1196 + Board_1197 + Board_1198 + Board_1199 + Cells_99 = 1
inv : Board_62 + Board_206 + Board_350 + Board_494 + Board_638 + Board_782 + Board_926 + Board_1070 + Board_1214 + Board_1358 + Board_1502 + Board_1646 + Columns_62 = 1
inv : Board_133 + Board_277 + Board_421 + Board_565 + Board_709 + Board_853 + Board_997 + Board_1141 + Board_1285 + Board_1429 + Board_1573 + Board_1717 + Columns_133 = 1
inv : Board_82 + Board_226 + Board_370 + Board_514 + Board_658 + Board_802 + Board_946 + Board_1090 + Board_1234 + Board_1378 + Board_1522 + Board_1666 + Columns_82 = 1
inv : Board_1716 + Board_1717 + Board_1718 + Board_1719 + Board_1720 + Board_1721 + Board_1722 + Board_1723 + Board_1724 + Board_1725 + Board_1726 + Board_1727 + Cells_143 = 1
inv : Rows_125 + Board_1445 + Board_1457 + Board_1469 + Board_1481 + Board_1493 + Board_1505 + Board_1517 + Board_1529 + Board_1541 + Board_1553 + Board_1565 + Board_1577 = 1
inv : Rows_143 + Board_1595 + Board_1607 + Board_1619 + Board_1631 + Board_1643 + Board_1655 + Board_1667 + Board_1679 + Board_1691 + Board_1703 + Board_1715 + Board_1727 = 1
inv : Board_37 + Board_181 + Board_325 + Board_469 + Board_613 + Board_757 + Board_901 + Board_1045 + Board_1189 + Board_1333 + Board_1477 + Board_1621 + Columns_37 = 1
inv : Board_1080 + Board_1081 + Board_1082 + Board_1083 + Board_1084 + Board_1085 + Board_1086 + Board_1087 + Board_1088 + Board_1089 + Board_1090 + Board_1091 + Cells_90 = 1
inv : Rows_116 + Board_1304 + Board_1316 + Board_1328 + Board_1340 + Board_1352 + Board_1364 + Board_1376 + Board_1388 + Board_1400 + Board_1412 + Board_1424 + Board_1436 = 1
inv : Board_144 + Board_145 + Board_146 + Board_147 + Board_148 + Board_149 + Board_150 + Board_151 + Board_152 + Board_153 + Board_154 + Board_155 + Cells_12 = 1
inv : Board_77 + Board_221 + Board_365 + Board_509 + Board_653 + Board_797 + Board_941 + Board_1085 + Board_1229 + Board_1373 + Board_1517 + Board_1661 + Columns_77 = 1
inv : Board_35 + Board_179 + Board_323 + Board_467 + Board_611 + Board_755 + Board_899 + Board_1043 + Board_1187 + Board_1331 + Board_1475 + Board_1619 + Columns_35 = 1
inv : Board_48 + Board_49 + Board_50 + Board_51 + Board_52 + Board_53 + Board_54 + Board_55 + Board_56 + Board_57 + Board_58 + Board_59 + Cells_4 = 1
inv : Board_1296 + Board_1297 + Board_1298 + Board_1299 + Board_1300 + Board_1301 + Board_1302 + Board_1303 + Board_1304 + Board_1305 + Board_1306 + Board_1307 + Cells_108 = 1
inv : Rows_37 + Board_433 + Board_445 + Board_457 + Board_469 + Board_481 + Board_493 + Board_505 + Board_517 + Board_529 + Board_541 + Board_553 + Board_565 = 1
inv : Board_1200 + Board_1201 + Board_1202 + Board_1203 + Board_1204 + Board_1205 + Board_1206 + Board_1207 + Board_1208 + Board_1209 + Board_1210 + Board_1211 + Cells_100 = 1
inv : Board_240 + Board_241 + Board_242 + Board_243 + Board_244 + Board_245 + Board_246 + Board_247 + Board_248 + Board_249 + Board_250 + Board_251 + Cells_20 = 1
inv : Board_1104 + Board_1105 + Board_1106 + Board_1107 + Board_1108 + Board_1109 + Board_1110 + Board_1111 + Board_1112 + Board_1113 + Board_1114 + Board_1115 + Cells_92 = 1
inv : Rows_141 + Board_1593 + Board_1605 + Board_1617 + Board_1629 + Board_1641 + Board_1653 + Board_1665 + Board_1677 + Board_1689 + Board_1701 + Board_1713 + Board_1725 = 1
inv : Rows_64 + Board_724 + Board_736 + Board_748 + Board_760 + Board_772 + Board_784 + Board_796 + Board_808 + Board_820 + Board_832 + Board_844 + Board_856 = 1
inv : Board_75 + Board_219 + Board_363 + Board_507 + Board_651 + Board_795 + Board_939 + Board_1083 + Board_1227 + Board_1371 + Board_1515 + Board_1659 + Columns_75 = 1
inv : Rows_114 + Board_1302 + Board_1314 + Board_1326 + Board_1338 + Board_1350 + Board_1362 + Board_1374 + Board_1386 + Board_1398 + Board_1410 + Board_1422 + Board_1434 = 1
inv : Rows_89 + Board_1013 + Board_1025 + Board_1037 + Board_1049 + Board_1061 + Board_1073 + Board_1085 + Board_1097 + Board_1109 + Board_1121 + Board_1133 + Board_1145 = 1
inv : Board_117 + Board_261 + Board_405 + Board_549 + Board_693 + Board_837 + Board_981 + Board_1125 + Board_1269 + Board_1413 + Board_1557 + Board_1701 + Columns_117 = 1
inv : Rows_60 + Board_720 + Board_732 + Board_744 + Board_756 + Board_768 + Board_780 + Board_792 + Board_804 + Board_816 + Board_828 + Board_840 + Board_852 = 1
inv : Rows_123 + Board_1443 + Board_1455 + Board_1467 + Board_1479 + Board_1491 + Board_1503 + Board_1515 + Board_1527 + Board_1539 + Board_1551 + Board_1563 + Board_1575 = 1
inv : Board_132 + Board_133 + Board_134 + Board_135 + Board_136 + Board_137 + Board_138 + Board_139 + Board_140 + Board_141 + Board_142 + Board_143 + Cells_11 = 1
inv : Board_252 + Board_253 + Board_254 + Board_255 + Board_256 + Board_257 + Board_258 + Board_259 + Board_260 + Board_261 + Board_262 + Board_263 + Cells_21 = 1
inv : Board_348 + Board_349 + Board_350 + Board_351 + Board_352 + Board_353 + Board_354 + Board_355 + Board_356 + Board_357 + Board_358 + Board_359 + Cells_29 = 1
inv : Board_73 + Board_217 + Board_361 + Board_505 + Board_649 + Board_793 + Board_937 + Board_1081 + Board_1225 + Board_1369 + Board_1513 + Board_1657 + Columns_73 = 1
inv : Rows_107 + Board_1163 + Board_1175 + Board_1187 + Board_1199 + Board_1211 + Board_1223 + Board_1235 + Board_1247 + Board_1259 + Board_1271 + Board_1283 + Board_1295 = 1
inv : Board_104 + Board_248 + Board_392 + Board_536 + Board_680 + Board_824 + Board_968 + Board_1112 + Board_1256 + Board_1400 + Board_1544 + Board_1688 + Columns_104 = 1
inv : Board_996 + Board_997 + Board_998 + Board_999 + Board_1000 + Board_1001 + Board_1002 + Board_1003 + Board_1004 + Board_1005 + Board_1006 + Board_1007 + Cells_83 = 1
inv : Rows_139 + Board_1591 + Board_1603 + Board_1615 + Board_1627 + Board_1639 + Board_1651 + Board_1663 + Board_1675 + Board_1687 + Board_1699 + Board_1711 + Board_1723 = 1
inv : Board_106 + Board_250 + Board_394 + Board_538 + Board_682 + Board_826 + Board_970 + Board_1114 + Board_1258 + Board_1402 + Board_1546 + Board_1690 + Columns_106 = 1
inv : Rows_87 + Board_1011 + Board_1023 + Board_1035 + Board_1047 + Board_1059 + Board_1071 + Board_1083 + Board_1095 + Board_1107 + Board_1119 + Board_1131 + Board_1143 = 1
inv : Board_33 + Board_177 + Board_321 + Board_465 + Board_609 + Board_753 + Board_897 + Board_1041 + Board_1185 + Board_1329 + Board_1473 + Board_1617 + Columns_33 = 1
inv : Rows_121 + Board_1441 + Board_1453 + Board_1465 + Board_1477 + Board_1489 + Board_1501 + Board_1513 + Board_1525 + Board_1537 + Board_1549 + Board_1561 + Board_1573 = 1
inv : Board_66 + Board_210 + Board_354 + Board_498 + Board_642 + Board_786 + Board_930 + Board_1074 + Board_1218 + Board_1362 + Board_1506 + Board_1650 + Columns_66 = 1
inv : Board_1404 + Board_1405 + Board_1406 + Board_1407 + Board_1408 + Board_1409 + Board_1410 + Board_1411 + Board_1412 + Board_1413 + Board_1414 + Board_1415 + Cells_117 = 1
inv : Rows_55 + Board_583 + Board_595 + Board_607 + Board_619 + Board_631 + Board_643 + Board_655 + Board_667 + Board_679 + Board_691 + Board_703 + Board_715 = 1
inv : Rows_105 + Board_1161 + Board_1173 + Board_1185 + Board_1197 + Board_1209 + Board_1221 + Board_1233 + Board_1245 + Board_1257 + Board_1269 + Board_1281 + Board_1293 = 1
inv : Board_4 + Board_148 + Board_292 + Board_436 + Board_580 + Board_724 + Board_868 + Board_1012 + Board_1156 + Board_1300 + Board_1444 + Board_1588 + Columns_4 = 1
inv : Board_456 + Board_457 + Board_458 + Board_459 + Board_460 + Board_461 + Board_462 + Board_463 + Board_464 + Board_465 + Board_466 + Board_467 + Cells_38 = 1
inv : Board_888 + Board_889 + Board_890 + Board_891 + Board_892 + Board_893 + Board_894 + Board_895 + Board_896 + Board_897 + Board_898 + Board_899 + Cells_74 = 1
inv : Board_1416 + Board_1417 + Board_1418 + Board_1419 + Board_1420 + Board_1421 + Board_1422 + Board_1423 + Board_1424 + Board_1425 + Board_1426 + Board_1427 + Cells_118 = 1
inv : Board_1512 + Board_1513 + Board_1514 + Board_1515 + Board_1516 + Board_1517 + Board_1518 + Board_1519 + Board_1520 + Board_1521 + Board_1522 + Board_1523 + Cells_126 = 1
inv : Board_24 + Board_168 + Board_312 + Board_456 + Board_600 + Board_744 + Board_888 + Board_1032 + Board_1176 + Board_1320 + Board_1464 + Board_1608 + Columns_24 = 1
inv : Board_64 + Board_208 + Board_352 + Board_496 + Board_640 + Board_784 + Board_928 + Board_1072 + Board_1216 + Board_1360 + Board_1504 + Board_1648 + Columns_64 = 1
inv : Rows_46 + Board_442 + Board_454 + Board_466 + Board_478 + Board_490 + Board_502 + Board_514 + Board_526 + Board_538 + Board_550 + Board_562 + Board_574 = 1
inv : Rows_53 + Board_581 + Board_593 + Board_605 + Board_617 + Board_629 + Board_641 + Board_653 + Board_665 + Board_677 + Board_689 + Board_701 + Board_713 = 1
inv : Rows_71 + Board_731 + Board_743 + Board_755 + Board_767 + Board_779 + Board_791 + Board_803 + Board_815 + Board_827 + Board_839 + Board_851 + Board_863 = 1
inv : Board_44 + Board_188 + Board_332 + Board_476 + Board_620 + Board_764 + Board_908 + Board_1052 + Board_1196 + Board_1340 + Board_1484 + Board_1628 + Columns_44 = 1
inv : Board_84 + Board_228 + Board_372 + Board_516 + Board_660 + Board_804 + Board_948 + Board_1092 + Board_1236 + Board_1380 + Board_1524 + Board_1668 + Columns_84 = 1
inv : Rows_28 + Board_292 + Board_304 + Board_316 + Board_328 + Board_340 + Board_352 + Board_364 + Board_376 + Board_388 + Board_400 + Board_412 + Board_424 = 1
inv : Board_984 + Board_985 + Board_986 + Board_987 + Board_988 + Board_989 + Board_990 + Board_991 + Board_992 + Board_993 + Board_994 + Board_995 + Cells_82 = 1
inv : Board_1308 + Board_1309 + Board_1310 + Board_1311 + Board_1312 + Board_1313 + Board_1314 + Board_1315 + Board_1316 + Board_1317 + Board_1318 + Board_1319 + Cells_109 = 1
inv : Board_135 + Board_279 + Board_423 + Board_567 + Board_711 + Board_855 + Board_999 + Board_1143 + Board_1287 + Board_1431 + Board_1575 + Board_1719 + Columns_135 = 1
inv : Board_1092 + Board_1093 + Board_1094 + Board_1095 + Board_1096 + Board_1097 + Board_1098 + Board_1099 + Board_1100 + Board_1101 + Board_1102 + Board_1103 + Cells_91 = 1
inv : Board_564 + Board_565 + Board_566 + Board_567 + Board_568 + Board_569 + Board_570 + Board_571 + Board_572 + Board_573 + Board_574 + Board_575 + Cells_47 = 1
inv : Board_1620 + Board_1621 + Board_1622 + Board_1623 + Board_1624 + Board_1625 + Board_1626 + Board_1627 + Board_1628 + Board_1629 + Board_1630 + Board_1631 + Cells_135 = 1
inv : Rows_19 + Board_151 + Board_163 + Board_175 + Board_187 + Board_199 + Board_211 + Board_223 + Board_235 + Board_247 + Board_259 + Board_271 + Board_283 = 1
inv : Rows_1 + Board_1 + Board_13 + Board_25 + Board_37 + Board_49 + Board_61 + Board_73 + Board_85 + Board_97 + Board_109 + Board_121 + Board_133 = 1
inv : Board_95 + Board_239 + Board_383 + Board_527 + Board_671 + Board_815 + Board_959 + Board_1103 + Board_1247 + Board_1391 + Board_1535 + Board_1679 + Columns_95 = 1
inv : Rows_62 + Board_722 + Board_734 + Board_746 + Board_758 + Board_770 + Board_782 + Board_794 + Board_806 + Board_818 + Board_830 + Board_842 + Board_854 = 1
inv : Rows_96 + Board_1152 + Board_1164 + Board_1176 + Board_1188 + Board_1200 + Board_1212 + Board_1224 + Board_1236 + Board_1248 + Board_1260 + Board_1272 + Board_1284 = 1
inv : Rows_80 + Board_872 + Board_884 + Board_896 + Board_908 + Board_920 + Board_932 + Board_944 + Board_956 + Board_968 + Board_980 + Board_992 + Board_1004 = 1
inv : Board_115 + Board_259 + Board_403 + Board_547 + Board_691 + Board_835 + Board_979 + Board_1123 + Board_1267 + Board_1411 + Board_1555 + Board_1699 + Columns_115 = 1
inv : Board_36 + Board_37 + Board_38 + Board_39 + Board_40 + Board_41 + Board_42 + Board_43 + Board_44 + Board_45 + Board_46 + Board_47 + Cells_3 = 1
inv : Rows_90 + Board_1014 + Board_1026 + Board_1038 + Board_1050 + Board_1062 + Board_1074 + Board_1086 + Board_1098 + Board_1110 + Board_1122 + Board_1134 + Board_1146 = 1
inv : Board_960 + Board_961 + Board_962 + Board_963 + Board_964 + Board_965 + Board_966 + Board_967 + Board_968 + Board_969 + Board_970 + Board_971 + Cells_80 = 1
inv : Board_192 + Board_193 + Board_194 + Board_195 + Board_196 + Board_197 + Board_198 + Board_199 + Board_200 + Board_201 + Board_202 + Board_203 + Cells_16 = 1
inv : Rows_117 + Board_1305 + Board_1317 + Board_1329 + Board_1341 + Board_1353 + Board_1365 + Board_1377 + Board_1389 + Board_1401 + Board_1413 + Board_1425 + Board_1437 = 1
inv : Board_97 + Board_241 + Board_385 + Board_529 + Board_673 + Board_817 + Board_961 + Board_1105 + Board_1249 + Board_1393 + Board_1537 + Board_1681 + Columns_97 = 1
inv : Board_55 + Board_199 + Board_343 + Board_487 + Board_631 + Board_775 + Board_919 + Board_1063 + Board_1207 + Board_1351 + Board_1495 + Board_1639 + Columns_55 = 1
inv : Board_576 + Board_577 + Board_578 + Board_579 + Board_580 + Board_581 + Board_582 + Board_583 + Board_584 + Board_585 + Board_586 + Board_587 + Cells_48 = 1
inv : Board_122 + Board_266 + Board_410 + Board_554 + Board_698 + Board_842 + Board_986 + Board_1130 + Board_1274 + Board_1418 + Board_1562 + Board_1706 + Columns_122 = 1
inv : Rows_58 + Board_586 + Board_598 + Board_610 + Board_622 + Board_634 + Board_646 + Board_658 + Board_670 + Board_682 + Board_694 + Board_706 + Board_718 = 1
inv : Rows_36 + Board_432 + Board_444 + Board_456 + Board_468 + Board_480 + Board_492 + Board_504 + Board_516 + Board_528 + Board_540 + Board_552 + Board_564 = 1
inv : Board_1044 + Board_1045 + Board_1046 + Board_1047 + Board_1048 + Board_1049 + Board_1050 + Board_1051 + Board_1052 + Board_1053 + Board_1054 + Board_1055 + Cells_87 = 1
inv : Board_114 + Board_258 + Board_402 + Board_546 + Board_690 + Board_834 + Board_978 + Board_1122 + Board_1266 + Board_1410 + Board_1554 + Board_1698 + Columns_114 = 1
inv : Board_1428 + Board_1429 + Board_1430 + Board_1431 + Board_1432 + Board_1433 + Board_1434 + Board_1435 + Board_1436 + Board_1437 + Board_1438 + Board_1439 + Cells_119 = 1
inv : Board_1644 + Board_1645 + Board_1646 + Board_1647 + Board_1648 + Board_1649 + Board_1650 + Board_1651 + Board_1652 + Board_1653 + Board_1654 + Board_1655 + Cells_137 = 1
inv : Board_108 + Board_109 + Board_110 + Board_111 + Board_112 + Board_113 + Board_114 + Board_115 + Board_116 + Board_117 + Board_118 + Board_119 + Cells_9 = 1
inv : Board_876 + Board_877 + Board_878 + Board_879 + Board_880 + Board_881 + Board_882 + Board_883 + Board_884 + Board_885 + Board_886 + Board_887 + Cells_73 = 1
inv : Board_21 + Board_165 + Board_309 + Board_453 + Board_597 + Board_741 + Board_885 + Board_1029 + Board_1173 + Board_1317 + Board_1461 + Board_1605 + Columns_21 = 1
inv : Rows_31 + Board_295 + Board_307 + Board_319 + Board_331 + Board_343 + Board_355 + Board_367 + Board_379 + Board_391 + Board_403 + Board_415 + Board_427 = 1
inv : Rows_44 + Board_440 + Board_452 + Board_464 + Board_476 + Board_488 + Board_500 + Board_512 + Board_524 + Board_536 + Board_548 + Board_560 + Board_572 = 1
inv : Board_63 + Board_207 + Board_351 + Board_495 + Board_639 + Board_783 + Board_927 + Board_1071 + Board_1215 + Board_1359 + Board_1503 + Board_1647 + Columns_63 = 1
inv : Board_1260 + Board_1261 + Board_1262 + Board_1263 + Board_1264 + Board_1265 + Board_1266 + Board_1267 + Board_1268 + Board_1269 + Board_1270 + Board_1271 + Cells_105 = 1
inv : Board_38 + Board_182 + Board_326 + Board_470 + Board_614 + Board_758 + Board_902 + Board_1046 + Board_1190 + Board_1334 + Board_1478 + Board_1622 + Columns_38 = 1
inv : Rows_131 + Board_1451 + Board_1463 + Board_1475 + Board_1487 + Board_1499 + Board_1511 + Board_1523 + Board_1535 + Board_1547 + Board_1559 + Board_1571 + Board_1583 = 1
inv : Board_139 + Board_283 + Board_427 + Board_571 + Board_715 + Board_859 + Board_1003 + Board_1147 + Board_1291 + Board_1435 + Board_1579 + Board_1723 + Columns_139 = 1
inv : Board_13 + Board_157 + Board_301 + Board_445 + Board_589 + Board_733 + Board_877 + Board_1021 + Board_1165 + Board_1309 + Board_1453 + Board_1597 + Columns_13 = 1
inv : Rows_63 + Board_723 + Board_735 + Board_747 + Board_759 + Board_771 + Board_783 + Board_795 + Board_807 + Board_819 + Board_831 + Board_843 + Board_855 = 1
inv : Board_360 + Board_361 + Board_362 + Board_363 + Board_364 + Board_365 + Board_366 + Board_367 + Board_368 + Board_369 + Board_370 + Board_371 + Cells_30 = 1
inv : Board_492 + Board_493 + Board_494 + Board_495 + Board_496 + Board_497 + Board_498 + Board_499 + Board_500 + Board_501 + Board_502 + Board_503 + Cells_41 = 1
inv : Board_46 + Board_190 + Board_334 + Board_478 + Board_622 + Board_766 + Board_910 + Board_1054 + Board_1198 + Board_1342 + Board_1486 + Board_1630 + Columns_46 = 1
inv : Board_24 + Board_25 + Board_26 + Board_27 + Board_28 + Board_29 + Board_30 + Board_31 + Board_32 + Board_33 + Board_34 + Board_35 + Cells_2 = 1
inv : Board_88 + Board_232 + Board_376 + Board_520 + Board_664 + Board_808 + Board_952 + Board_1096 + Board_1240 + Board_1384 + Board_1528 + Board_1672 + Columns_88 = 1
inv : Rows_103 + Board_1159 + Board_1171 + Board_1183 + Board_1195 + Board_1207 + Board_1219 + Board_1231 + Board_1243 + Board_1255 + Board_1267 + Board_1279 + Board_1291 = 1
inv : Board_1560 + Board_1561 + Board_1562 + Board_1563 + Board_1564 + Board_1565 + Board_1566 + Board_1567 + Board_1568 + Board_1569 + Board_1570 + Board_1571 + Cells_130 = 1
inv : Board_792 + Board_793 + Board_794 + Board_795 + Board_796 + Board_797 + Board_798 + Board_799 + Board_800 + Board_801 + Board_802 + Board_803 + Cells_66 = 1
inv : Rows_77 + Board_869 + Board_881 + Board_893 + Board_905 + Board_917 + Board_929 + Board_941 + Board_953 + Board_965 + Board_977 + Board_989 + Board_1001 = 1
inv : Rows_104 + Board_1160 + Board_1172 + Board_1184 + Board_1196 + Board_1208 + Board_1220 + Board_1232 + Board_1244 + Board_1256 + Board_1268 + Board_1280 + Board_1292 = 1
inv : Board_1128 + Board_1129 + Board_1130 + Board_1131 + Board_1132 + Board_1133 + Board_1134 + Board_1135 + Board_1136 + Board_1137 + Board_1138 + Board_1139 + Cells_94 = 1
inv : Board_113 + Board_257 + Board_401 + Board_545 + Board_689 + Board_833 + Board_977 + Board_1121 + Board_1265 + Board_1409 + Board_1553 + Board_1697 + Columns_113 = 1
inv : Rows_3 + Board_3 + Board_15 + Board_27 + Board_39 + Board_51 + Board_63 + Board_75 + Board_87 + Board_99 + Board_111 + Board_123 + Board_135 = 1
inv : Board_72 + Board_216 + Board_360 + Board_504 + Board_648 + Board_792 + Board_936 + Board_1080 + Board_1224 + Board_1368 + Board_1512 + Board_1656 + Columns_72 = 1
inv : Rows_30 + Board_294 + Board_306 + Board_318 + Board_330 + Board_342 + Board_354 + Board_366 + Board_378 + Board_390 + Board_402 + Board_414 + Board_426 = 1
inv : Board_660 + Board_661 + Board_662 + Board_663 + Board_664 + Board_665 + Board_666 + Board_667 + Board_668 + Board_669 + Board_670 + Board_671 + Cells_55 = 1
inv : Board_708 + Board_709 + Board_710 + Board_711 + Board_712 + Board_713 + Board_714 + Board_715 + Board_716 + Board_717 + Board_718 + Board_719 + Cells_59 = 1
inv : Board_1476 + Board_1477 + Board_1478 + Board_1479 + Board_1480 + Board_1481 + Board_1482 + Board_1483 + Board_1484 + Board_1485 + Board_1486 + Board_1487 + Cells_123 = 1
inv : Rows_17 + Board_149 + Board_161 + Board_173 + Board_185 + Board_197 + Board_209 + Board_221 + Board_233 + Board_245 + Board_257 + Board_269 + Board_281 = 1
inv : Rows_4 + Board_4 + Board_16 + Board_28 + Board_40 + Board_52 + Board_64 + Board_76 + Board_88 + Board_100 + Board_112 + Board_124 + Board_136 = 1
inv : Board_444 + Board_445 + Board_446 + Board_447 + Board_448 + Board_449 + Board_450 + Board_451 + Board_452 + Board_453 + Board_454 + Board_455 + Cells_37 = 1
inv : Board_12 + Board_156 + Board_300 + Board_444 + Board_588 + Board_732 + Board_876 + Board_1020 + Board_1164 + Board_1308 + Board_1452 + Board_1596 + Columns_12 = 1
inv : Board_22 + Board_166 + Board_310 + Board_454 + Board_598 + Board_742 + Board_886 + Board_1030 + Board_1174 + Board_1318 + Board_1462 + Board_1606 + Columns_22 = 1
inv : Board_47 + Board_191 + Board_335 + Board_479 + Board_623 + Board_767 + Board_911 + Board_1055 + Board_1199 + Board_1343 + Board_1487 + Board_1631 + Columns_47 = 1
inv : Rows_130 + Board_1450 + Board_1462 + Board_1474 + Board_1486 + Board_1498 + Board_1510 + Board_1522 + Board_1534 + Board_1546 + Board_1558 + Board_1570 + Board_1582 = 1
inv : Board_1344 + Board_1345 + Board_1346 + Board_1347 + Board_1348 + Board_1349 + Board_1350 + Board_1351 + Board_1352 + Board_1353 + Board_1354 + Board_1355 + Cells_112 = 1
inv : Board_1212 + Board_1213 + Board_1214 + Board_1215 + Board_1216 + Board_1217 + Board_1218 + Board_1219 + Board_1220 + Board_1221 + Board_1222 + Board_1223 + Cells_101 = 1
inv : Board_528 + Board_529 + Board_530 + Board_531 + Board_532 + Board_533 + Board_534 + Board_535 + Board_536 + Board_537 + Board_538 + Board_539 + Cells_44 = 1
inv : Board_912 + Board_913 + Board_914 + Board_915 + Board_916 + Board_917 + Board_918 + Board_919 + Board_920 + Board_921 + Board_922 + Board_923 + Cells_76 = 1
inv : Board_1008 + Board_1009 + Board_1010 + Board_1011 + Board_1012 + Board_1013 + Board_1014 + Board_1015 + Board_1016 + Board_1017 + Board_1018 + Board_1019 + Cells_84 = 1
inv : Board_140 + Board_284 + Board_428 + Board_572 + Board_716 + Board_860 + Board_1004 + Board_1148 + Board_1292 + Board_1436 + Board_1580 + Board_1724 + Columns_140 = 1
inv : Rows_91 + Board_1015 + Board_1027 + Board_1039 + Board_1051 + Board_1063 + Board_1075 + Board_1087 + Board_1099 + Board_1111 + Board_1123 + Board_1135 + Board_1147 = 1
inv : Board_1392 + Board_1393 + Board_1394 + Board_1395 + Board_1396 + Board_1397 + Board_1398 + Board_1399 + Board_1400 + Board_1401 + Board_1402 + Board_1403 + Cells_116 = 1
inv : Rows_59 + Board_587 + Board_599 + Board_611 + Board_623 + Board_635 + Board_647 + Board_659 + Board_671 + Board_683 + Board_695 + Board_707 + Board_719 = 1
inv : Board_138 + Board_282 + Board_426 + Board_570 + Board_714 + Board_858 + Board_1002 + Board_1146 + Board_1290 + Board_1434 + Board_1578 + Board_1722 + Columns_138 = 1
inv : Board_121 + Board_265 + Board_409 + Board_553 + Board_697 + Board_841 + Board_985 + Board_1129 + Board_1273 + Board_1417 + Board_1561 + Board_1705 + Columns_121 = 1
inv : Rows_32 + Board_296 + Board_308 + Board_320 + Board_332 + Board_344 + Board_356 + Board_368 + Board_380 + Board_392 + Board_404 + Board_416 + Board_428 = 1
inv : Board_79 + Board_223 + Board_367 + Board_511 + Board_655 + Board_799 + Board_943 + Board_1087 + Board_1231 + Board_1375 + Board_1519 + Board_1663 + Columns_79 = 1
inv : Board_39 + Board_183 + Board_327 + Board_471 + Board_615 + Board_759 + Board_903 + Board_1047 + Board_1191 + Board_1335 + Board_1479 + Board_1623 + Columns_39 = 1
inv : Board_98 + Board_242 + Board_386 + Board_530 + Board_674 + Board_818 + Board_962 + Board_1106 + Board_1250 + Board_1394 + Board_1538 + Board_1682 + Columns_98 = 1
inv : Rows_137 + Board_1589 + Board_1601 + Board_1613 + Board_1625 + Board_1637 + Board_1649 + Board_1661 + Board_1673 + Board_1685 + Board_1697 + Board_1709 + Board_1721 = 1
inv : Board_228 + Board_229 + Board_230 + Board_231 + Board_232 + Board_233 + Board_234 + Board_235 + Board_236 + Board_237 + Board_238 + Board_239 + Cells_19 = 1
inv : Board_1380 + Board_1381 + Board_1382 + Board_1383 + Board_1384 + Board_1385 + Board_1386 + Board_1387 + Board_1388 + Board_1389 + Board_1390 + Board_1391 + Cells_115 = 1
inv : Rows_16 + Board_148 + Board_160 + Board_172 + Board_184 + Board_196 + Board_208 + Board_220 + Board_232 + Board_244 + Board_256 + Board_268 + Board_280 = 1
inv : Rows_110 + Board_1298 + Board_1310 + Board_1322 + Board_1334 + Board_1346 + Board_1358 + Board_1370 + Board_1382 + Board_1394 + Board_1406 + Board_1418 + Board_1430 = 1
inv : Board_1692 + Board_1693 + Board_1694 + Board_1695 + Board_1696 + Board_1697 + Board_1698 + Board_1699 + Board_1700 + Board_1701 + Board_1702 + Board_1703 + Cells_141 = 1
inv : Rows_57 + Board_585 + Board_597 + Board_609 + Board_621 + Board_633 + Board_645 + Board_657 + Board_669 + Board_681 + Board_693 + Board_705 + Board_717 = 1
inv : Board_31 + Board_175 + Board_319 + Board_463 + Board_607 + Board_751 + Board_895 + Board_1039 + Board_1183 + Board_1327 + Board_1471 + Board_1615 + Columns_31 = 1
inv : Rows_108 + Board_1296 + Board_1308 + Board_1320 + Board_1332 + Board_1344 + Board_1356 + Board_1368 + Board_1380 + Board_1392 + Board_1404 + Board_1416 + Board_1428 = 1
inv : Rows_118 + Board_1306 + Board_1318 + Board_1330 + Board_1342 + Board_1354 + Board_1366 + Board_1378 + Board_1390 + Board_1402 + Board_1414 + Board_1426 + Board_1438 = 1
inv : Rows_5 + Board_5 + Board_17 + Board_29 + Board_41 + Board_53 + Board_65 + Board_77 + Board_89 + Board_101 + Board_113 + Board_125 + Board_137 = 1
inv : Board_71 + Board_215 + Board_359 + Board_503 + Board_647 + Board_791 + Board_935 + Board_1079 + Board_1223 + Board_1367 + Board_1511 + Board_1655 + Columns_71 = 1
inv : Rows_50 + Board_578 + Board_590 + Board_602 + Board_614 + Board_626 + Board_638 + Board_650 + Board_662 + Board_674 + Board_686 + Board_698 + Board_710 = 1
inv : Board_81 + Board_225 + Board_369 + Board_513 + Board_657 + Board_801 + Board_945 + Board_1089 + Board_1233 + Board_1377 + Board_1521 + Board_1665 + Columns_81 = 1
inv : Board_130 + Board_274 + Board_418 + Board_562 + Board_706 + Board_850 + Board_994 + Board_1138 + Board_1282 + Board_1426 + Board_1570 + Board_1714 + Columns_130 = 1
inv : Board_129 + Board_273 + Board_417 + Board_561 + Board_705 + Board_849 + Board_993 + Board_1137 + Board_1281 + Board_1425 + Board_1569 + Board_1713 + Columns_129 = 1
inv : Rows_102 + Board_1158 + Board_1170 + Board_1182 + Board_1194 + Board_1206 + Board_1218 + Board_1230 + Board_1242 + Board_1254 + Board_1266 + Board_1278 + Board_1290 = 1
inv : Board_744 + Board_745 + Board_746 + Board_747 + Board_748 + Board_749 + Board_750 + Board_751 + Board_752 + Board_753 + Board_754 + Board_755 + Cells_62 = 1
inv : Rows_76 + Board_868 + Board_880 + Board_892 + Board_904 + Board_916 + Board_928 + Board_940 + Board_952 + Board_964 + Board_976 + Board_988 + Board_1000 = 1
inv : Board_696 + Board_697 + Board_698 + Board_699 + Board_700 + Board_701 + Board_702 + Board_703 + Board_704 + Board_705 + Board_706 + Board_707 + Cells_58 = 1
inv : Board_131 + Board_275 + Board_419 + Board_563 + Board_707 + Board_851 + Board_995 + Board_1139 + Board_1283 + Board_1427 + Board_1571 + Board_1715 + Columns_131 = 1
inv : Board_89 + Board_233 + Board_377 + Board_521 + Board_665 + Board_809 + Board_953 + Board_1097 + Board_1241 + Board_1385 + Board_1529 + Board_1673 + Columns_89 = 1
inv : Board_1224 + Board_1225 + Board_1226 + Board_1227 + Board_1228 + Board_1229 + Board_1230 + Board_1231 + Board_1232 + Board_1233 + Board_1234 + Board_1235 + Cells_102 = 1
inv : Rows_49 + Board_577 + Board_589 + Board_601 + Board_613 + Board_625 + Board_637 + Board_649 + Board_661 + Board_673 + Board_685 + Board_697 + Board_709 = 1
inv : Rows_48 + Board_576 + Board_588 + Board_600 + Board_612 + Board_624 + Board_636 + Board_648 + Board_660 + Board_672 + Board_684 + Board_696 + Board_708 = 1
inv : Rows_135 + Board_1587 + Board_1599 + Board_1611 + Board_1623 + Board_1635 + Board_1647 + Board_1659 + Board_1671 + Board_1683 + Board_1695 + Board_1707 + Board_1719 = 1
inv : Board_1176 + Board_1177 + Board_1178 + Board_1179 + Board_1180 + Board_1181 + Board_1182 + Board_1183 + Board_1184 + Board_1185 + Board_1186 + Board_1187 + Cells_98 = 1
inv : Board_20 + Board_164 + Board_308 + Board_452 + Board_596 + Board_740 + Board_884 + Board_1028 + Board_1172 + Board_1316 + Board_1460 + Board_1604 + Columns_20 = 1
inv : Board_276 + Board_277 + Board_278 + Board_279 + Board_280 + Board_281 + Board_282 + Board_283 + Board_284 + Board_285 + Board_286 + Board_287 + Cells_23 = 1
inv : Board_324 + Board_325 + Board_326 + Board_327 + Board_328 + Board_329 + Board_330 + Board_331 + Board_332 + Board_333 + Board_334 + Board_335 + Cells_27 = 1
inv : Board_30 + Board_174 + Board_318 + Board_462 + Board_606 + Board_750 + Board_894 + Board_1038 + Board_1182 + Board_1326 + Board_1470 + Board_1614 + Columns_30 = 1
inv : Board_40 + Board_184 + Board_328 + Board_472 + Board_616 + Board_760 + Board_904 + Board_1048 + Board_1192 + Board_1336 + Board_1480 + Board_1624 + Columns_40 = 1
inv : Board_1596 + Board_1597 + Board_1598 + Board_1599 + Board_1600 + Board_1601 + Board_1602 + Board_1603 + Board_1604 + Board_1605 + Board_1606 + Board_1607 + Cells_133 = 1
inv : Rows_136 + Board_1588 + Board_1600 + Board_1612 + Board_1624 + Board_1636 + Board_1648 + Board_1660 + Board_1672 + Board_1684 + Board_1696 + Board_1708 + Board_1720 = 1
inv : Board_12 + Board_13 + Board_14 + Board_15 + Board_16 + Board_17 + Board_18 + Board_19 + Board_20 + Board_21 + Board_22 + Board_23 + Cells_1 = 1
inv : Board_60 + Board_61 + Board_62 + Board_63 + Board_64 + Board_65 + Board_66 + Board_67 + Board_68 + Board_69 + Board_70 + Board_71 + Cells_5 = 1
inv : Board_29 + Board_173 + Board_317 + Board_461 + Board_605 + Board_749 + Board_893 + Board_1037 + Board_1181 + Board_1325 + Board_1469 + Board_1613 + Columns_29 = 1
inv : Rows_119 + Board_1307 + Board_1319 + Board_1331 + Board_1343 + Board_1355 + Board_1367 + Board_1379 + Board_1391 + Board_1403 + Board_1415 + Board_1427 + Board_1439 = 1
inv : Rows_109 + Board_1297 + Board_1309 + Board_1321 + Board_1333 + Board_1345 + Board_1357 + Board_1369 + Board_1381 + Board_1393 + Board_1405 + Board_1417 + Board_1429 = 1
inv : Board_540 + Board_541 + Board_542 + Board_543 + Board_544 + Board_545 + Board_546 + Board_547 + Board_548 + Board_549 + Board_550 + Board_551 + Cells_45 = 1
inv : Board_70 + Board_214 + Board_358 + Board_502 + Board_646 + Board_790 + Board_934 + Board_1078 + Board_1222 + Board_1366 + Board_1510 + Board_1654 + Columns_70 = 1
inv : Board_80 + Board_224 + Board_368 + Board_512 + Board_656 + Board_800 + Board_944 + Board_1088 + Board_1232 + Board_1376 + Board_1520 + Board_1664 + Columns_80 = 1
inv : Board_90 + Board_234 + Board_378 + Board_522 + Board_666 + Board_810 + Board_954 + Board_1098 + Board_1242 + Board_1386 + Board_1530 + Board_1674 + Columns_90 = 1
inv : Rows_75 + Board_867 + Board_879 + Board_891 + Board_903 + Board_915 + Board_927 + Board_939 + Board_951 + Board_963 + Board_975 + Board_987 + Board_999 = 1
inv : Rows_142 + Board_1594 + Board_1606 + Board_1618 + Board_1630 + Board_1642 + Board_1654 + Board_1666 + Board_1678 + Board_1690 + Board_1702 + Board_1714 + Board_1726 = 1
inv : Board_96 + Board_97 + Board_98 + Board_99 + Board_100 + Board_101 + Board_102 + Board_103 + Board_104 + Board_105 + Board_106 + Board_107 + Cells_8 = 1
inv : Rows_38 + Board_434 + Board_446 + Board_458 + Board_470 + Board_482 + Board_494 + Board_506 + Board_518 + Board_530 + Board_542 + Board_554 + Board_566 = 1
inv : Board_78 + Board_222 + Board_366 + Board_510 + Board_654 + Board_798 + Board_942 + Board_1086 + Board_1230 + Board_1374 + Board_1518 + Board_1662 + Columns_78 = 1
inv : Board_1056 + Board_1057 + Board_1058 + Board_1059 + Board_1060 + Board_1061 + Board_1062 + Board_1063 + Board_1064 + Board_1065 + Board_1066 + Board_1067 + Cells_88 = 1
inv : Board_1248 + Board_1249 + Board_1250 + Board_1251 + Board_1252 + Board_1253 + Board_1254 + Board_1255 + Board_1256 + Board_1257 + Board_1258 + Board_1259 + Cells_104 = 1
inv : Board_288 + Board_289 + Board_290 + Board_291 + Board_292 + Board_293 + Board_294 + Board_295 + Board_296 + Board_297 + Board_298 + Board_299 + Cells_24 = 1
inv : Board_141 + Board_285 + Board_429 + Board_573 + Board_717 + Board_861 + Board_1005 + Board_1149 + Board_1293 + Board_1437 + Board_1581 + Board_1725 + Columns_141 = 1
inv : Board_36 + Board_180 + Board_324 + Board_468 + Board_612 + Board_756 + Board_900 + Board_1044 + Board_1188 + Board_1332 + Board_1476 + Board_1620 + Columns_36 = 1
inv : Rows_61 + Board_721 + Board_733 + Board_745 + Board_757 + Board_769 + Board_781 + Board_793 + Board_805 + Board_817 + Board_829 + Board_841 + Board_853 = 1
inv : Board_74 + Board_218 + Board_362 + Board_506 + Board_650 + Board_794 + Board_938 + Board_1082 + Board_1226 + Board_1370 + Board_1514 + Board_1658 + Columns_74 = 1
inv : Rows_65 + Board_725 + Board_737 + Board_749 + Board_761 + Board_773 + Board_785 + Board_797 + Board_809 + Board_821 + Board_833 + Board_845 + Board_857 = 1
inv : Rows_83 + Board_875 + Board_887 + Board_899 + Board_911 + Board_923 + Board_935 + Board_947 + Board_959 + Board_971 + Board_983 + Board_995 + Board_1007 = 1
inv : Rows_115 + Board_1303 + Board_1315 + Board_1327 + Board_1339 + Board_1351 + Board_1363 + Board_1375 + Board_1387 + Board_1399 + Board_1411 + Board_1423 + Board_1435 = 1
inv : Board_1440 + Board_1441 + Board_1442 + Board_1443 + Board_1444 + Board_1445 + Board_1446 + Board_1447 + Board_1448 + Board_1449 + Board_1450 + Board_1451 + Cells_120 = 1
inv : Board_103 + Board_247 + Board_391 + Board_535 + Board_679 + Board_823 + Board_967 + Board_1111 + Board_1255 + Board_1399 + Board_1543 + Board_1687 + Columns_103 = 1
inv : Board_204 + Board_205 + Board_206 + Board_207 + Board_208 + Board_209 + Board_210 + Board_211 + Board_212 + Board_213 + Board_214 + Board_215 + Cells_17 = 1
inv : Board_1548 + Board_1549 + Board_1550 + Board_1551 + Board_1552 + Board_1553 + Board_1554 + Board_1555 + Board_1556 + Board_1557 + Board_1558 + Board_1559 + Cells_129 = 1
inv : Board_1140 + Board_1141 + Board_1142 + Board_1143 + Board_1144 + Board_1145 + Board_1146 + Board_1147 + Board_1148 + Board_1149 + Board_1150 + Board_1151 + Cells_95 = 1
inv : Rows_97 + Board_1153 + Board_1165 + Board_1177 + Board_1189 + Board_1201 + Board_1213 + Board_1225 + Board_1237 + Board_1249 + Board_1261 + Board_1273 + Board_1285 = 1
inv : Board_61 + Board_205 + Board_349 + Board_493 + Board_637 + Board_781 + Board_925 + Board_1069 + Board_1213 + Board_1357 + Board_1501 + Board_1645 + Columns_61 = 1
inv : Rows_111 + Board_1299 + Board_1311 + Board_1323 + Board_1335 + Board_1347 + Board_1359 + Board_1371 + Board_1383 + Board_1395 + Board_1407 + Board_1419 + Board_1431 = 1
inv : Board_1164 + Board_1165 + Board_1166 + Board_1167 + Board_1168 + Board_1169 + Board_1170 + Board_1171 + Board_1172 + Board_1173 + Board_1174 + Board_1175 + Cells_97 = 1
inv : Rows_29 + Board_293 + Board_305 + Board_317 + Board_329 + Board_341 + Board_353 + Board_365 + Board_377 + Board_389 + Board_401 + Board_413 + Board_425 = 1
inv : Rows_84 + Board_1008 + Board_1020 + Board_1032 + Board_1044 + Board_1056 + Board_1068 + Board_1080 + Board_1092 + Board_1104 + Board_1116 + Board_1128 + Board_1140 = 1
inv : Rows_124 + Board_1444 + Board_1456 + Board_1468 + Board_1480 + Board_1492 + Board_1504 + Board_1516 + Board_1528 + Board_1540 + Board_1552 + Board_1564 + Board_1576 = 1
inv : Board_116 + Board_260 + Board_404 + Board_548 + Board_692 + Board_836 + Board_980 + Board_1124 + Board_1268 + Board_1412 + Board_1556 + Board_1700 + Columns_116 = 1
inv : Board_23 + Board_167 + Board_311 + Board_455 + Board_599 + Board_743 + Board_887 + Board_1031 + Board_1175 + Board_1319 + Board_1463 + Board_1607 + Columns_23 = 1
inv : Rows_92 + Board_1016 + Board_1028 + Board_1040 + Board_1052 + Board_1064 + Board_1076 + Board_1088 + Board_1100 + Board_1112 + Board_1124 + Board_1136 + Board_1148 = 1
inv : Rows_129 + Board_1449 + Board_1461 + Board_1473 + Board_1485 + Board_1497 + Board_1509 + Board_1521 + Board_1533 + Board_1545 + Board_1557 + Board_1569 + Board_1581 = 1
inv : Board_72 + Board_73 + Board_74 + Board_75 + Board_76 + Board_77 + Board_78 + Board_79 + Board_80 + Board_81 + Board_82 + Board_83 + Cells_6 = 1
inv : Board_504 + Board_505 + Board_506 + Board_507 + Board_508 + Board_509 + Board_510 + Board_511 + Board_512 + Board_513 + Board_514 + Board_515 + Cells_42 = 1
inv : Board_840 + Board_841 + Board_842 + Board_843 + Board_844 + Board_845 + Board_846 + Board_847 + Board_848 + Board_849 + Board_850 + Board_851 + Cells_70 = 1
inv : Rows_25 + Board_289 + Board_301 + Board_313 + Board_325 + Board_337 + Board_349 + Board_361 + Board_373 + Board_385 + Board_397 + Board_409 + Board_421 = 1
inv : Board_1656 + Board_1657 + Board_1658 + Board_1659 + Board_1660 + Board_1661 + Board_1662 + Board_1663 + Board_1664 + Board_1665 + Board_1666 + Board_1667 + Cells_138 = 1
inv : Rows_47 + Board_443 + Board_455 + Board_467 + Board_479 + Board_491 + Board_503 + Board_515 + Board_527 + Board_539 + Board_551 + Board_563 + Board_575 = 1
inv : Rows_52 + Board_580 + Board_592 + Board_604 + Board_616 + Board_628 + Board_640 + Board_652 + Board_664 + Board_676 + Board_688 + Board_700 + Board_712 = 1
inv : Board_1032 + Board_1033 + Board_1034 + Board_1035 + Board_1036 + Board_1037 + Board_1038 + Board_1039 + Board_1040 + Board_1041 + Board_1042 + Board_1043 + Cells_86 = 1
inv : Board_312 + Board_313 + Board_314 + Board_315 + Board_316 + Board_317 + Board_318 + Board_319 + Board_320 + Board_321 + Board_322 + Board_323 + Cells_26 = 1
inv : Board_87 + Board_231 + Board_375 + Board_519 + Board_663 + Board_807 + Board_951 + Board_1095 + Board_1239 + Board_1383 + Board_1527 + Board_1671 + Columns_87 = 1
inv : Board_107 + Board_251 + Board_395 + Board_539 + Board_683 + Board_827 + Board_971 + Board_1115 + Board_1259 + Board_1403 + Board_1547 + Board_1691 + Columns_107 = 1
inv : Board_112 + Board_256 + Board_400 + Board_544 + Board_688 + Board_832 + Board_976 + Board_1120 + Board_1264 + Board_1408 + Board_1552 + Board_1696 + Columns_112 = 1
inv : Board_396 + Board_397 + Board_398 + Board_399 + Board_400 + Board_401 + Board_402 + Board_403 + Board_404 + Board_405 + Board_406 + Board_407 + Cells_33 = 1
inv : Board_132 + Board_276 + Board_420 + Board_564 + Board_708 + Board_852 + Board_996 + Board_1140 + Board_1284 + Board_1428 + Board_1572 + Board_1716 + Columns_132 = 1
inv : Rows_70 + Board_730 + Board_742 + Board_754 + Board_766 + Board_778 + Board_790 + Board_802 + Board_814 + Board_826 + Board_838 + Board_850 + Board_862 = 1
inv : Board_180 + Board_181 + Board_182 + Board_183 + Board_184 + Board_185 + Board_186 + Board_187 + Board_188 + Board_189 + Board_190 + Board_191 + Cells_15 = 1
inv : Rows_43 + Board_439 + Board_451 + Board_463 + Board_475 + Board_487 + Board_499 + Board_511 + Board_523 + Board_535 + Board_547 + Board_559 + Board_571 = 1
inv : Rows_56 + Board_584 + Board_596 + Board_608 + Board_620 + Board_632 + Board_644 + Board_656 + Board_668 + Board_680 + Board_692 + Board_704 + Board_716 = 1
inv : Board_420 + Board_421 + Board_422 + Board_423 + Board_424 + Board_425 + Board_426 + Board_427 + Board_428 + Board_429 + Board_430 + Board_431 + Cells_35 = 1
inv : Board_924 + Board_925 + Board_926 + Board_927 + Board_928 + Board_929 + Board_930 + Board_931 + Board_932 + Board_933 + Board_934 + Board_935 + Cells_77 = 1
inv : Board_7 + Board_151 + Board_295 + Board_439 + Board_583 + Board_727 + Board_871 + Board_1015 + Board_1159 + Board_1303 + Board_1447 + Board_1591 + Columns_7 = 1
inv : Board_27 + Board_171 + Board_315 + Board_459 + Board_603 + Board_747 + Board_891 + Board_1035 + Board_1179 + Board_1323 + Board_1467 + Board_1611 + Columns_27 = 1
inv : Rows_138 + Board_1590 + Board_1602 + Board_1614 + Board_1626 + Board_1638 + Board_1650 + Board_1662 + Board_1674 + Board_1686 + Board_1698 + Board_1710 + Board_1722 = 1
inv : Rows_133 + Board_1585 + Board_1597 + Board_1609 + Board_1621 + Board_1633 + Board_1645 + Board_1657 + Board_1669 + Board_1681 + Board_1693 + Board_1705 + Board_1717 = 1
inv : Rows_120 + Board_1440 + Board_1452 + Board_1464 + Board_1476 + Board_1488 + Board_1500 + Board_1512 + Board_1524 + Board_1536 + Board_1548 + Board_1560 + Board_1572 = 1
inv : Board_52 + Board_196 + Board_340 + Board_484 + Board_628 + Board_772 + Board_916 + Board_1060 + Board_1204 + Board_1348 + Board_1492 + Board_1636 + Columns_52 = 1
inv : Board_948 + Board_949 + Board_950 + Board_951 + Board_952 + Board_953 + Board_954 + Board_955 + Board_956 + Board_957 + Board_958 + Board_959 + Cells_79 = 1
inv : Board_816 + Board_817 + Board_818 + Board_819 + Board_820 + Board_821 + Board_822 + Board_823 + Board_824 + Board_825 + Board_826 + Board_827 + Cells_68 = 1
inv : Board_32 + Board_176 + Board_320 + Board_464 + Board_608 + Board_752 + Board_896 + Board_1040 + Board_1184 + Board_1328 + Board_1472 + Board_1616 + Columns_32 = 1
inv : Rows_9 + Board_9 + Board_21 + Board_33 + Board_45 + Board_57 + Board_69 + Board_81 + Board_93 + Board_105 + Board_117 + Board_129 + Board_141 = 1
inv : Board_56 + Board_200 + Board_344 + Board_488 + Board_632 + Board_776 + Board_920 + Board_1064 + Board_1208 + Board_1352 + Board_1496 + Board_1640 + Columns_56 = 1
inv : Board_16 + Board_160 + Board_304 + Board_448 + Board_592 + Board_736 + Board_880 + Board_1024 + Board_1168 + Board_1312 + Board_1456 + Board_1600 + Columns_16 = 1
inv : Board_1680 + Board_1681 + Board_1682 + Board_1683 + Board_1684 + Board_1685 + Board_1686 + Board_1687 + Board_1688 + Board_1689 + Board_1690 + Board_1691 + Cells_140 = 1
inv : Rows_11 + Board_11 + Board_23 + Board_35 + Board_47 + Board_59 + Board_71 + Board_83 + Board_95 + Board_107 + Board_119 + Board_131 + Board_143 = 1
inv : Board_14 + Board_158 + Board_302 + Board_446 + Board_590 + Board_734 + Board_878 + Board_1022 + Board_1166 + Board_1310 + Board_1454 + Board_1598 + Columns_14 = 1
inv : Board_54 + Board_198 + Board_342 + Board_486 + Board_630 + Board_774 + Board_918 + Board_1062 + Board_1206 + Board_1350 + Board_1494 + Board_1638 + Columns_54 = 1
inv : Board_123 + Board_267 + Board_411 + Board_555 + Board_699 + Board_843 + Board_987 + Board_1131 + Board_1275 + Board_1419 + Board_1563 + Board_1707 + Columns_123 = 1
inv : Board_1572 + Board_1573 + Board_1574 + Board_1575 + Board_1576 + Board_1577 + Board_1578 + Board_1579 + Board_1580 + Board_1581 + Board_1582 + Board_1583 + Cells_131 = 1
inv : Board_720 + Board_721 + Board_722 + Board_723 + Board_724 + Board_725 + Board_726 + Board_727 + Board_728 + Board_729 + Board_730 + Board_731 + Cells_60 = 1
inv : Board_612 + Board_613 + Board_614 + Board_615 + Board_616 + Board_617 + Board_618 + Board_619 + Board_620 + Board_621 + Board_622 + Board_623 + Cells_51 = 1
inv : Board_732 + Board_733 + Board_734 + Board_735 + Board_736 + Board_737 + Board_738 + Board_739 + Board_740 + Board_741 + Board_742 + Board_743 + Cells_61 = 1
inv : Board_83 + Board_227 + Board_371 + Board_515 + Board_659 + Board_803 + Board_947 + Board_1091 + Board_1235 + Board_1379 + Board_1523 + Board_1667 + Columns_83 = 1
inv : Board_516 + Board_517 + Board_518 + Board_519 + Board_520 + Board_521 + Board_522 + Board_523 + Board_524 + Board_525 + Board_526 + Board_527 + Cells_43 = 1
inv : Board_134 + Board_278 + Board_422 + Board_566 + Board_710 + Board_854 + Board_998 + Board_1142 + Board_1286 + Board_1430 + Board_1574 + Board_1718 + Columns_134 = 1
inv : Board_94 + Board_238 + Board_382 + Board_526 + Board_670 + Board_814 + Board_958 + Board_1102 + Board_1246 + Board_1390 + Board_1534 + Board_1678 + Columns_94 = 1
inv : Board_136 + Board_280 + Board_424 + Board_568 + Board_712 + Board_856 + Board_1000 + Board_1144 + Board_1288 + Board_1432 + Board_1576 + Board_1720 + Columns_136 = 1
inv : Board_43 + Board_187 + Board_331 + Board_475 + Board_619 + Board_763 + Board_907 + Board_1051 + Board_1195 + Board_1339 + Board_1483 + Board_1627 + Columns_43 = 1
inv : Board_96 + Board_240 + Board_384 + Board_528 + Board_672 + Board_816 + Board_960 + Board_1104 + Board_1248 + Board_1392 + Board_1536 + Board_1680 + Columns_96 = 1
inv : Rows_18 + Board_150 + Board_162 + Board_174 + Board_186 + Board_198 + Board_210 + Board_222 + Board_234 + Board_246 + Board_258 + Board_270 + Board_282 = 1
inv : Board_1668 + Board_1669 + Board_1670 + Board_1671 + Board_1672 + Board_1673 + Board_1674 + Board_1675 + Board_1676 + Board_1677 + Board_1678 + Board_1679 + Cells_139 = 1
inv : Board_624 + Board_625 + Board_626 + Board_627 + Board_628 + Board_629 + Board_630 + Board_631 + Board_632 + Board_633 + Board_634 + Board_635 + Cells_52 = 1
inv : Board_3 + Board_147 + Board_291 + Board_435 + Board_579 + Board_723 + Board_867 + Board_1011 + Board_1155 + Board_1299 + Board_1443 + Board_1587 + Columns_3 = 1
inv : Board_25 + Board_169 + Board_313 + Board_457 + Board_601 + Board_745 + Board_889 + Board_1033 + Board_1177 + Board_1321 + Board_1465 + Board_1609 + Columns_25 = 1
inv : Board_408 + Board_409 + Board_410 + Board_411 + Board_412 + Board_413 + Board_414 + Board_415 + Board_416 + Board_417 + Board_418 + Board_419 + Cells_34 = 1
inv : Board_1464 + Board_1465 + Board_1466 + Board_1467 + Board_1468 + Board_1469 + Board_1470 + Board_1471 + Board_1472 + Board_1473 + Board_1474 + Board_1475 + Cells_122 = 1
inv : Board_45 + Board_189 + Board_333 + Board_477 + Board_621 + Board_765 + Board_909 + Board_1053 + Board_1197 + Board_1341 + Board_1485 + Board_1629 + Columns_45 = 1
inv : Board_936 + Board_937 + Board_938 + Board_939 + Board_940 + Board_941 + Board_942 + Board_943 + Board_944 + Board_945 + Board_946 + Board_947 + Cells_78 = 1
inv : Board_65 + Board_209 + Board_353 + Board_497 + Board_641 + Board_785 + Board_929 + Board_1073 + Board_1217 + Board_1361 + Board_1505 + Board_1649 + Columns_65 = 1
inv : Rows_79 + Board_871 + Board_883 + Board_895 + Board_907 + Board_919 + Board_931 + Board_943 + Board_955 + Board_967 + Board_979 + Board_991 + Board_1003 = 1
inv : Rows_27 + Board_291 + Board_303 + Board_315 + Board_327 + Board_339 + Board_351 + Board_363 + Board_375 + Board_387 + Board_399 + Board_411 + Board_423 = 1
inv : Rows_2 + Board_2 + Board_14 + Board_26 + Board_38 + Board_50 + Board_62 + Board_74 + Board_86 + Board_98 + Board_110 + Board_122 + Board_134 = 1
inv : Board_5 + Board_149 + Board_293 + Board_437 + Board_581 + Board_725 + Board_869 + Board_1013 + Board_1157 + Board_1301 + Board_1445 + Board_1589 + Columns_5 = 1
inv : Rows_20 + Board_152 + Board_164 + Board_176 + Board_188 + Board_200 + Board_212 + Board_224 + Board_236 + Board_248 + Board_260 + Board_272 + Board_284 = 1
inv : Rows_45 + Board_441 + Board_453 + Board_465 + Board_477 + Board_489 + Board_501 + Board_513 + Board_525 + Board_537 + Board_549 + Board_561 + Board_573 = 1
inv : Board_300 + Board_301 + Board_302 + Board_303 + Board_304 + Board_305 + Board_306 + Board_307 + Board_308 + Board_309 + Board_310 + Board_311 + Cells_25 = 1
inv : Board_828 + Board_829 + Board_830 + Board_831 + Board_832 + Board_833 + Board_834 + Board_835 + Board_836 + Board_837 + Board_838 + Board_839 + Cells_69 = 1
inv : Rows_122 + Board_1442 + Board_1454 + Board_1466 + Board_1478 + Board_1490 + Board_1502 + Board_1514 + Board_1526 + Board_1538 + Board_1550 + Board_1562 + Board_1574 = 1
inv : Rows_54 + Board_582 + Board_594 + Board_606 + Board_618 + Board_630 + Board_642 + Board_654 + Board_666 + Board_678 + Board_690 + Board_702 + Board_714 = 1
inv : Board_1356 + Board_1357 + Board_1358 + Board_1359 + Board_1360 + Board_1361 + Board_1362 + Board_1363 + Board_1364 + Board_1365 + Board_1366 + Board_1367 + Cells_113 = 1
inv : Board_85 + Board_229 + Board_373 + Board_517 + Board_661 + Board_805 + Board_949 + Board_1093 + Board_1237 + Board_1381 + Board_1525 + Board_1669 + Columns_85 = 1
inv : Rows_106 + Board_1162 + Board_1174 + Board_1186 + Board_1198 + Board_1210 + Board_1222 + Board_1234 + Board_1246 + Board_1258 + Board_1270 + Board_1282 + Board_1294 = 1
inv : Rows_88 + Board_1012 + Board_1024 + Board_1036 + Board_1048 + Board_1060 + Board_1072 + Board_1084 + Board_1096 + Board_1108 + Board_1120 + Board_1132 + Board_1144 = 1
inv : Board_105 + Board_249 + Board_393 + Board_537 + Board_681 + Board_825 + Board_969 + Board_1113 + Board_1257 + Board_1401 + Board_1545 + Board_1689 + Columns_105 = 1
inv : Board_125 + Board_269 + Board_413 + Board_557 + Board_701 + Board_845 + Board_989 + Board_1133 + Board_1277 + Board_1421 + Board_1565 + Board_1709 + Columns_125 = 1
Total of 432 invariants.
[2021-05-17 01:04:01] [INFO ] Computed 432 place invariants in 13 ms
[2021-05-17 01:04:05] [INFO ] Proved 2160 variables to be positive in 4280 ms
[2021-05-17 01:04:06] [INFO ] Induction result is SAT, non conclusive we might be starting from unreachable statesSudoku-COL-AN12-ReachabilityCardinality-12
[2021-05-17 01:04:06] [INFO ] KInduction solution for property Sudoku-COL-AN12-ReachabilityCardinality-12(SAT) depth K=0 took 695 ms
[2021-05-17 01:04:08] [INFO ] Induction result is SAT, non conclusive we might be starting from unreachable statesSudoku-COL-AN12-ReachabilityCardinality-12
[2021-05-17 01:04:08] [INFO ] KInduction solution for property Sudoku-COL-AN12-ReachabilityCardinality-12(SAT) depth K=1 took 1438 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph8824161857640773565.txt, -o, /tmp/graph8824161857640773565.bin, -w, /tmp/graph8824161857640773565.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph8824161857640773565.bin, -l, -1, -v, -w, /tmp/graph8824161857640773565.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-17 01:04:10] [INFO ] Decomposing Gal with order
[2021-05-17 01:04:10] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-17 01:04:15] [INFO ] Flatten gal took : 5081 ms
[2021-05-17 01:04:15] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 7 ms.
[2021-05-17 01:04:20] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality823675133472315753.gal : 773 ms
[2021-05-17 01:04:20] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality5932086965491799238.prop : 5 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/ReachabilityCardinality823675133472315753.gal, -t, CGAL, -reachable-file, /tmp/ReachabilityCardinality5932086965491799238.prop, --nowitness, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /tmp/ReachabilityCardinality823675133472315753.gal -t CGAL -reachable-file /tmp/ReachabilityCardinality5932086965491799238.prop --nowitness --gen-order FOLLOW
Compilation finished in 21244 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/tmp/ltsmin15486117340763249804]
Link finished in 54 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/pins2lts-mc-linux64, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, SudokuCOLAN12ReachabilityCardinality12==true], workingDir=/tmp/ltsmin15486117340763249804]
Loading property file /tmp/ReachabilityCardinality5932086965491799238.prop.
SDD proceeding with computation,1 properties remain. new max is 4
SDD size :1 after 167
SDD proceeding with computation,1 properties remain. new max is 8
SDD size :167 after 4051
pins2lts-mc-linux64, 0.000: Registering PINS so language module
pins2lts-mc-linux64( 7/ 8), 0.012: library has no initializer
pins2lts-mc-linux64( 7/ 8), 0.012: loading model GAL
pins2lts-mc-linux64( 3/ 8), 0.012: library has no initializer
pins2lts-mc-linux64( 3/ 8), 0.012: loading model GAL
pins2lts-mc-linux64( 0/ 8), 0.019: Loading model from ./gal.so
pins2lts-mc-linux64( 0/ 8), 0.019: library has no initializer
pins2lts-mc-linux64( 0/ 8), 0.019: loading model GAL
pins2lts-mc-linux64( 2/ 8), 0.031: library has no initializer
pins2lts-mc-linux64( 4/ 8), 0.031: library has no initializer
pins2lts-mc-linux64( 4/ 8), 0.032: loading model GAL
pins2lts-mc-linux64( 5/ 8), 0.032: library has no initializer
pins2lts-mc-linux64( 5/ 8), 0.032: loading model GAL
pins2lts-mc-linux64( 1/ 8), 0.032: library has no initializer
pins2lts-mc-linux64( 1/ 8), 0.032: loading model GAL
pins2lts-mc-linux64( 6/ 8), 0.032: library has no initializer
pins2lts-mc-linux64( 6/ 8), 0.032: loading model GAL
pins2lts-mc-linux64( 2/ 8), 0.031: loading model GAL
pins2lts-mc-linux64( 7/ 8), 0.094: completed loading model GAL
pins2lts-mc-linux64( 3/ 8), 0.097: completed loading model GAL
pins2lts-mc-linux64( 0/ 8), 0.105: completed loading model GAL
pins2lts-mc-linux64( 0/ 8), 0.105: Initializing POR dependencies: labels 1729, guards 1728
pins2lts-mc-linux64( 4/ 8), 0.108: completed loading model GAL
pins2lts-mc-linux64( 1/ 8), 0.136: completed loading model GAL
pins2lts-mc-linux64( 5/ 8), 0.137: completed loading model GAL
pins2lts-mc-linux64( 6/ 8), 0.168: completed loading model GAL
pins2lts-mc-linux64( 2/ 8), 0.172: completed loading model GAL
pins2lts-mc-linux64( 7/ 8), 60.491: No maybe-coenabled matrix found. Turning off NESs from NDS+MC.
pins2lts-mc-linux64( 0/ 8), 263.951: Forcing use of the an ignoring proviso (closed-set)
pins2lts-mc-linux64( 2/ 8), 264.452: "SudokuCOLAN12ReachabilityCardinality12==true" is not a file, parsing as formula...
pins2lts-mc-linux64( 3/ 8), 264.464: "SudokuCOLAN12ReachabilityCardinality12==true" is not a file, parsing as formula...
pins2lts-mc-linux64( 4/ 8), 264.453: "SudokuCOLAN12ReachabilityCardinality12==true" is not a file, parsing as formula...
pins2lts-mc-linux64( 1/ 8), 264.453: "SudokuCOLAN12ReachabilityCardinality12==true" is not a file, parsing as formula...
pins2lts-mc-linux64( 6/ 8), 264.453: "SudokuCOLAN12ReachabilityCardinality12==true" is not a file, parsing as formula...
pins2lts-mc-linux64( 0/ 8), 264.461: "SudokuCOLAN12ReachabilityCardinality12==true" is not a file, parsing as formula...
pins2lts-mc-linux64( 5/ 8), 264.453: "SudokuCOLAN12ReachabilityCardinality12==true" is not a file, parsing as formula...
pins2lts-mc-linux64( 7/ 8), 264.465: "SudokuCOLAN12ReachabilityCardinality12==true" is not a file, parsing as formula...
pins2lts-mc-linux64( 0/ 8), 264.510: There are 1729 state labels and 1 edge labels
pins2lts-mc-linux64( 0/ 8), 264.510: State length is 2160, there are 1728 groups
pins2lts-mc-linux64( 0/ 8), 264.510: Running bfs using 8 cores
pins2lts-mc-linux64( 0/ 8), 264.510: Using a non-indexing tree table with 2^27 elements
pins2lts-mc-linux64( 0/ 8), 264.510: Successor permutation: none
pins2lts-mc-linux64( 0/ 8), 264.510: Visible groups: 1728 / 1728, labels: 1 / 1729
pins2lts-mc-linux64( 0/ 8), 264.510: POR cycle proviso: closed-set
pins2lts-mc-linux64( 0/ 8), 264.510: Global bits: 0, count bits: 0, local bits: 0
pins2lts-mc-linux64( 0/ 8), 325.106: ~2 levels ~960 states ~1626512 transitions
pins2lts-mc-linux64( 4/ 8), 384.127: ~1 levels ~1920 states ~3246464 transitions
pins2lts-mc-linux64( 4/ 8), 499.994: ~1 levels ~3840 states ~6434144 transitions
pins2lts-mc-linux64( 5/ 8), 665.446: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc-linux64( 0/ 8), 722.048:
pins2lts-mc-linux64( 0/ 8), 722.048: mean standard work distribution: 0.7% (states) 0.7% (transitions)
pins2lts-mc-linux64( 0/ 8), 722.048:
pins2lts-mc-linux64( 0/ 8), 722.048: Explored 6444 states 10757766 transitions, fanout: 1669.424
pins2lts-mc-linux64( 0/ 8), 722.048: Total exploration time 457.520 sec (406.850 sec minimum, 438.190 sec on average)
pins2lts-mc-linux64( 0/ 8), 722.048: States per second: 14, Transitions per second: 23513
pins2lts-mc-linux64( 0/ 8), 722.048: Ignoring proviso: 0
pins2lts-mc-linux64( 0/ 8), 722.048:
pins2lts-mc-linux64( 0/ 8), 722.048: Queue width: 8B, total height: 8147996, memory: 62.16MB
pins2lts-mc-linux64( 0/ 8), 722.048: Tree memory: 318.4MB, 40.8 B/state, compr.: 0.5%
pins2lts-mc-linux64( 0/ 8), 722.048: Tree fill ratio (roots/leafs): 6.0%/100.0%
pins2lts-mc-linux64( 0/ 8), 722.048: Stored 1755 string chucks using 0MB
pins2lts-mc-linux64( 0/ 8), 722.048: Total memory used for chunk indexing: 0MB
pins2lts-mc-linux64( 0/ 8), 722.048: Est. total memory use: 380.6MB (~1086.2MB paged-in)
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/pins2lts-mc-linux64, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, SudokuCOLAN12ReachabilityCardinality12==true], workingDir=/tmp/ltsmin15486117340763249804]
255
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/pins2lts-mc-linux64, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, SudokuCOLAN12ReachabilityCardinality12==true], workingDir=/tmp/ltsmin15486117340763249804]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:214)
at fr.lip6.move.gal.application.LTSminRunner.access$10(LTSminRunner.java:165)
at fr.lip6.move.gal.application.LTSminRunner$1.checkProperties(LTSminRunner.java:154)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.base/java.lang.Thread.run(Thread.java:834)
Detected timeout of ITS tools.
[2021-05-17 01:26:21] [INFO ] Applying decomposition
[2021-05-17 01:26:22] [INFO ] Flatten gal took : 979 ms
[2021-05-17 01:26:22] [INFO ] Decomposing Gal with order
[2021-05-17 01:26:22] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-17 01:26:23] [INFO ] Removed a total of 4188 redundant transitions.
[2021-05-17 01:26:24] [INFO ] Flatten gal took : 589 ms
[2021-05-17 01:26:24] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 43 ms.
[2021-05-17 01:26:38] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality7096348711307202195.gal : 14555 ms
[2021-05-17 01:26:40] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality8567420855145829962.prop : 5 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/ReachabilityCardinality7096348711307202195.gal, -t, CGAL, -reachable-file, /tmp/ReachabilityCardinality8567420855145829962.prop, --nowitness, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /tmp/ReachabilityCardinality7096348711307202195.gal -t CGAL -reachable-file /tmp/ReachabilityCardinality8567420855145829962.prop --nowitness --gen-order FOLLOW
Loading property file /tmp/ReachabilityCardinality8567420855145829962.prop.
SDD proceeding with computation,1 properties remain. new max is 4
SDD size :1 after 94
SDD proceeding with computation,1 properties remain. new max is 8
SDD size :94 after 2548
SDD proceeding with computation,1 properties remain. new max is 16
SDD size :2548 after 1.10524e+06
Detected timeout of ITS tools.
[2021-05-17 01:48:36] [INFO ] Flatten gal took : 883 ms
[2021-05-17 01:48:36] [INFO ] Input system was already deterministic with 1728 transitions.
[2021-05-17 01:48:36] [INFO ] Transformed 2160 places.
[2021-05-17 01:48:36] [INFO ] Transformed 1728 transitions.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit/bin//..//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit/bin//..//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
[2021-05-17 01:48:37] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality7738898150523053468.gal : 50 ms
[2021-05-17 01:48:37] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality11857053179436745360.prop : 4 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/ReachabilityCardinality7738898150523053468.gal, -t, CGAL, -reachable-file, /tmp/ReachabilityCardinality11857053179436745360.prop, --nowitness, --load-order, /home/mcc/execution/model.ord, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /tmp/ReachabilityCardinality7738898150523053468.gal -t CGAL -reachable-file /tmp/ReachabilityCardinality11857053179436745360.prop --nowitness --load-order /home/mcc/execution/model.ord --gen-order FOLLOW
Successfully loaded order from file /home/mcc/execution/model.ord
Loading property file /tmp/ReachabilityCardinality11857053179436745360.prop.
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit/bin//..//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ cut -d . -f 9
++ ls /home/mcc/BenchKit/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202104292328.jar
+ VERSION=0
+ echo 'Running Version 0'
+ /home/mcc/BenchKit/bin//..//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -spotpath /home/mcc/BenchKit/bin//..//ltlfilt -z3path /home/mcc/BenchKit/bin//..//z3/bin/z3 -yices2path /home/mcc/BenchKit/bin//..//yices/bin/yices -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Sudoku-COL-AN12"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is Sudoku-COL-AN12, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r254-tall-162106746100486"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Sudoku-COL-AN12.tgz
mv Sudoku-COL-AN12 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;