fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r235-smll-162106564800346
Last Updated
Jun 28, 2021

About the Execution of ITS-Tools for ShieldRVt-PT-100B

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16235.000 3600000.00 3663764.00 17571.10 [undef] Time out reached

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r235-smll-162106564800346.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2021-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is ShieldRVt-PT-100B, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r235-smll-162106564800346
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.6M
-rw-r--r-- 1 mcc users 15K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 130K May 10 09:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 90K May 10 09:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Mar 28 16:41 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Mar 28 16:41 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Mar 28 16:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 28 16:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Mar 27 13:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Mar 27 13:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 25 19:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 25 19:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 08:16 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Mar 22 08:16 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:52 equiv_col
-rw-r--r-- 1 mcc users 5 May 5 16:52 instance
-rw-r--r-- 1 mcc users 6 May 5 16:52 iscolored
-rw-r--r-- 1 mcc users 1.3M May 5 16:52 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-00
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-01
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-02
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-03
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-04
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-05
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-06
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-07
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-08
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-09
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-10
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-11
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-12
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-13
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-14
FORMULA_NAME ShieldRVt-PT-100B-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1621296579103

Running Version 0
[2021-05-18 00:09:42] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -spotpath, /home/mcc/BenchKit/bin//..//ltlfilt, -z3path, /home/mcc/BenchKit/bin//..//z3/bin/z3, -yices2path, /home/mcc/BenchKit/bin//..//yices/bin/yices, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2021-05-18 00:09:42] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2021-05-18 00:09:43] [INFO ] Load time of PNML (sax parser for PT used): 719 ms
[2021-05-18 00:09:43] [INFO ] Transformed 5003 places.
[2021-05-18 00:09:43] [INFO ] Transformed 5003 transitions.
[2021-05-18 00:09:43] [INFO ] Found NUPN structural information;
[2021-05-18 00:09:43] [INFO ] Parsed PT model containing 5003 places and 5003 transitions in 1035 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 25 ms.
Support contains 733 out of 5003 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 5003/5003 places, 5003/5003 transitions.
Discarding 878 places :
Symmetric choice reduction at 0 with 878 rule applications. Total rules 878 place count 4125 transition count 4125
Iterating global reduction 0 with 878 rules applied. Total rules applied 1756 place count 4125 transition count 4125
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1757 place count 4124 transition count 4124
Iterating global reduction 0 with 1 rules applied. Total rules applied 1758 place count 4124 transition count 4124
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1759 place count 4123 transition count 4123
Iterating global reduction 0 with 1 rules applied. Total rules applied 1760 place count 4123 transition count 4123
Applied a total of 1760 rules in 3681 ms. Remains 4123 /5003 variables (removed 880) and now considering 4123/5003 (removed 880) transitions.
// Phase 1: matrix 4123 rows 4123 cols
[2021-05-18 00:09:47] [INFO ] Computed 401 place invariants in 87 ms
[2021-05-18 00:09:48] [INFO ] Implicit Places using invariants in 1336 ms returned []
// Phase 1: matrix 4123 rows 4123 cols
[2021-05-18 00:09:48] [INFO ] Computed 401 place invariants in 42 ms
[2021-05-18 00:09:50] [INFO ] Implicit Places using invariants and state equation in 2214 ms returned []
Implicit Place search using SMT with State Equation took 3606 ms to find 0 implicit places.
// Phase 1: matrix 4123 rows 4123 cols
[2021-05-18 00:09:51] [INFO ] Computed 401 place invariants in 32 ms
[2021-05-18 00:09:56] [INFO ] Dead Transitions using invariants and state equation in 5047 ms returned []
Finished structural reductions, in 1 iterations. Remains : 4123/5003 places, 4123/5003 transitions.
[2021-05-18 00:09:57] [INFO ] Flatten gal took : 535 ms
[2021-05-18 00:09:57] [INFO ] Flatten gal took : 305 ms
[2021-05-18 00:09:58] [INFO ] Input system was already deterministic with 4123 transitions.
Incomplete random walk after 100000 steps, including 3 resets, run finished after 3013 ms. (steps per millisecond=33 ) properties (out of 84) seen :62
Running SMT prover for 22 properties.
// Phase 1: matrix 4123 rows 4123 cols
[2021-05-18 00:10:01] [INFO ] Computed 401 place invariants in 14 ms
[2021-05-18 00:10:05] [INFO ] [Real]Absence check using 401 positive place invariants in 548 ms returned sat
[2021-05-18 00:10:05] [INFO ] SMT Verify possible in real domain returnedunsat :0 sat :0 real:22
[2021-05-18 00:10:09] [INFO ] [Nat]Absence check using 401 positive place invariants in 520 ms returned sat
[2021-05-18 00:10:11] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2021-05-18 00:10:25] [INFO ] [Nat]Absence check using state equation in 13739 ms returned unsat :0 sat :22
Attempting to minimize the solution found.
Minimization took 10249 ms.
[2021-05-18 00:10:35] [INFO ] SMT Verify possible in nat domain returned unsat :0 sat :22
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 1099 transitions
Trivial Post-agglo rules discarded 1099 transitions
Performed 1099 trivial Post agglomeration. Transition count delta: 1099
Iterating post reduction 0 with 1099 rules applied. Total rules applied 1099 place count 4122 transition count 3023
Reduce places removed 1099 places and 0 transitions.
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Iterating post reduction 1 with 1104 rules applied. Total rules applied 2203 place count 3023 transition count 3018
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 2208 place count 3018 transition count 3018
Performed 691 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 691 Pre rules applied. Total rules applied 2208 place count 3018 transition count 2327
Deduced a syphon composed of 691 places in 9 ms
Reduce places removed 691 places and 0 transitions.
Iterating global reduction 3 with 1382 rules applied. Total rules applied 3590 place count 2327 transition count 2327
Discarding 152 places :
Symmetric choice reduction at 3 with 152 rule applications. Total rules 3742 place count 2175 transition count 2175
Iterating global reduction 3 with 152 rules applied. Total rules applied 3894 place count 2175 transition count 2175
Performed 120 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 120 Pre rules applied. Total rules applied 3894 place count 2175 transition count 2055
Deduced a syphon composed of 120 places in 15 ms
Reduce places removed 120 places and 0 transitions.
Iterating global reduction 3 with 240 rules applied. Total rules applied 4134 place count 2055 transition count 2055
Performed 902 Post agglomeration using F-continuation condition.Transition count delta: 902
Deduced a syphon composed of 902 places in 7 ms
Reduce places removed 902 places and 0 transitions.
Iterating global reduction 3 with 1804 rules applied. Total rules applied 5938 place count 1153 transition count 1153
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 5939 place count 1153 transition count 1152
Renaming transitions due to excessive name length > 1024 char.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 6 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 5941 place count 1152 transition count 1151
Performed 101 Post agglomeration using F-continuation condition.Transition count delta: -97
Deduced a syphon composed of 101 places in 4 ms
Reduce places removed 101 places and 0 transitions.
Iterating global reduction 4 with 202 rules applied. Total rules applied 6143 place count 1051 transition count 1248
Performed 101 Post agglomeration using F-continuation condition.Transition count delta: -96
Deduced a syphon composed of 101 places in 5 ms
Reduce places removed 101 places and 0 transitions.
Iterating global reduction 4 with 202 rules applied. Total rules applied 6345 place count 950 transition count 1344
Performed 91 Post agglomeration using F-continuation condition.Transition count delta: -89
Deduced a syphon composed of 91 places in 1 ms
Reduce places removed 91 places and 0 transitions.
Iterating global reduction 4 with 182 rules applied. Total rules applied 6527 place count 859 transition count 1433
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 4 with 1 rules applied. Total rules applied 6528 place count 859 transition count 1433
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 4 with 1 rules applied. Total rules applied 6529 place count 858 transition count 1432
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 6530 place count 857 transition count 1432
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 6531 place count 856 transition count 1431
Applied a total of 6531 rules in 2060 ms. Remains 856 /4123 variables (removed 3267) and now considering 1431/4123 (removed 2692) transitions.
[2021-05-18 00:10:38] [INFO ] Flatten gal took : 90 ms
[2021-05-18 00:10:38] [INFO ] Flatten gal took : 166 ms
[2021-05-18 00:10:38] [INFO ] Input system was already deterministic with 1431 transitions.
[2021-05-18 00:10:39] [INFO ] Flatten gal took : 136 ms
[2021-05-18 00:10:39] [INFO ] Flatten gal took : 123 ms
[2021-05-18 00:10:39] [INFO ] Time to serialize gal into /tmp/CTLFireability5874866953607652111.gal : 49 ms
[2021-05-18 00:10:39] [INFO ] Time to serialize properties into /tmp/CTLFireability10628640856188211712.ctl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLFireability5874866953607652111.gal, -t, CGAL, -ctl, /tmp/CTLFireability10628640856188211712.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLFireability5874866953607652111.gal -t CGAL -ctl /tmp/CTLFireability10628640856188211712.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,6.86156e+126,2.24051,32564,2,4797,5,105413,6,0,4854,113744,0


Converting to forward existential form...Done !
original formula: AG(E(EF((((((((((p391==1)||(p2391==1))||(p1928==1))||(p4627==1))||(p969==1))||(p3279==1))||(p1440==1))||(p999==1))||(p3437==1))) U A((((((((((((p3865==1)||(p1006==1))||(p2122==1))||(p1854==1))||(p22==1))||(p2421==1))||(p70==1))||(p3354==1))||(p110==1))||(((p726==1)&&(p738==1))&&(p770==1)))&&(((((p2337==1)||(p2690==1))||(p4652==1))||(p3450==1))||(p1466==1))) U (((((((p1720==1)||(p3068==1))||(p1950==1))||(p3362==1))||(p4184==1))||(p4075==1))||(p4474==1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(E(TRUE U (((((((((p391==1)||(p2391==1))||(p1928==1))||(p4627==1))||(p969==1))||(p3279==1))||(p1440==1))||(p999==1))||(p3437==1))) U !((E(!((((((((p1720==1)||(p3068==1))||(p1950==1))||(p3362==1))||(p4184==1))||(p4075==1))||(p4474==1))) U (!((((((((((((p3865==1)||(p1006==1))||(p2122==1))||(p1854==1))||(p22==1))||(p2421==1))||(p70==1))||(p3354==1))||(p110==1))||(((p726==1)&&(p738==1))&&(p770==1)))&&(((((p2337==1)||(p2690==1))||(p4652==1))||(p3450==1))||(p1466==1)))) * !((((((((p1720==1)||(p3068==1))||(p1950==1))||(p3362==1))||(p4184==1))||(p4075==1))||(p4474==1))))) + EG(!((((((((p1720==1)||(p3068==1))||(p1950==1))||(p3362==1))||(p4184==1))||(p4075==1))||(p4474==1)))))))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t0, t3, t6, t7, t11, t12, t13, t14, t15, t16, t18, t19, t25, t31, t33, t47, t48, t51, t53, t55, t57, t59, t61, t63, t65, t67, t69, t71, t73, t75, t77, t79, t81, t83, t85, t87, t89, t91, t93, t95, t96, t99, t101, t103, t105, t106, t108, t109, t111, t113, t116, t117, t119, t121, t123, t125, t127, t129, t131, t133, t135, t137, t139, t141, t142, t145, t147, t148, t151, t153, t155, t157, t159, t161, t162, t165, t167, t169, t171, t173, t175, t177, t179, t181, t183, t186, t188, t191, t193, t195, t197, t199, t201, t202, t205, t208, t211, t214, t216, t220, t261, t265, t269, t273, t280, t285, t289, t293, t295, t299, t305, t307, t311, t317, t325, t327, t331, t337, t341, t345, t349, t353, t357, t361, t365, t368, t372, t377, t381, t385, t389, t393, t397, t401, t405, t409, t413, t417, t421, t425, t429, t433, t437, t441, t445, t449, t453, t457, t465, t469, t473, t477, t481, t485, t489, t493, t497, t501, t505, t509, t513, t517, t521, t525, t528, t533, t535, t541, t545, t549, t553, t556, t560, t565, t569, t573, t581, t585, t589, t593, t597, t600, t604, t609, t613, t617, t621, t625, t629, t633, t637, t641, t645, t649, t653, t657, t660, t664, t669, t673, t677, t681, t682, t683, t684, t685, t689, t690, t691, t692, t693, t697, t705, t709, t713, t717, t721, t725, t729, t733, t737, t745, t749, t753, t757, t761, t764, t768, t773, t777, t783, t787, t793, t794, t795, t799, t805, t809, t813, t817, t821, t825, t829, t833, t837, t841, t845, t849, t853, t857, t860, t864, t871, t872, t873, t877, t881, t885, t889, t893, t897, t901, t905, t909, t913, t917, t921, t925, t929, t933, t937, t939, t943, t949, t953, t957, t961, t964, t969, t971, t977, t981, t985, t989, t993, t997, t999, t1003, t1009, t1017, t1021, t1025, t1029, t1033, t1037, t1041, t1045, t1049, t1053, t1057, t1061, t1065, t1067, t1071, t1077, t1081, t1085, t1089, t1093, t1097, t1101, t1105, t1109, t1113, t1117, t1121, t1125, t1129, t1133, t1137, t1141, t1145, t1149, t1153, t1157, t1161, t1163, t1166, t1167, t1168, t1169, t1173, t1177, t1181, t1185, t1189, t1193, t1197, t1199, t1203, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/1091/340/1431
Detected timeout of ITS tools.
[2021-05-18 00:11:09] [INFO ] Flatten gal took : 152 ms
[2021-05-18 00:11:09] [INFO ] Applying decomposition
[2021-05-18 00:11:09] [INFO ] Flatten gal took : 79 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph13063826217240866545.txt, -o, /tmp/graph13063826217240866545.bin, -w, /tmp/graph13063826217240866545.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph13063826217240866545.bin, -l, -1, -v, -w, /tmp/graph13063826217240866545.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-18 00:11:09] [INFO ] Decomposing Gal with order
[2021-05-18 00:11:10] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-18 00:11:10] [INFO ] Removed a total of 2687 redundant transitions.
[2021-05-18 00:11:10] [INFO ] Flatten gal took : 256 ms
[2021-05-18 00:11:10] [INFO ] Fuse similar labels procedure discarded/fused a total of 1298 labels/synchronizations in 215 ms.
[2021-05-18 00:11:10] [INFO ] Time to serialize gal into /tmp/CTLFireability1065429107886215922.gal : 39 ms
[2021-05-18 00:11:10] [INFO ] Time to serialize properties into /tmp/CTLFireability4095908920443578627.ctl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLFireability1065429107886215922.gal, -t, CGAL, -ctl, /tmp/CTLFireability4095908920443578627.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLFireability1065429107886215922.gal -t CGAL -ctl /tmp/CTLFireability4095908920443578627.ctl
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,6.86156e+126,1.15531,34232,1195,31,59816,244,1311,122133,67,625,0


Converting to forward existential form...Done !
original formula: AG(E(EF((((((((((i1.u27.p391==1)||(i9.i1.i1.u191.p2391==1))||(i8.u154.p1928==1))||(i19.i1.i0.u380.p4627==1))||(i3.u73.p969==1))||(i13.u266.p3279==1))||(i6.i0.i0.u113.p1440==1))||(i4.u75.p999==1))||(i14.i1.i0.u280.p3437==1))) U A((((((((((((i16.u317.p3865==1)||(i4.u77.p1006==1))||(i9.i0.i0.u170.p2122==1))||(i7.u148.p1854==1))||(i16.u0.p22==1))||(i10.i0.i0.u193.p2421==1))||(i6.i1.i0.u1.p70==1))||(i14.i0.i0.u273.p3354==1))||(i0.i0.i0.u3.p110==1))||(((i2.u54.p726==1)&&(i2.u55.p738==1))&&(i3.u58.p770==1)))&&(((((i9.i1.i0.u187.p2337==1)||(i10.i1.i1.u217.p2690==1))||(i19.i1.i0.u382.p4652==1))||(i14.i1.i0.u281.p3450==1))||(i6.i0.i0.u116.p1466==1))) U (((((((i7.u138.p1720==1)||(i12.u247.p3068==1))||(i7.u156.p1950==1))||(i14.i0.i0.u272.p3362==1))||(i17.i1.i0.u343.p4184==1))||(i17.i0.i0.u334.p4075==1))||(i19.i0.i0.u368.p4474==1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(E(TRUE U (((((((((i1.u27.p391==1)||(i9.i1.i1.u191.p2391==1))||(i8.u154.p1928==1))||(i19.i1.i0.u380.p4627==1))||(i3.u73.p969==1))||(i13.u266.p3279==1))||(i6.i0.i0.u113.p1440==1))||(i4.u75.p999==1))||(i14.i1.i0.u280.p3437==1))) U !((E(!((((((((i7.u138.p1720==1)||(i12.u247.p3068==1))||(i7.u156.p1950==1))||(i14.i0.i0.u272.p3362==1))||(i17.i1.i0.u343.p4184==1))||(i17.i0.i0.u334.p4075==1))||(i19.i0.i0.u368.p4474==1))) U (!((((((((((((i16.u317.p3865==1)||(i4.u77.p1006==1))||(i9.i0.i0.u170.p2122==1))||(i7.u148.p1854==1))||(i16.u0.p22==1))||(i10.i0.i0.u193.p2421==1))||(i6.i1.i0.u1.p70==1))||(i14.i0.i0.u273.p3354==1))||(i0.i0.i0.u3.p110==1))||(((i2.u54.p726==1)&&(i2.u55.p738==1))&&(i3.u58.p770==1)))&&(((((i9.i1.i0.u187.p2337==1)||(i10.i1.i1.u217.p2690==1))||(i19.i1.i0.u382.p4652==1))||(i14.i1.i0.u281.p3450==1))||(i6.i0.i0.u116.p1466==1)))) * !((((((((i7.u138.p1720==1)||(i12.u247.p3068==1))||(i7.u156.p1950==1))||(i14.i0.i0.u272.p3362==1))||(i17.i1.i0.u343.p4184==1))||(i17.i0.i0.u334.p4075==1))||(i19.i0.i0.u368.p4474==1))))) + EG(!((((((((i7.u138.p1720==1)||(i12.u247.p3068==1))||(i7.u156.p1950==1))||(i14.i0.i0.u272.p3362==1))||(i17.i1.i0.u343.p4184==1))||(i17.i0.i0.u334.p4075==1))||(i19.i0.i0.u368.p4474==1)))))))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t106, t324, t358, t367, t409, t414, t473, t500, t509, t578, t641, t648, t697, t735, t813, t875, t884, t925, t930, t973, t980, t1024, t1089, t1095, t1149, t1156, t1194, t1205, i0.t299, i0.t291, i0.i0.t268, i0.i0.t278, i0.i0.t286, i0.i0.i0.t265, i0.i0.i0.t261, i0.i0.i0.t47, i0.i0.i0.u3.t25, i0.i0.i1.t271, i0.i0.i1.t49, i0.i0.i2.t284, i0.i0.i2.t51, i0.i1.t302, i0.i1.t310, i0.i1.i0.t295, i0.i1.i0.t53, i0.i1.i1.t314, i0.i1.i1.t308, i0.i1.i1.t54, i1.t356, i1.t352, i1.t349, i1.t345, i1.t341, i1.t334, i1.t332, i1.t328, i1.t63, i1.t60, i1.t58, i1.t56, i1.u26.t33, i2.t402, i2.t399, i2.t395, i2.t391, i2.t386, i2.t383, i2.t381, i2.t376, i2.t373, i2.t365, i2.t71, i2.t68, i2.t66, i2.t64, i3.t463, i3.t455, i3.t453, i3.t448, i3.t445, i3.t441, i3.t437, i3.t432, i3.t428, i3.t425, i3.t419, i3.t410, i3.t78, i3.t76, i3.t75, i3.t73, i3.u73.t83, i3.u74.t81, i4.t495, i4.t491, i4.t487, i4.t485, i4.t480, i4.t476, i4.t467, i4.t87, i4.t85, i4.t19, i4.u77.t18, i5.t543, i5.t535, i5.i0.t523, i5.i0.t533, i5.i0.i0.t519, i5.i0.i0.t514, i5.i0.i0.t513, i5.i0.i0.t505, i5.i0.i0.t90, i5.i0.i0.t88, i5.i0.i1.t526, i5.i0.i1.t93, i5.i1.t560, i5.i1.t567, i5.i1.i0.t556, i5.i1.i0.t552, i5.i1.i0.t548, i5.i1.i0.t539, i5.i1.i0.t96, i5.i1.i0.t94, i5.i1.i1.t571, i5.i1.i1.t564, i5.i1.i1.t99, i6.t613, i6.t605, i6.i0.t589, i6.i0.t591, i6.i0.t600, i6.i0.i0.t101, i6.i0.i0.t16, i6.i0.i0.u116.t15, i6.i0.i1.t585, i6.i0.i1.t102, i6.i0.i2.t596, i6.i0.i2.t105, i6.i1.t615, i6.i1.t623, i6.i1.i0.t606, i6.i1.i0.t109, i6.i1.i0.t108, i6.i1.i1.t637, i6.i1.i1.t632, i6.i1.i1.t627, i6.i1.i1.t620, i6.i1.i1.t113, i6.i1.i1.t110, i7.t687, i7.t685, i7.t680, i7.t674, i7.t670, i7.t666, i7.t665, i7.t661, i7.t657, i7.t650, i7.t644, i7.t123, i7.t121, i7.t118, i7.t117, i7.t116, i7.t14, i7.u156.t692, i7.u156.t693, i8.t731, i8.t727, i8.t723, i8.t719, i8.t714, i8.t712, i8.t708, i8.t705, i8.t130, i8.t129, i8.t126, i8.t124, i8.u154.t690, i8.u154.t691, i9.t774, i9.t766, i9.i0.t755, i9.i0.t762, i9.i0.i0.t751, i9.i0.i0.t746, i9.i0.i0.t743, i9.i0.i0.t134, i9.i0.i0.u170.t13, i9.i0.i0.u172.t133, i9.i0.i1.t761, i9.i0.i1.t136, i9.i1.t793, i9.i1.t805, i9.i1.i0.t786, i9.i1.i0.t783, i9.i1.i0.t770, i9.i1.i0.t140, i9.i1.i0.t139, i9.i1.i0.u187.t12, i9.i1.i1.t798, i9.i1.i1.t143, i9.i1.i1.u191.t794, i9.i1.i1.u191.t795, i10.t846, i10.t839, i10.i0.t816, i10.i0.t825, i10.i0.t827, i10.i0.t837, i10.i0.i0.t807, i10.i0.i0.t144, i10.i0.i0.t11, i10.i0.i1.t821, i10.i0.i1.t146, i10.i0.i2.t830, i10.i0.i2.t149, i10.i1.t851, i10.i1.t859, i10.i1.i0.t842, i10.i1.i0.t150, i10.i1.i1.t868, i10.i1.i1.t863, i10.i1.i1.t854, i10.i1.i1.t154, i10.i1.i1.t153, i10.i1.i1.u217.t872, i10.i1.i1.u217.t873, i11.t918, i11.t915, i11.t911, i11.t907, i11.t902, i11.t899, i11.t895, i11.t890, i11.t888, i11.t881, i11.t162, i11.t160, i11.t159, i11.t156, i12.t966, i12.t963, i12.t960, i12.t956, i12.t953, i12.t946, i12.t944, i12.t940, i12.t935, i12.t926, i12.t170, i12.t169, i12.t167, i12.t165, i13.t1014, i13.t1009, i13.t1003, i13.t999, i13.t994, i13.t992, i13.t988, i13.t983, i13.t974, i13.t179, i13.t176, i13.t175, i13.t173, i13.u266.t7, i14.t1061, i14.t1053, i14.i0.t1038, i14.i0.t1049, i14.i0.i0.t1034, i14.i0.i0.t1031, i14.i0.i0.t1028, i14.i0.i0.t1019, i14.i0.i0.t181, i14.i0.i0.u273.t6, i14.i0.i1.t1042, i14.i0.i1.t183, i14.i1.t1065, i14.i1.t1072, i14.i1.i0.t1054, i14.i1.i0.t188, i14.i1.i0.t186, i14.i1.i1.t1085, i14.i1.i1.t1081, i14.i1.i1.t1077, i14.i1.i1.t1067, i14.i1.i1.t192, i14.i1.i1.t190, i15.t1120, i15.t1113, i15.i0.t1101, i15.i0.t1109, i15.i0.i0.t1090, i15.i0.i0.t195, i15.i0.i1.t1104, i15.i0.i1.t197, i15.i1.t1122, i15.i1.t1133, i15.i1.t1137, i15.i1.t1143, i15.i1.i0.t1117, i15.i1.i0.t199, i15.i1.i1.t1128, i15.i1.i1.t200, i15.i1.i2.t1138, i15.i1.i2.t203, i16.t1191, i16.t1187, i16.t1182, i16.t1178, i16.t1174, i16.t1173, i16.t1167, i16.t1163, i16.t1161, i16.t1151, i16.t213, i16.t211, i16.t207, i16.t204, i16.u317.t3, i17.i0.i0.t1200, i17.i0.i0.t220, i17.i0.i0.t216, i19.i1.i0.u380.t31, i19.i1.i0.u382.t0, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/137/334/471
Detected timeout of ITS tools.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 1125 transitions
Trivial Post-agglo rules discarded 1125 transitions
Performed 1125 trivial Post agglomeration. Transition count delta: 1125
Iterating post reduction 0 with 1125 rules applied. Total rules applied 1125 place count 4122 transition count 2997
Reduce places removed 1125 places and 0 transitions.
Iterating post reduction 1 with 1125 rules applied. Total rules applied 2250 place count 2997 transition count 2997
Performed 689 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 689 Pre rules applied. Total rules applied 2250 place count 2997 transition count 2308
Deduced a syphon composed of 689 places in 11 ms
Reduce places removed 689 places and 0 transitions.
Iterating global reduction 2 with 1378 rules applied. Total rules applied 3628 place count 2308 transition count 2308
Discarding 162 places :
Symmetric choice reduction at 2 with 162 rule applications. Total rules 3790 place count 2146 transition count 2146
Iterating global reduction 2 with 162 rules applied. Total rules applied 3952 place count 2146 transition count 2146
Performed 129 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 129 Pre rules applied. Total rules applied 3952 place count 2146 transition count 2017
Deduced a syphon composed of 129 places in 8 ms
Reduce places removed 129 places and 0 transitions.
Iterating global reduction 2 with 258 rules applied. Total rules applied 4210 place count 2017 transition count 2017
Performed 911 Post agglomeration using F-continuation condition.Transition count delta: 911
Deduced a syphon composed of 911 places in 3 ms
Reduce places removed 911 places and 0 transitions.
Iterating global reduction 2 with 1822 rules applied. Total rules applied 6032 place count 1106 transition count 1106
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 6033 place count 1106 transition count 1105
Renaming transitions due to excessive name length > 1024 char.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 3 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 6035 place count 1105 transition count 1104
Performed 101 Post agglomeration using F-continuation condition.Transition count delta: -100
Deduced a syphon composed of 101 places in 3 ms
Reduce places removed 101 places and 0 transitions.
Iterating global reduction 3 with 202 rules applied. Total rules applied 6237 place count 1004 transition count 1204
Performed 101 Post agglomeration using F-continuation condition.Transition count delta: -101
Deduced a syphon composed of 101 places in 2 ms
Reduce places removed 101 places and 0 transitions.
Iterating global reduction 3 with 202 rules applied. Total rules applied 6439 place count 903 transition count 1305
Performed 97 Post agglomeration using F-continuation condition.Transition count delta: -97
Deduced a syphon composed of 97 places in 1 ms
Reduce places removed 97 places and 0 transitions.
Iterating global reduction 3 with 194 rules applied. Total rules applied 6633 place count 806 transition count 1402
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 3 with 1 rules applied. Total rules applied 6634 place count 805 transition count 1401
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 6635 place count 804 transition count 1401
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 4 with 1 rules applied. Total rules applied 6636 place count 803 transition count 1400
Applied a total of 6636 rules in 1332 ms. Remains 803 /4123 variables (removed 3320) and now considering 1400/4123 (removed 2723) transitions.
[2021-05-18 00:11:42] [INFO ] Flatten gal took : 64 ms
[2021-05-18 00:11:42] [INFO ] Flatten gal took : 78 ms
[2021-05-18 00:11:42] [INFO ] Input system was already deterministic with 1400 transitions.
[2021-05-18 00:11:42] [INFO ] Flatten gal took : 72 ms
[2021-05-18 00:11:42] [INFO ] Flatten gal took : 75 ms
[2021-05-18 00:11:42] [INFO ] Time to serialize gal into /tmp/CTLFireability16053281362992397278.gal : 17 ms
[2021-05-18 00:11:42] [INFO ] Time to serialize properties into /tmp/CTLFireability8124005066776158312.ctl : 0 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLFireability16053281362992397278.gal, -t, CGAL, -ctl, /tmp/CTLFireability8124005066776158312.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLFireability16053281362992397278.gal -t CGAL -ctl /tmp/CTLFireability8124005066776158312.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,3.87337e+120,1.2633,20056,2,1318,5,36809,6,0,4614,34944,0


Converting to forward existential form...Done !
original formula: AF(EG(((p208==1)||(p643==1))))
=> equivalent forward existential formula: [FwdG(Init,!(EG(((p208==1)||(p643==1)))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t1, t4, t5, t8, t10, t12, t14, t16, t18, t20, t21, t24, t27, t205, t209, t215, t219, t223, t227, t231, t235, t239, t241, t251, t255, t259, t263, t267, t271, t275, t279, t282, t286, t291, t295, t299, t301, t305, t311, t315, t319, t323, t327, t331, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/1356/44/1400
Detected timeout of ITS tools.
[2021-05-18 00:12:12] [INFO ] Flatten gal took : 66 ms
[2021-05-18 00:12:12] [INFO ] Applying decomposition
[2021-05-18 00:12:13] [INFO ] Flatten gal took : 68 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph1819810089140205785.txt, -o, /tmp/graph1819810089140205785.bin, -w, /tmp/graph1819810089140205785.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph1819810089140205785.bin, -l, -1, -v, -w, /tmp/graph1819810089140205785.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-18 00:12:13] [INFO ] Decomposing Gal with order
[2021-05-18 00:12:13] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-18 00:12:13] [INFO ] Removed a total of 2783 redundant transitions.
[2021-05-18 00:12:13] [INFO ] Flatten gal took : 210 ms
[2021-05-18 00:12:13] [INFO ] Fuse similar labels procedure discarded/fused a total of 1550 labels/synchronizations in 45 ms.
[2021-05-18 00:12:13] [INFO ] Time to serialize gal into /tmp/CTLFireability5534341710652645880.gal : 11 ms
[2021-05-18 00:12:13] [INFO ] Time to serialize properties into /tmp/CTLFireability12568556178967361127.ctl : 0 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLFireability5534341710652645880.gal, -t, CGAL, -ctl, /tmp/CTLFireability12568556178967361127.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLFireability5534341710652645880.gal -t CGAL -ctl /tmp/CTLFireability12568556178967361127.ctl
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,3.87337e+120,0.394932,13704,132,9,15502,110,810,25824,22,163,0


Converting to forward existential form...Done !
original formula: AF(EG(((i0.i0.i1.u9.p208==1)||(i2.u45.p643==1))))
=> equivalent forward existential formula: [FwdG(Init,!(EG(((i0.i0.i1.u9.p208==1)||(i2.u45.p643==1)))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t275, t283, i0.t237, i0.i0.t213, i0.i0.t222, i0.i0.i0.t209, i0.i0.i0.t205, i0.i0.i0.t3, i0.i0.i1.t233, i0.i0.i1.t229, i0.i0.i1.t226, i0.i0.i1.t219, i0.i0.i1.t7, i0.i0.i1.t5, i0.i0.i1.u9.t1, i0.i1.t250, i0.i1.t259, i0.i1.t261, i0.i1.t270, i0.i1.i0.t242, i0.i1.i0.t10, i0.i1.i1.t254, i0.i1.i1.t11, i0.i1.i2.t267, i0.i1.i2.t14, i1.t319, i1.t309, i1.i0.t286, i1.i0.t295, i1.i0.i0.t278, i1.i0.i0.t15, i1.i0.i1.t305, i1.i0.i1.t301, i1.i0.i1.t299, i1.i0.i1.t289, i1.i0.i1.t19, i1.i0.i1.t18, i1.i1.t322, i1.i1.t329, i1.i1.i0.t314, i1.i1.i0.t21, i1.i1.i1.t324, i1.i1.i1.t23, i2.t27, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/360/44/404
Fast SCC detection found an SCC at level 1
Fast SCC detection found an SCC at level 2
Fast SCC detection found an SCC at level 3
Fast SCC detection found an SCC at level 4
Fast SCC detection found an SCC at level 5
Fast SCC detection found an SCC at level 6
Fast SCC detection found an SCC at level 7
Fast SCC detection found an SCC at level 8
Fast SCC detection found an SCC at level 9
Fast SCC detection found an SCC at level 10
Fast SCC detection found an SCC at level 11
Fast SCC detection found an SCC at level 12
Fast SCC detection found an SCC at level 13
Fast SCC detection found an SCC at level 14
Fast SCC detection found an SCC at level 15
Fast SCC detection found an SCC at level 16
Fast SCC detection found an SCC at level 17
Fast SCC detection found an SCC at level 18
Detected timeout of ITS tools.
[2021-05-18 00:12:43] [INFO ] Flatten gal took : 108 ms
[2021-05-18 00:12:44] [INFO ] Flatten gal took : 111 ms
[2021-05-18 00:12:44] [INFO ] Applying decomposition
[2021-05-18 00:12:44] [INFO ] Flatten gal took : 120 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph5273325582277221343.txt, -o, /tmp/graph5273325582277221343.bin, -w, /tmp/graph5273325582277221343.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph5273325582277221343.bin, -l, -1, -v, -w, /tmp/graph5273325582277221343.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-18 00:12:44] [INFO ] Decomposing Gal with order
[2021-05-18 00:12:45] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-18 00:12:46] [INFO ] Removed a total of 827 redundant transitions.
[2021-05-18 00:12:46] [INFO ] Flatten gal took : 252 ms
[2021-05-18 00:12:47] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 34 ms.
[2021-05-18 00:12:47] [INFO ] Time to serialize gal into /tmp/CTLFireability6284655341547662163.gal : 44 ms
[2021-05-18 00:12:47] [INFO ] Time to serialize properties into /tmp/CTLFireability7600691464116929581.ctl : 8 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLFireability6284655341547662163.gal, -t, CGAL, -ctl, /tmp/CTLFireability7600691464116929581.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLFireability6284655341547662163.gal -t CGAL -ctl /tmp/CTLFireability7600691464116929581.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Detected timeout of ITS tools.
[2021-05-18 00:33:48] [INFO ] Applying decomposition
[2021-05-18 00:33:48] [INFO ] Flatten gal took : 101 ms
[2021-05-18 00:33:48] [INFO ] Decomposing Gal with order
[2021-05-18 00:33:49] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-18 00:33:49] [INFO ] Removed a total of 222 redundant transitions.
[2021-05-18 00:33:50] [INFO ] Flatten gal took : 207 ms
[2021-05-18 00:33:57] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 7 ms.
[2021-05-18 00:33:57] [INFO ] Time to serialize gal into /tmp/CTLFireability4626838926835097292.gal : 37 ms
[2021-05-18 00:33:57] [INFO ] Time to serialize properties into /tmp/CTLFireability15253807845864770323.ctl : 24 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLFireability4626838926835097292.gal, -t, CGAL, -ctl, /tmp/CTLFireability15253807845864770323.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLFireability4626838926835097292.gal -t CGAL -ctl /tmp/CTLFireability15253807845864770323.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Detected timeout of ITS tools.
[2021-05-18 00:54:58] [INFO ] Flatten gal took : 124 ms
[2021-05-18 00:54:58] [INFO ] Input system was already deterministic with 4123 transitions.
[2021-05-18 00:54:58] [INFO ] Transformed 4123 places.
[2021-05-18 00:54:58] [INFO ] Transformed 4123 transitions.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit/bin//..//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit/bin//..//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
[2021-05-18 00:55:00] [INFO ] Time to serialize gal into /tmp/CTLFireability8833091544181163702.gal : 13 ms
[2021-05-18 00:55:00] [INFO ] Time to serialize properties into /tmp/CTLFireability16629234938800122774.ctl : 6 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLFireability8833091544181163702.gal, -t, CGAL, -ctl, /tmp/CTLFireability16629234938800122774.ctl, --load-order, /home/mcc/execution/model.ord, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLFireability8833091544181163702.gal -t CGAL -ctl /tmp/CTLFireability16629234938800122774.ctl --load-order /home/mcc/execution/model.ord --gen-order FOLLOW
Successfully loaded order from file /home/mcc/execution/model.ord
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//..//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ cut -d . -f 9
++ ls /home/mcc/BenchKit/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202104292328.jar
+ VERSION=0
+ echo 'Running Version 0'
+ /home/mcc/BenchKit/bin//..//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -spotpath /home/mcc/BenchKit/bin//..//ltlfilt -z3path /home/mcc/BenchKit/bin//..//z3/bin/z3 -yices2path /home/mcc/BenchKit/bin//..//yices/bin/yices -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-100B"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is ShieldRVt-PT-100B, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r235-smll-162106564800346"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-100B.tgz
mv ShieldRVt-PT-100B execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;