fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r175-tajo-162089412100805
Last Updated
Jun 28, 2021

About the Execution of LoLA for ResAllocation-PT-R020C002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
320.947 5780.00 5458.00 7.50 FTFFFTFFTTFFTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2021-input.r175-tajo-162089412100805.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is ResAllocation-PT-R020C002, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r175-tajo-162089412100805
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 496K
-rw-r--r-- 1 mcc users 18K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 157K May 10 09:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 82K May 10 09:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Mar 28 16:33 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Mar 28 16:33 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Mar 28 16:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 28 16:33 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K Mar 27 10:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K Mar 27 10:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 25 14:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 25 14:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 22 08:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 22 08:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 9 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 85K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R020C002-00
FORMULA_NAME ResAllocation-PT-R020C002-01
FORMULA_NAME ResAllocation-PT-R020C002-02
FORMULA_NAME ResAllocation-PT-R020C002-03
FORMULA_NAME ResAllocation-PT-R020C002-04
FORMULA_NAME ResAllocation-PT-R020C002-05
FORMULA_NAME ResAllocation-PT-R020C002-06
FORMULA_NAME ResAllocation-PT-R020C002-07
FORMULA_NAME ResAllocation-PT-R020C002-08
FORMULA_NAME ResAllocation-PT-R020C002-09
FORMULA_NAME ResAllocation-PT-R020C002-10
FORMULA_NAME ResAllocation-PT-R020C002-11
FORMULA_NAME ResAllocation-PT-R020C002-12
FORMULA_NAME ResAllocation-PT-R020C002-13
FORMULA_NAME ResAllocation-PT-R020C002-14
FORMULA_NAME ResAllocation-PT-R020C002-15

=== Now, execution of the tool begins

BK_START 1621096997401

starting LoLA
BK_INPUT ResAllocation-PT-R020C002
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
LTLFireability

FORMULA ResAllocation-PT-R020C002-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621097003181

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:424
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:518
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:427
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 6 (type EXCL) for 3 ResAllocation-PT-R020C002-01
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: FINISHED task # 6 (type EXCL) for ResAllocation-PT-R020C002-01
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 37 (type EXCL) for 32 ResAllocation-PT-R020C002-08
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for ResAllocation-PT-R020C002-08
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 32 ResAllocation-PT-R020C002-08
lola: time limit : 150 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for ResAllocation-PT-R020C002-08
lola: result : true
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 29 ResAllocation-PT-R020C002-07
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 30 (type EXCL) for ResAllocation-PT-R020C002-07
lola: result : false
lola: markings : 280
lola: fired transitions : 280
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 23 ResAllocation-PT-R020C002-05
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for ResAllocation-PT-R020C002-05
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 18 (type EXCL) for 17 ResAllocation-PT-R020C002-03
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 18 (type EXCL) for ResAllocation-PT-R020C002-03
lola: result : false
lola: markings : 76
lola: fired transitions : 76
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 10 ResAllocation-PT-R020C002-02
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for ResAllocation-PT-R020C002-02
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 8 (type EXCL) for 3 ResAllocation-PT-R020C002-01
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for ResAllocation-PT-R020C002-01
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 ResAllocation-PT-R020C002-00
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 1 (type EXCL) for ResAllocation-PT-R020C002-00
lola: result : false
lola: markings : 78
lola: fired transitions : 79
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 54 (type EXCL) for 51 ResAllocation-PT-R020C002-13
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for ResAllocation-PT-R020C002-13
lola: result : false
lola: markings : 76
lola: fired transitions : 77
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 20 ResAllocation-PT-R020C002-04
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for ResAllocation-PT-R020C002-04
lola: result : false
lola: markings : 73
lola: fired transitions : 73
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 67 (type EXCL) for 26 ResAllocation-PT-R020C002-06
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 65 (type FNDP) for 26 ResAllocation-PT-R020C002-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type EQUN) for 26 ResAllocation-PT-R020C002-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SRCH) for 26 ResAllocation-PT-R020C002-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 68 (type SRCH) for ResAllocation-PT-R020C002-06
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 67 (type EXCL) for ResAllocation-PT-R020C002-06
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 65 (type FNDP) for ResAllocation-PT-R020C002-06 (obsolete)
lola: CANCELED task # 66 (type EQUN) for ResAllocation-PT-R020C002-06 (obsolete)
lola: LAUNCH task # 62 (type EXCL) for 61 ResAllocation-PT-R020C002-15
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 66 (type EQUN) for ResAllocation-PT-R020C002-06
lola: result : unknown
lola: FINISHED task # 62 (type EXCL) for ResAllocation-PT-R020C002-15
lola: result : false
lola: markings : 76
lola: fired transitions : 76
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 ResAllocation-PT-R020C002-10
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for ResAllocation-PT-R020C002-10
lola: result : false
lola: markings : 94
lola: fired transitions : 95
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 59 (type EXCL) for 58 ResAllocation-PT-R020C002-14
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 65 (type FNDP) for ResAllocation-PT-R020C002-06
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 59 (type EXCL) for ResAllocation-PT-R020C002-14
lola: result : false
lola: markings : 1312819
lola: fired transitions : 6819550
lola: time used : 4.000000
lola: memory pages used : 9
lola: LAUNCH task # 49 (type EXCL) for 48 ResAllocation-PT-R020C002-12
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for ResAllocation-PT-R020C002-12
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 ResAllocation-PT-R020C002-11
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for ResAllocation-PT-R020C002-11
lola: result : false
lola: markings : 76
lola: fired transitions : 76
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 ResAllocation-PT-R020C002-09
lola: time limit : 1798 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for ResAllocation-PT-R020C002-09
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 15 (type EXCL) for 10 ResAllocation-PT-R020C002-02
lola: time limit : 3596 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R020C002-00: LTL false LTL model checker
ResAllocation-PT-R020C002-01: CONJ true CONJ
ResAllocation-PT-R020C002-03: LTL false LTL model checker
ResAllocation-PT-R020C002-04: LTL false LTL model checker
ResAllocation-PT-R020C002-05: LTL true LTL model checker
ResAllocation-PT-R020C002-06: AG false state space
ResAllocation-PT-R020C002-07: LTL false LTL model checker
ResAllocation-PT-R020C002-08: CONJ true CONJ
ResAllocation-PT-R020C002-09: LTL true LTL model checker
ResAllocation-PT-R020C002-10: LTL false LTL model checker
ResAllocation-PT-R020C002-11: LTL false LTL model checker
ResAllocation-PT-R020C002-12: LTL true LTL model checker
ResAllocation-PT-R020C002-13: CONJ false LTL model checker
ResAllocation-PT-R020C002-14: LTL false LTL model checker
ResAllocation-PT-R020C002-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R020C002-02: CONJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 LTL EXCL 1/3596 4/32 ResAllocation-PT-R020C002-02 581780 m, 116356 m/sec, 1446330 t fired, .

Time elapsed: 5 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 15 (type EXCL) for ResAllocation-PT-R020C002-02
lola: result : false
lola: markings : 1083532
lola: fired transitions : 2807097
lola: time used : 2.000000
lola: memory pages used : 8
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R020C002-00: LTL false LTL model checker
ResAllocation-PT-R020C002-01: CONJ true CONJ
ResAllocation-PT-R020C002-02: CONJ false LTL model checker
ResAllocation-PT-R020C002-03: LTL false LTL model checker
ResAllocation-PT-R020C002-04: LTL false LTL model checker
ResAllocation-PT-R020C002-05: LTL true LTL model checker
ResAllocation-PT-R020C002-06: AG false state space
ResAllocation-PT-R020C002-07: LTL false LTL model checker
ResAllocation-PT-R020C002-08: CONJ true CONJ
ResAllocation-PT-R020C002-09: LTL true LTL model checker
ResAllocation-PT-R020C002-10: LTL false LTL model checker
ResAllocation-PT-R020C002-11: LTL false LTL model checker
ResAllocation-PT-R020C002-12: LTL true LTL model checker
ResAllocation-PT-R020C002-13: CONJ false LTL model checker
ResAllocation-PT-R020C002-14: LTL false LTL model checker
ResAllocation-PT-R020C002-15: LTL false LTL model checker


Time elapsed: 6 secs. Pages in use: 9

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R020C002"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is ResAllocation-PT-R020C002, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r175-tajo-162089412100805"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R020C002.tgz
mv ResAllocation-PT-R020C002 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;