About the Execution of LoLA for RERS17pb115-PT-6
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3661.004 | 3600000.00 | 3720995.00 | 402.80 | [undef] | Time out reached |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2021-input.r175-tajo-162089411300310.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is RERS17pb115-PT-6, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r175-tajo-162089411300310
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 70M
-rw-r--r-- 1 mcc users 16K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 152K May 10 09:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 23K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 115K May 10 09:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Mar 28 16:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 28 16:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Mar 28 16:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 28 16:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Mar 27 10:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 27 10:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Mar 25 13:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 25 13:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 08:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 22 08:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 2 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 69M May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-00
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-01
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-02
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-03
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-04
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-05
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-06
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-07
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-08
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-09
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-10
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-11
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-12
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-13
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-14
FORMULA_NAME RERS17pb115-PT-6-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1621082845471
starting LoLA
BK_INPUT RERS17pb115-PT-6
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
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RERS17pb115-PT-6-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-01: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-04: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-06: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-01: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-04: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-06: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-01: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-04: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-06: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-01: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-04: EF 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-06: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-01: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-01: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-01: EF 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-04: EF 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
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RERS17pb115-PT-6-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb115-PT-6-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb115-PT-6"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is RERS17pb115-PT-6, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r175-tajo-162089411300310"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb115-PT-6.tgz
mv RERS17pb115-PT-6 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;