About the Execution of LoLA for RERS17pb113-PT-7
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16042.352 | 406211.00 | 1009309.00 | 77.70 | ???F??F?????F?T? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2021-input.r175-tajo-162089411100174.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is RERS17pb113-PT-7, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r175-tajo-162089411100174
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 100K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 20K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 100K May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.1K Mar 28 16:28 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 28 16:28 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Mar 28 16:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 16:28 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Mar 27 10:05 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 27 10:05 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 4.1K Mar 25 13:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 25 13:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 08:13 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 22 08:13 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 2 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 15M May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-00
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-01
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-02
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-03
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-04
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-05
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-06
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-07
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-08
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-09
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-10
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-11
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-12
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-13
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-14
FORMULA_NAME RERS17pb113-PT-7-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1621069444042
starting LoLA
BK_INPUT RERS17pb113-PT-7
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA RERS17pb113-PT-7-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1621069850253
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0
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RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 0 0 0 0
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RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
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RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0
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RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
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RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
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RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 0 0 0 0
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RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 0 0 0 0
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
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RERS17pb113-PT-7-ReachabilityCardinality-12: AG 0 1 4 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-14: EF 5 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF FNDP 15/1079 0/5 RERS17pb113-PT-7-ReachabilityCardinality-12 --
50 EF STEQ 15/1079 0/5 RERS17pb113-PT-7-ReachabilityCardinality-12 sara is running.
52 EF SRCH 15/1626 1/5 RERS17pb113-PT-7-ReachabilityCardinality-12 --
53 EF EXCL 15/205 1/32 RERS17pb113-PT-7-ReachabilityCardinality-12 946 m, 57 m/sec, 945 t fired, .
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RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-03: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-12: AG 0 1 4 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-14: EF 0 5 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF FNDP 20/1079 0/5 RERS17pb113-PT-7-ReachabilityCardinality-12 529 t fired, 1 attempts, .
50 EF STEQ 20/1079 0/5 RERS17pb113-PT-7-ReachabilityCardinality-12 sara is running.
52 EF SRCH 20/1626 1/5 RERS17pb113-PT-7-ReachabilityCardinality-12 197 m, 39 m/sec, 196 t fired, .
53 EF EXCL 20/205 1/32 RERS17pb113-PT-7-ReachabilityCardinality-12 1138 m, 38 m/sec, 1137 t fired, .
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lola: FINISHED task # 49 (type FNDP) for RERS17pb113-PT-7-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 817
lola: tried executions : 1
lola: time used : 22.000000
lola: memory pages used : 0
lola: CANCELED task # 50 (type EQUN) for RERS17pb113-PT-7-ReachabilityCardinality-12 (obsolete)
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 58 (type SRCH) for 42 RERS17pb113-PT-7-ReachabilityCardinality-14
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lola: FINISHED task # 50 (type EQUN) for RERS17pb113-PT-7-ReachabilityCardinality-12
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-56.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-03: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
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RERS17pb113-PT-7-ReachabilityCardinality-14: EF 0 1 4 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 EF FNDP 3/1630 0/5 RERS17pb113-PT-7-ReachabilityCardinality-14 --
56 EF STEQ 3/3261 0/5 RERS17pb113-PT-7-ReachabilityCardinality-14 sara is running.
58 EF SRCH 3/3261 1/5 RERS17pb113-PT-7-ReachabilityCardinality-14 --
59 EF EXCL 3/217 1/32 RERS17pb113-PT-7-ReachabilityCardinality-14 --
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-03: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-14: EF 0 1 4 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 EF FNDP 8/1627 0/5 RERS17pb113-PT-7-ReachabilityCardinality-14 --
56 EF STEQ 8/3258 0/5 RERS17pb113-PT-7-ReachabilityCardinality-14 sara is running.
58 EF SRCH 8/3258 1/5 RERS17pb113-PT-7-ReachabilityCardinality-14 --
59 EF EXCL 8/217 1/32 RERS17pb113-PT-7-ReachabilityCardinality-14 309 m, 61 m/sec, 308 t fired, .
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RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-03: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-14: EF 0 1 4 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 EF FNDP 13/1622 0/5 RERS17pb113-PT-7-ReachabilityCardinality-14 461 t fired, 1 attempts, .
56 EF STEQ 13/3253 0/5 RERS17pb113-PT-7-ReachabilityCardinality-14 sara is running.
58 EF SRCH 13/3253 1/5 RERS17pb113-PT-7-ReachabilityCardinality-14 262 m, 52 m/sec, 261 t fired, .
59 EF EXCL 13/217 1/32 RERS17pb113-PT-7-ReachabilityCardinality-14 479 m, 34 m/sec, 478 t fired, .
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lola: FINISHED task # 55 (type FNDP) for RERS17pb113-PT-7-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 902
lola: tried executions : 1
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lola: CANCELED task # 56 (type EQUN) for RERS17pb113-PT-7-ReachabilityCardinality-14 (obsolete)
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lola: FINISHED task # 56 (type EQUN) for RERS17pb113-PT-7-ReachabilityCardinality-14
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 66 (type EXCL) for 9 RERS17pb113-PT-7-ReachabilityCardinality-03
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type SRCH) for 9 RERS17pb113-PT-7-ReachabilityCardinality-03
lola: time limit : 32000000 sec
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-03: AG 0 1 4 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
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RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 2/1622 0/5 RERS17pb113-PT-7-ReachabilityCardinality-03 --
63 EF STEQ 2/3245 0/5 RERS17pb113-PT-7-ReachabilityCardinality-03 sara not yet started (preprocessing).
65 EF SRCH 2/3245 1/5 RERS17pb113-PT-7-ReachabilityCardinality-03 --
66 EF EXCL 2/231 1/32 RERS17pb113-PT-7-ReachabilityCardinality-03 --
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-63.sara.
lola: FINISHED task # 62 (type FNDP) for RERS17pb113-PT-7-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 44
lola: tried executions : 1
lola: time used : 6.000000
lola: memory pages used : 0
lola: CANCELED task # 63 (type EQUN) for RERS17pb113-PT-7-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 65 (type SRCH) for RERS17pb113-PT-7-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 66 (type EXCL) for RERS17pb113-PT-7-ReachabilityCardinality-03 (obsolete)
lola: FINISHED task # 63 (type EQUN) for RERS17pb113-PT-7-ReachabilityCardinality-03
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-ReachabilityCardinality-03: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
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RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 73 (type EXCL) for 18 RERS17pb113-PT-7-ReachabilityCardinality-06
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lola: LAUNCH task # 69 (type FNDP) for 18 RERS17pb113-PT-7-ReachabilityCardinality-06
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lola: LAUNCH task # 70 (type EQUN) for 18 RERS17pb113-PT-7-ReachabilityCardinality-06
lola: time limit : 32000000 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 72 (type SRCH) for 18 RERS17pb113-PT-7-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-ReachabilityCardinality-03: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-06: AG 0 1 4 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 4/1618 0/5 RERS17pb113-PT-7-ReachabilityCardinality-06 --
70 EF STEQ 4/3237 0/5 RERS17pb113-PT-7-ReachabilityCardinality-06 sara is running.
72 EF SRCH 4/3237 1/5 RERS17pb113-PT-7-ReachabilityCardinality-06 --
73 EF EXCL 4/249 1/32 RERS17pb113-PT-7-ReachabilityCardinality-06 --
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RERS17pb113-PT-7-ReachabilityCardinality-03: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-06: AG 0 1 4 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 9/1614 0/5 RERS17pb113-PT-7-ReachabilityCardinality-06 --
70 EF STEQ 9/3233 0/5 RERS17pb113-PT-7-ReachabilityCardinality-06 sara is running.
72 EF SRCH 9/3233 1/5 RERS17pb113-PT-7-ReachabilityCardinality-06 --
73 EF EXCL 9/249 1/32 RERS17pb113-PT-7-ReachabilityCardinality-06 109 m, 21 m/sec, 108 t fired, .
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RERS17pb113-PT-7-ReachabilityCardinality-03: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-06: AG 0 1 4 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 14/1609 0/5 RERS17pb113-PT-7-ReachabilityCardinality-06 --
70 EF STEQ 14/3228 0/5 RERS17pb113-PT-7-ReachabilityCardinality-06 sara is running.
72 EF SRCH 14/3228 1/5 RERS17pb113-PT-7-ReachabilityCardinality-06 --
73 EF EXCL 14/249 1/32 RERS17pb113-PT-7-ReachabilityCardinality-06 337 m, 45 m/sec, 336 t fired, .
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lola: FINISHED task # 73 (type EXCL) for RERS17pb113-PT-7-ReachabilityCardinality-06
lola: result : true
lola: markings : 481
lola: fired transitions : 480
lola: time used : 18.000000
lola: memory pages used : 1
lola: CANCELED task # 69 (type FNDP) for RERS17pb113-PT-7-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 70 (type EQUN) for RERS17pb113-PT-7-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 72 (type SRCH) for RERS17pb113-PT-7-ReachabilityCardinality-06 (obsolete)
lola: FINISHED task # 70 (type EQUN) for RERS17pb113-PT-7-ReachabilityCardinality-06
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-ReachabilityCardinality-03: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-06: AG false tandem / relaxed
RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: FINISHED task # 69 (type FNDP) for RERS17pb113-PT-7-ReachabilityCardinality-06
lola: result : true
lola: fired transitions : 58
lola: tried executions : 1
lola: time used : 20.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-ReachabilityCardinality-03: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-06: AG false tandem / relaxed
RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-ReachabilityCardinality-03: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-06: AG false tandem / relaxed
RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 79 (type EXCL) for 0 RERS17pb113-PT-7-ReachabilityCardinality-00
lola: time limit : 267 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 75 (type FNDP) for 0 RERS17pb113-PT-7-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type EQUN) for 0 RERS17pb113-PT-7-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type SRCH) for 0 RERS17pb113-PT-7-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-ReachabilityCardinality-03: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-06: AG false tandem / relaxed
RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 1 4 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
75 EF FNDP 2/1602 0/5 RERS17pb113-PT-7-ReachabilityCardinality-00 --
76 EF STEQ 2/3205 0/5 RERS17pb113-PT-7-ReachabilityCardinality-00 sara not yet started (preprocessing).
78 EF SRCH 2/3205 1/5 RERS17pb113-PT-7-ReachabilityCardinality-00 --
79 EF EXCL 2/267 1/32 RERS17pb113-PT-7-ReachabilityCardinality-00 --
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 76 (type EQUN) for RERS17pb113-PT-7-ReachabilityCardinality-00
lola: result : unknown
lola: LAUNCH task # 88 (type FNDP) for 24 RERS17pb113-PT-7-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-ReachabilityCardinality-03: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-06: AG false tandem / relaxed
RERS17pb113-PT-7-ReachabilityCardinality-12: AG false findpath
RERS17pb113-PT-7-ReachabilityCardinality-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-ReachabilityCardinality-00: EF 0 1 3 0 2 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-13: AG 0 5 0 0 1 0 0 0
RERS17pb113-PT-7-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
75 EF FNDP 7/450 0/5 RERS17pb113-PT-7-ReachabilityCardinality-00 --
78 EF SRCH 7/393 1/5 RERS17pb113-PT-7-ReachabilityCardinality-00 --
79 EF EXCL 7/267 1/32 RERS17pb113-PT-7-ReachabilityCardinality-00 --
88 EF FNDP 1/398 0/5 RERS17pb113-PT-7-ReachabilityCardinality-08 --
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
/home/mcc/BenchKit/BenchKit_head.sh: line 62: 413 Killed lola --conf=$BIN_DIR/configfiles/reachabilitycardinalityconf --formula=$DIR/ReachabilityCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb113-PT-7"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is RERS17pb113-PT-7, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r175-tajo-162089411100174"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb113-PT-7.tgz
mv RERS17pb113-PT-7 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;