fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r175-tajo-162089411000124
Last Updated
Jun 28, 2021

About the Execution of LoLA for RERS17pb113-PT-1

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16238.688 2838741.00 9386007.00 511.50 T?FF?TTTTTFFTF?F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2021-input.r175-tajo-162089411000124.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is RERS17pb113-PT-1, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r175-tajo-162089411000124
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 16K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 151K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 17K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 84K May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Mar 28 16:28 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 28 16:28 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Mar 28 16:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 16:28 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Mar 27 10:02 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 27 10:02 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 25 13:10 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K Mar 25 13:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 08:13 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 22 08:13 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 2 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 15M May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb113-PT-1-00
FORMULA_NAME RERS17pb113-PT-1-01
FORMULA_NAME RERS17pb113-PT-1-02
FORMULA_NAME RERS17pb113-PT-1-03
FORMULA_NAME RERS17pb113-PT-1-04
FORMULA_NAME RERS17pb113-PT-1-05
FORMULA_NAME RERS17pb113-PT-1-06
FORMULA_NAME RERS17pb113-PT-1-07
FORMULA_NAME RERS17pb113-PT-1-08
FORMULA_NAME RERS17pb113-PT-1-09
FORMULA_NAME RERS17pb113-PT-1-10
FORMULA_NAME RERS17pb113-PT-1-11
FORMULA_NAME RERS17pb113-PT-1-12
FORMULA_NAME RERS17pb113-PT-1-13
FORMULA_NAME RERS17pb113-PT-1-14
FORMULA_NAME RERS17pb113-PT-1-15

=== Now, execution of the tool begins

BK_START 1621067578495

starting LoLA
BK_INPUT RERS17pb113-PT-1
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
LTLCardinality

FORMULA RERS17pb113-PT-1-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 1880 'REAL' failed
alloc of 34484 'MYBOOL' failed
alloc of 34484 'MYBOOL' failed
alloc of 34484 'MYBOOL' failed

FORMULA RERS17pb113-PT-1-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621070417236

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:141
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:114
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:518
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:409
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:427
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:114
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 11 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 16 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 11.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 21 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 26 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 11.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 31 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 36 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 11.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 41 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 46 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 11.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 51 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 56 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 61 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 66 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 71 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 22.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 76 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 81 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 11.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 86 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 91 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 96 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 11.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 101 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 106 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 11.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 111 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 116 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 121 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 126 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-05: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-07: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-08: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 131 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 26.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 30 RERS17pb113-PT-1-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 RERS17pb113-PT-1-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 37 (type CNST) for 36 RERS17pb113-PT-1-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 28 (type CNST) for 27 RERS17pb113-PT-1-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 28 (type CNST) for RERS17pb113-PT-1-05
lola: result : true
lola: FINISHED task # 31 (type CNST) for RERS17pb113-PT-1-06
lola: result : true
lola: FINISHED task # 37 (type CNST) for RERS17pb113-PT-1-08
lola: result : true
lola: FINISHED task # 34 (type CNST) for RERS17pb113-PT-1-07
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 136 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 141 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 146 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 151 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 156 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 161 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 166 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 171 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 176 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 181 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 186 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 191 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 196 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 201 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 206 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 76.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 211 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 216 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 221 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 13.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 226 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 231 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 236 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 241 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 246 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 14.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 251 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 256 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 261 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 14.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 266 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 271 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 13.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 276 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 281 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-12: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 286 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
lola: LAUNCH task # 46 (type EXCL) for 45 RERS17pb113-PT-1-11
lola: time limit : 207 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for RERS17pb113-PT-1-11
lola: result : false
lola: markings : 1810
lola: fired transitions : 1810
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 RERS17pb113-PT-1-12
lola: time limit : 220 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for RERS17pb113-PT-1-12
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 8 (type EXCL) for 3 RERS17pb113-PT-1-01
lola: time limit : 236 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for RERS17pb113-PT-1-01
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 0 0 0 3 0 0 0
RERS17pb113-PT-1-02: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 291 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 15 (type EXCL) for 10 RERS17pb113-PT-1-02
lola: time limit : 254 sec
lola: memory limit: 32 pages
lola: FINISHED task # 15 (type EXCL) for RERS17pb113-PT-1-02
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 62 (type EXCL) for 61 RERS17pb113-PT-1-15
lola: time limit : 275 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type FNDP) for 20 RERS17pb113-PT-1-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type EQUN) for 20 RERS17pb113-PT-1-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SRCH) for 20 RERS17pb113-PT-1-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 68 (type SRCH) for RERS17pb113-PT-1-04
lola: result : unknown
lola: time used : 1.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 70 (type FNDP) for 10 RERS17pb113-PT-1-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-02: CONJ 0 3 1 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 LTL EXCL 4/275 1/32 RERS17pb113-PT-1-15 209 m, 41 m/sec, 208 t fired, .
65 EF FNDP 2/3304 0/5 RERS17pb113-PT-1-04 166 t fired, 1 attempts, .
66 EF STEQ 2/1651 0/5 RERS17pb113-PT-1-04 sara not yet started (preprocessing).
70 EF FNDP 1/1651 0/5 RERS17pb113-PT-1-02 76 t fired, 1 attempts, .

Time elapsed: 296 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
sara: try reading problem file /home/mcc/execution/LTLCardinality-66.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-02: CONJ 0 3 1 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 LTL EXCL 9/275 1/32 RERS17pb113-PT-1-15 451 m, 48 m/sec, 450 t fired, .
65 EF FNDP 7/3304 0/5 RERS17pb113-PT-1-04 1585 t fired, 1 attempts, .
66 EF STEQ 7/1651 0/5 RERS17pb113-PT-1-04 sara is running.
70 EF FNDP 6/1651 0/5 RERS17pb113-PT-1-02 1447 t fired, 1 attempts, .

Time elapsed: 301 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 70 (type FNDP) for RERS17pb113-PT-1-02
lola: result : true
lola: fired transitions : 2462
lola: tried executions : 1
lola: time used : 9.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 LTL EXCL 14/300 1/32 RERS17pb113-PT-1-15 756 m, 61 m/sec, 755 t fired, .
65 EF FNDP 12/3306 0/5 RERS17pb113-PT-1-04 3092 t fired, 1 attempts, .
66 EF STEQ 12/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 306 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 LTL EXCL 19/300 1/32 RERS17pb113-PT-1-15 1297 m, 108 m/sec, 1296 t fired, .
65 EF FNDP 17/3306 0/5 RERS17pb113-PT-1-04 4611 t fired, 1 attempts, .
66 EF STEQ 17/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 311 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 LTL EXCL 24/300 1/32 RERS17pb113-PT-1-15 1831 m, 106 m/sec, 1830 t fired, .
65 EF FNDP 22/3306 0/5 RERS17pb113-PT-1-04 6142 t fired, 2 attempts, .
66 EF STEQ 22/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 316 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 LTL EXCL 29/300 1/32 RERS17pb113-PT-1-15 2428 m, 119 m/sec, 2427 t fired, .
65 EF FNDP 27/3306 0/5 RERS17pb113-PT-1-04 7679 t fired, 2 attempts, .
66 EF STEQ 27/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 321 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-15: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 LTL EXCL 34/300 1/32 RERS17pb113-PT-1-15 2958 m, 106 m/sec, 2957 t fired, .
65 EF FNDP 32/3306 0/5 RERS17pb113-PT-1-04 9213 t fired, 3 attempts, .
66 EF STEQ 32/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 326 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
lola: FINISHED task # 62 (type EXCL) for RERS17pb113-PT-1-15
lola: result : false
lola: markings : 3084
lola: fired transitions : 3084
lola: time used : 35.000000
lola: memory pages used : 1
lola: LAUNCH task # 59 (type EXCL) for 58 RERS17pb113-PT-1-14
lola: time limit : 327 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 4/327 1/32 RERS17pb113-PT-1-14 106369 m, 21273 m/sec, 677934 t fired, .
65 EF FNDP 37/3306 0/5 RERS17pb113-PT-1-04 10737 t fired, 3 attempts, .
66 EF STEQ 37/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 331 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 9/327 2/32 RERS17pb113-PT-1-14 212406 m, 21207 m/sec, 1458271 t fired, .
65 EF FNDP 42/3306 0/5 RERS17pb113-PT-1-04 11928 t fired, 3 attempts, .
66 EF STEQ 42/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 336 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 14/327 3/32 RERS17pb113-PT-1-14 274239 m, 12366 m/sec, 1966822 t fired, .
65 EF FNDP 47/3306 0/5 RERS17pb113-PT-1-04 12676 t fired, 4 attempts, .
66 EF STEQ 47/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 341 secs. Pages in use: 3
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 19/327 3/32 RERS17pb113-PT-1-14 336740 m, 12500 m/sec, 2450991 t fired, .
65 EF FNDP 52/3306 0/5 RERS17pb113-PT-1-04 13409 t fired, 4 attempts, .
66 EF STEQ 52/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 346 secs. Pages in use: 3
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 24/327 4/32 RERS17pb113-PT-1-14 396725 m, 11997 m/sec, 2914327 t fired, .
65 EF FNDP 57/3306 0/5 RERS17pb113-PT-1-04 14090 t fired, 4 attempts, .
66 EF STEQ 57/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 351 secs. Pages in use: 4
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 29/327 4/32 RERS17pb113-PT-1-14 516083 m, 23871 m/sec, 3802860 t fired, .
65 EF FNDP 62/3306 0/5 RERS17pb113-PT-1-04 15407 t fired, 4 attempts, .
66 EF STEQ 62/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 356 secs. Pages in use: 4
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 34/327 5/32 RERS17pb113-PT-1-14 575333 m, 11850 m/sec, 4310287 t fired, .
65 EF FNDP 67/3306 0/5 RERS17pb113-PT-1-04 16022 t fired, 4 attempts, .
66 EF STEQ 67/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 361 secs. Pages in use: 5
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 39/327 6/32 RERS17pb113-PT-1-14 661560 m, 17245 m/sec, 5029901 t fired, .
65 EF FNDP 72/3306 0/5 RERS17pb113-PT-1-04 17151 t fired, 4 attempts, .
66 EF STEQ 72/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 366 secs. Pages in use: 6
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 44/327 6/32 RERS17pb113-PT-1-14 780054 m, 23698 m/sec, 6105936 t fired, .
65 EF FNDP 77/3306 0/5 RERS17pb113-PT-1-04 18671 t fired, 4 attempts, .
66 EF STEQ 77/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 371 secs. Pages in use: 6
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 49/327 7/32 RERS17pb113-PT-1-14 898719 m, 23733 m/sec, 7030413 t fired, .
65 EF FNDP 82/3306 0/5 RERS17pb113-PT-1-04 20176 t fired, 4 attempts, .
66 EF STEQ 82/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 376 secs. Pages in use: 7
# running tasks: 3 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 54/327 8/32 RERS17pb113-PT-1-14 999915 m, 20239 m/sec, 7800195 t fired, .
65 EF FNDP 87/3306 0/5 RERS17pb113-PT-1-04 21658 t fired, 4 attempts, .
66 EF STEQ 87/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 381 secs. Pages in use: 8
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 59/327 9/32 RERS17pb113-PT-1-14 1106492 m, 21315 m/sec, 8684841 t fired, .
65 EF FNDP 92/3306 0/5 RERS17pb113-PT-1-04 23089 t fired, 4 attempts, .
66 EF STEQ 92/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 386 secs. Pages in use: 9
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 64/327 10/32 RERS17pb113-PT-1-14 1226746 m, 24050 m/sec, 9582283 t fired, .
65 EF FNDP 97/3306 0/5 RERS17pb113-PT-1-04 24620 t fired, 4 attempts, .
66 EF STEQ 97/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 391 secs. Pages in use: 10
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 69/327 11/32 RERS17pb113-PT-1-14 1339653 m, 22581 m/sec, 10497473 t fired, .
65 EF FNDP 102/3306 0/5 RERS17pb113-PT-1-04 26147 t fired, 4 attempts, .
66 EF STEQ 102/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 396 secs. Pages in use: 11
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 74/327 11/32 RERS17pb113-PT-1-14 1453718 m, 22813 m/sec, 11397759 t fired, .
65 EF FNDP 107/3306 0/5 RERS17pb113-PT-1-04 27678 t fired, 4 attempts, .
66 EF STEQ 107/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 401 secs. Pages in use: 11
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 79/327 12/32 RERS17pb113-PT-1-14 1564401 m, 22136 m/sec, 12289923 t fired, .
65 EF FNDP 112/3306 0/5 RERS17pb113-PT-1-04 29214 t fired, 4 attempts, .
66 EF STEQ 112/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 406 secs. Pages in use: 12
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 84/327 13/32 RERS17pb113-PT-1-14 1667921 m, 20704 m/sec, 13244125 t fired, .
65 EF FNDP 117/3306 0/5 RERS17pb113-PT-1-04 30764 t fired, 4 attempts, .
66 EF STEQ 117/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 411 secs. Pages in use: 13
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 89/327 14/32 RERS17pb113-PT-1-14 1774001 m, 21216 m/sec, 14198372 t fired, .
65 EF FNDP 122/3306 0/5 RERS17pb113-PT-1-04 32292 t fired, 4 attempts, .
66 EF STEQ 122/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 416 secs. Pages in use: 14
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 94/327 15/32 RERS17pb113-PT-1-14 1890377 m, 23275 m/sec, 15095146 t fired, .
65 EF FNDP 127/3306 0/5 RERS17pb113-PT-1-04 33818 t fired, 4 attempts, .
66 EF STEQ 127/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 421 secs. Pages in use: 15
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 99/327 15/32 RERS17pb113-PT-1-14 2003108 m, 22546 m/sec, 16042386 t fired, .
65 EF FNDP 132/3306 0/5 RERS17pb113-PT-1-04 35340 t fired, 4 attempts, .
66 EF STEQ 132/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 426 secs. Pages in use: 15
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 104/327 16/32 RERS17pb113-PT-1-14 2107399 m, 20858 m/sec, 16894618 t fired, .
65 EF FNDP 137/3306 0/5 RERS17pb113-PT-1-04 36759 t fired, 4 attempts, .
66 EF STEQ 137/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 431 secs. Pages in use: 16
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 109/327 17/32 RERS17pb113-PT-1-14 2206779 m, 19876 m/sec, 17738912 t fired, .
65 EF FNDP 142/3306 0/5 RERS17pb113-PT-1-04 38159 t fired, 4 attempts, .
66 EF STEQ 142/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 436 secs. Pages in use: 17
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 114/327 18/32 RERS17pb113-PT-1-14 2306216 m, 19887 m/sec, 18472021 t fired, .
65 EF FNDP 147/3306 0/5 RERS17pb113-PT-1-04 39649 t fired, 5 attempts, .
66 EF STEQ 147/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 441 secs. Pages in use: 18
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 119/327 18/32 RERS17pb113-PT-1-14 2415208 m, 21798 m/sec, 19315826 t fired, .
65 EF FNDP 152/3306 0/5 RERS17pb113-PT-1-04 41142 t fired, 5 attempts, .
66 EF STEQ 152/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 446 secs. Pages in use: 18
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 124/327 19/32 RERS17pb113-PT-1-14 2525719 m, 22102 m/sec, 20214589 t fired, .
65 EF FNDP 157/3306 0/5 RERS17pb113-PT-1-04 42639 t fired, 5 attempts, .
66 EF STEQ 157/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 451 secs. Pages in use: 19
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 129/327 20/32 RERS17pb113-PT-1-14 2630298 m, 20915 m/sec, 21194135 t fired, .
65 EF FNDP 162/3306 0/5 RERS17pb113-PT-1-04 44125 t fired, 5 attempts, .
66 EF STEQ 162/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 456 secs. Pages in use: 20
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 134/327 21/32 RERS17pb113-PT-1-14 2736668 m, 21274 m/sec, 22213610 t fired, .
65 EF FNDP 167/3306 0/5 RERS17pb113-PT-1-04 45608 t fired, 5 attempts, .
66 EF STEQ 167/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 461 secs. Pages in use: 21
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 139/327 22/32 RERS17pb113-PT-1-14 2849109 m, 22488 m/sec, 23133695 t fired, .
65 EF FNDP 172/3306 0/5 RERS17pb113-PT-1-04 47088 t fired, 5 attempts, .
66 EF STEQ 172/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 466 secs. Pages in use: 22
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 144/327 23/32 RERS17pb113-PT-1-14 2964578 m, 23093 m/sec, 24041399 t fired, .
65 EF FNDP 177/3306 0/5 RERS17pb113-PT-1-04 48509 t fired, 5 attempts, .
66 EF STEQ 177/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 471 secs. Pages in use: 23
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 149/327 23/32 RERS17pb113-PT-1-14 3077704 m, 22625 m/sec, 24950152 t fired, .
65 EF FNDP 182/3306 0/5 RERS17pb113-PT-1-04 49979 t fired, 5 attempts, .
66 EF STEQ 182/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 476 secs. Pages in use: 23
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 154/327 24/32 RERS17pb113-PT-1-14 3183954 m, 21250 m/sec, 25838054 t fired, .
65 EF FNDP 187/3306 0/5 RERS17pb113-PT-1-04 51385 t fired, 5 attempts, .
66 EF STEQ 187/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 481 secs. Pages in use: 24
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 159/327 25/32 RERS17pb113-PT-1-14 3291801 m, 21569 m/sec, 26816172 t fired, .
65 EF FNDP 192/3306 0/5 RERS17pb113-PT-1-04 52799 t fired, 6 attempts, .
66 EF STEQ 192/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 486 secs. Pages in use: 25
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 164/327 26/32 RERS17pb113-PT-1-14 3396061 m, 20852 m/sec, 27772823 t fired, .
65 EF FNDP 197/3306 0/5 RERS17pb113-PT-1-04 54265 t fired, 6 attempts, .
66 EF STEQ 197/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 491 secs. Pages in use: 26
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 169/327 27/32 RERS17pb113-PT-1-14 3503850 m, 21557 m/sec, 28705991 t fired, .
65 EF FNDP 202/3306 0/5 RERS17pb113-PT-1-04 55722 t fired, 6 attempts, .
66 EF STEQ 202/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 496 secs. Pages in use: 27
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 174/327 27/32 RERS17pb113-PT-1-14 3610183 m, 21266 m/sec, 29643843 t fired, .
65 EF FNDP 207/3306 0/5 RERS17pb113-PT-1-04 57103 t fired, 6 attempts, .
66 EF STEQ 207/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 501 secs. Pages in use: 27
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 179/327 28/32 RERS17pb113-PT-1-14 3712982 m, 20559 m/sec, 30566661 t fired, .
65 EF FNDP 212/3306 0/5 RERS17pb113-PT-1-04 58508 t fired, 6 attempts, .
66 EF STEQ 212/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 506 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 184/327 29/32 RERS17pb113-PT-1-14 3822171 m, 21837 m/sec, 31508770 t fired, .
65 EF FNDP 217/3306 0/5 RERS17pb113-PT-1-04 59834 t fired, 6 attempts, .
66 EF STEQ 217/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 511 secs. Pages in use: 29
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 189/327 30/32 RERS17pb113-PT-1-14 3931360 m, 21837 m/sec, 32427290 t fired, .
65 EF FNDP 222/3306 0/5 RERS17pb113-PT-1-04 61155 t fired, 6 attempts, .
66 EF STEQ 222/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 516 secs. Pages in use: 30
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 194/327 31/32 RERS17pb113-PT-1-14 4041624 m, 22052 m/sec, 33340233 t fired, .
65 EF FNDP 227/3306 0/5 RERS17pb113-PT-1-04 62532 t fired, 6 attempts, .
66 EF STEQ 227/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 521 secs. Pages in use: 31
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 199/327 31/32 RERS17pb113-PT-1-14 4146740 m, 21023 m/sec, 34296549 t fired, .
65 EF FNDP 232/3306 0/5 RERS17pb113-PT-1-04 63911 t fired, 6 attempts, .
66 EF STEQ 232/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 526 secs. Pages in use: 31
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 LTL EXCL 204/327 32/32 RERS17pb113-PT-1-14 4253105 m, 21273 m/sec, 35272214 t fired, .
65 EF FNDP 237/3306 0/5 RERS17pb113-PT-1-04 65416 t fired, 6 attempts, .
66 EF STEQ 237/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 531 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
lola: CANCELED task # 59 (type EXCL) for RERS17pb113-PT-1-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-04: CONJ 0 2 2 0 3 0 0 0
RERS17pb113-PT-1-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-13: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 242/3306 0/5 RERS17pb113-PT-1-04 66914 t fired, 6 attempts, .
66 EF STEQ 242/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 536 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
lola: LAUNCH task # 56 (type EXCL) for 51 RERS17pb113-PT-1-13
lola: time limit : 340 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for RERS17pb113-PT-1-13
lola: result : false
lola: markings : 1810
lola: fired transitions : 1810
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 RERS17pb113-PT-1-09
lola: time limit : 437 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for RERS17pb113-PT-1-09
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 18 (type EXCL) for 17 RERS17pb113-PT-1-03
lola: time limit : 510 sec
lola: memory limit: 32 pages
lola: FINISHED task # 18 (type EXCL) for RERS17pb113-PT-1-03
lola: result : false
lola: markings : 1814
lola: fired transitions : 1814
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 RERS17pb113-PT-1-00
lola: time limit : 612 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for RERS17pb113-PT-1-00
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 67 (type EXCL) for 20 RERS17pb113-PT-1-04
lola: time limit : 766 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 247/3306 0/5 RERS17pb113-PT-1-04 68393 t fired, 6 attempts, .
66 EF STEQ 247/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 5/766 1/32 RERS17pb113-PT-1-04 1222 m, 244 m/sec, 1221 t fired, .

Time elapsed: 541 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 252/3306 0/5 RERS17pb113-PT-1-04 69888 t fired, 6 attempts, .
66 EF STEQ 252/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 10/766 1/32 RERS17pb113-PT-1-04 2598 m, 275 m/sec, 2597 t fired, .

Time elapsed: 546 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 257/3306 0/5 RERS17pb113-PT-1-04 71282 t fired, 6 attempts, .
66 EF STEQ 257/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 15/766 1/32 RERS17pb113-PT-1-04 3918 m, 264 m/sec, 3917 t fired, .

Time elapsed: 551 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 262/3306 0/5 RERS17pb113-PT-1-04 72626 t fired, 7 attempts, .
66 EF STEQ 262/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 20/766 1/32 RERS17pb113-PT-1-04 5198 m, 256 m/sec, 5197 t fired, .

Time elapsed: 556 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 267/3306 0/5 RERS17pb113-PT-1-04 74086 t fired, 7 attempts, .
66 EF STEQ 267/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 25/766 1/32 RERS17pb113-PT-1-04 6686 m, 297 m/sec, 8989 t fired, .

Time elapsed: 561 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 272/3306 0/5 RERS17pb113-PT-1-04 75569 t fired, 7 attempts, .
66 EF STEQ 272/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 30/766 1/32 RERS17pb113-PT-1-04 8231 m, 309 m/sec, 15144 t fired, .

Time elapsed: 566 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 277/3306 0/5 RERS17pb113-PT-1-04 77044 t fired, 7 attempts, .
66 EF STEQ 277/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 35/766 1/32 RERS17pb113-PT-1-04 9686 m, 291 m/sec, 21467 t fired, .

Time elapsed: 571 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 282/3306 0/5 RERS17pb113-PT-1-04 78504 t fired, 7 attempts, .
66 EF STEQ 282/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 40/766 1/32 RERS17pb113-PT-1-04 11156 m, 294 m/sec, 28801 t fired, .

Time elapsed: 576 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 287/3306 0/5 RERS17pb113-PT-1-04 79982 t fired, 7 attempts, .
66 EF STEQ 287/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 45/766 1/32 RERS17pb113-PT-1-04 12617 m, 292 m/sec, 35143 t fired, .

Time elapsed: 581 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 292/3306 0/5 RERS17pb113-PT-1-04 81505 t fired, 7 attempts, .
66 EF STEQ 292/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 50/766 1/32 RERS17pb113-PT-1-04 14101 m, 296 m/sec, 42296 t fired, .

Time elapsed: 586 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 297/3306 0/5 RERS17pb113-PT-1-04 83019 t fired, 7 attempts, .
66 EF STEQ 297/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 55/766 1/32 RERS17pb113-PT-1-04 15593 m, 298 m/sec, 49724 t fired, .

Time elapsed: 591 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 302/3306 0/5 RERS17pb113-PT-1-04 84418 t fired, 8 attempts, .
66 EF STEQ 302/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 60/766 1/32 RERS17pb113-PT-1-04 16954 m, 272 m/sec, 57027 t fired, .

Time elapsed: 596 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 307/3306 0/5 RERS17pb113-PT-1-04 85847 t fired, 8 attempts, .
66 EF STEQ 307/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 65/766 1/32 RERS17pb113-PT-1-04 18316 m, 272 m/sec, 65171 t fired, .

Time elapsed: 601 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 312/3306 0/5 RERS17pb113-PT-1-04 87308 t fired, 8 attempts, .
66 EF STEQ 312/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 70/766 1/32 RERS17pb113-PT-1-04 19751 m, 287 m/sec, 73092 t fired, .

Time elapsed: 606 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 317/3306 0/5 RERS17pb113-PT-1-04 88817 t fired, 9 attempts, .
66 EF STEQ 317/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 75/766 1/32 RERS17pb113-PT-1-04 21210 m, 291 m/sec, 80493 t fired, .

Time elapsed: 611 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 322/3306 0/5 RERS17pb113-PT-1-04 90257 t fired, 10 attempts, .
66 EF STEQ 322/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 80/766 1/32 RERS17pb113-PT-1-04 22652 m, 288 m/sec, 87813 t fired, .

Time elapsed: 616 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 327/3306 0/5 RERS17pb113-PT-1-04 91770 t fired, 10 attempts, .
66 EF STEQ 327/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 85/766 1/32 RERS17pb113-PT-1-04 24087 m, 287 m/sec, 95341 t fired, .

Time elapsed: 621 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 332/3306 0/5 RERS17pb113-PT-1-04 93303 t fired, 10 attempts, .
66 EF STEQ 332/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 90/766 1/32 RERS17pb113-PT-1-04 25621 m, 306 m/sec, 104547 t fired, .

Time elapsed: 626 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 337/3306 0/5 RERS17pb113-PT-1-04 94838 t fired, 10 attempts, .
66 EF STEQ 337/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 95/766 1/32 RERS17pb113-PT-1-04 27144 m, 304 m/sec, 112779 t fired, .

Time elapsed: 631 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 342/3306 0/5 RERS17pb113-PT-1-04 96385 t fired, 10 attempts, .
66 EF STEQ 342/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 100/766 1/32 RERS17pb113-PT-1-04 28658 m, 302 m/sec, 121587 t fired, .

Time elapsed: 636 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 347/3306 0/5 RERS17pb113-PT-1-04 97916 t fired, 10 attempts, .
66 EF STEQ 347/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 105/766 1/32 RERS17pb113-PT-1-04 30146 m, 297 m/sec, 130507 t fired, .

Time elapsed: 641 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 352/3306 0/5 RERS17pb113-PT-1-04 99468 t fired, 11 attempts, .
66 EF STEQ 352/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 110/766 1/32 RERS17pb113-PT-1-04 31654 m, 301 m/sec, 140198 t fired, .

Time elapsed: 646 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 357/3306 0/5 RERS17pb113-PT-1-04 101014 t fired, 12 attempts, .
66 EF STEQ 357/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 115/766 1/32 RERS17pb113-PT-1-04 33166 m, 302 m/sec, 150980 t fired, .

Time elapsed: 651 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 362/3306 0/5 RERS17pb113-PT-1-04 102554 t fired, 13 attempts, .
66 EF STEQ 362/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 120/766 1/32 RERS17pb113-PT-1-04 34663 m, 299 m/sec, 160531 t fired, .

Time elapsed: 656 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 367/3306 0/5 RERS17pb113-PT-1-04 104101 t fired, 13 attempts, .
66 EF STEQ 367/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 125/766 1/32 RERS17pb113-PT-1-04 36205 m, 308 m/sec, 168864 t fired, .

Time elapsed: 661 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 372/3306 0/5 RERS17pb113-PT-1-04 105640 t fired, 13 attempts, .
66 EF STEQ 372/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 130/766 1/32 RERS17pb113-PT-1-04 37732 m, 305 m/sec, 176016 t fired, .

Time elapsed: 666 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 377/3306 0/5 RERS17pb113-PT-1-04 107187 t fired, 13 attempts, .
66 EF STEQ 377/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 135/766 1/32 RERS17pb113-PT-1-04 39263 m, 306 m/sec, 182631 t fired, .

Time elapsed: 671 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 382/3306 0/5 RERS17pb113-PT-1-04 108737 t fired, 13 attempts, .
66 EF STEQ 382/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 140/766 1/32 RERS17pb113-PT-1-04 40785 m, 304 m/sec, 190799 t fired, .

Time elapsed: 676 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 387/3306 0/5 RERS17pb113-PT-1-04 110285 t fired, 13 attempts, .
66 EF STEQ 387/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 145/766 1/32 RERS17pb113-PT-1-04 42306 m, 304 m/sec, 199833 t fired, .

Time elapsed: 681 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 392/3306 0/5 RERS17pb113-PT-1-04 111829 t fired, 14 attempts, .
66 EF STEQ 392/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 150/766 1/32 RERS17pb113-PT-1-04 43823 m, 303 m/sec, 209678 t fired, .

Time elapsed: 686 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 397/3306 0/5 RERS17pb113-PT-1-04 113324 t fired, 14 attempts, .
66 EF STEQ 397/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 155/766 1/32 RERS17pb113-PT-1-04 45302 m, 295 m/sec, 218401 t fired, .

Time elapsed: 691 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 402/3306 0/5 RERS17pb113-PT-1-04 114760 t fired, 14 attempts, .
66 EF STEQ 402/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 160/766 1/32 RERS17pb113-PT-1-04 46719 m, 283 m/sec, 226217 t fired, .

Time elapsed: 696 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 407/3306 0/5 RERS17pb113-PT-1-04 116198 t fired, 15 attempts, .
66 EF STEQ 407/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 165/766 1/32 RERS17pb113-PT-1-04 48126 m, 281 m/sec, 232362 t fired, .

Time elapsed: 701 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 412/3306 0/5 RERS17pb113-PT-1-04 117742 t fired, 15 attempts, .
66 EF STEQ 412/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 170/766 1/32 RERS17pb113-PT-1-04 49653 m, 305 m/sec, 240171 t fired, .

Time elapsed: 706 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 417/3306 0/5 RERS17pb113-PT-1-04 119296 t fired, 15 attempts, .
66 EF STEQ 417/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 175/766 1/32 RERS17pb113-PT-1-04 51184 m, 306 m/sec, 248907 t fired, .

Time elapsed: 711 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 422/3306 0/5 RERS17pb113-PT-1-04 120849 t fired, 15 attempts, .
66 EF STEQ 422/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 180/766 1/32 RERS17pb113-PT-1-04 52711 m, 305 m/sec, 258157 t fired, .

Time elapsed: 716 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 427/3306 0/5 RERS17pb113-PT-1-04 122316 t fired, 16 attempts, .
66 EF STEQ 427/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 185/766 1/32 RERS17pb113-PT-1-04 54240 m, 305 m/sec, 266923 t fired, .

Time elapsed: 721 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 432/3306 0/5 RERS17pb113-PT-1-04 123841 t fired, 17 attempts, .
66 EF STEQ 432/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 190/766 1/32 RERS17pb113-PT-1-04 55780 m, 308 m/sec, 275013 t fired, .

Time elapsed: 726 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 437/3306 0/5 RERS17pb113-PT-1-04 125218 t fired, 17 attempts, .
66 EF STEQ 437/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 195/766 1/32 RERS17pb113-PT-1-04 57165 m, 277 m/sec, 281990 t fired, .

Time elapsed: 731 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 442/3306 0/5 RERS17pb113-PT-1-04 126581 t fired, 17 attempts, .
66 EF STEQ 442/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 200/766 1/32 RERS17pb113-PT-1-04 58598 m, 286 m/sec, 289205 t fired, .

Time elapsed: 736 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 447/3306 0/5 RERS17pb113-PT-1-04 128100 t fired, 17 attempts, .
66 EF STEQ 447/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 205/766 1/32 RERS17pb113-PT-1-04 60130 m, 306 m/sec, 297982 t fired, .

Time elapsed: 741 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 452/3306 0/5 RERS17pb113-PT-1-04 129637 t fired, 18 attempts, .
66 EF STEQ 452/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 210/766 1/32 RERS17pb113-PT-1-04 61671 m, 308 m/sec, 307069 t fired, .

Time elapsed: 746 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 457/3306 0/5 RERS17pb113-PT-1-04 131113 t fired, 18 attempts, .
66 EF STEQ 457/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 215/766 1/32 RERS17pb113-PT-1-04 63143 m, 294 m/sec, 314898 t fired, .

Time elapsed: 751 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 462/3306 0/5 RERS17pb113-PT-1-04 132582 t fired, 19 attempts, .
66 EF STEQ 462/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 220/766 1/32 RERS17pb113-PT-1-04 64612 m, 293 m/sec, 323179 t fired, .

Time elapsed: 756 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 467/3306 0/5 RERS17pb113-PT-1-04 134030 t fired, 19 attempts, .
66 EF STEQ 467/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 225/766 1/32 RERS17pb113-PT-1-04 66057 m, 289 m/sec, 331749 t fired, .

Time elapsed: 761 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 472/3306 0/5 RERS17pb113-PT-1-04 135443 t fired, 19 attempts, .
66 EF STEQ 472/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 230/766 1/32 RERS17pb113-PT-1-04 67473 m, 283 m/sec, 340371 t fired, .

Time elapsed: 766 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 477/3306 0/5 RERS17pb113-PT-1-04 136885 t fired, 20 attempts, .
66 EF STEQ 477/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 235/766 1/32 RERS17pb113-PT-1-04 68907 m, 286 m/sec, 350245 t fired, .

Time elapsed: 771 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 482/3306 0/5 RERS17pb113-PT-1-04 138364 t fired, 20 attempts, .
66 EF STEQ 482/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 240/766 1/32 RERS17pb113-PT-1-04 70370 m, 292 m/sec, 360754 t fired, .

Time elapsed: 776 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 487/3306 0/5 RERS17pb113-PT-1-04 139749 t fired, 20 attempts, .
66 EF STEQ 487/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 245/766 1/32 RERS17pb113-PT-1-04 71776 m, 281 m/sec, 369895 t fired, .

Time elapsed: 781 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 492/3306 0/5 RERS17pb113-PT-1-04 140572 t fired, 20 attempts, .
66 EF STEQ 492/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 250/766 1/32 RERS17pb113-PT-1-04 73258 m, 296 m/sec, 378822 t fired, .

Time elapsed: 786 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 497/3306 0/5 RERS17pb113-PT-1-04 142053 t fired, 20 attempts, .
66 EF STEQ 497/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 255/766 1/32 RERS17pb113-PT-1-04 74759 m, 300 m/sec, 387248 t fired, .

Time elapsed: 791 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 502/3306 0/5 RERS17pb113-PT-1-04 143530 t fired, 20 attempts, .
66 EF STEQ 502/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 260/766 1/32 RERS17pb113-PT-1-04 76238 m, 295 m/sec, 396072 t fired, .

Time elapsed: 796 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 507/3306 0/5 RERS17pb113-PT-1-04 145021 t fired, 20 attempts, .
66 EF STEQ 507/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 265/766 1/32 RERS17pb113-PT-1-04 77753 m, 303 m/sec, 405321 t fired, .

Time elapsed: 801 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 512/3306 0/5 RERS17pb113-PT-1-04 146239 t fired, 20 attempts, .
66 EF STEQ 512/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 270/766 1/32 RERS17pb113-PT-1-04 78973 m, 244 m/sec, 413239 t fired, .

Time elapsed: 806 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 517/3306 0/5 RERS17pb113-PT-1-04 147682 t fired, 20 attempts, .
66 EF STEQ 517/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 275/766 1/32 RERS17pb113-PT-1-04 79830 m, 171 m/sec, 419091 t fired, .

Time elapsed: 811 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 522/3306 0/5 RERS17pb113-PT-1-04 149152 t fired, 20 attempts, .
66 EF STEQ 522/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 280/766 1/32 RERS17pb113-PT-1-04 80983 m, 230 m/sec, 427507 t fired, .

Time elapsed: 816 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 527/3306 0/5 RERS17pb113-PT-1-04 150660 t fired, 20 attempts, .
66 EF STEQ 527/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 285/766 1/32 RERS17pb113-PT-1-04 82229 m, 249 m/sec, 435854 t fired, .

Time elapsed: 821 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 532/3306 0/5 RERS17pb113-PT-1-04 152170 t fired, 21 attempts, .
66 EF STEQ 532/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 290/766 1/32 RERS17pb113-PT-1-04 83662 m, 286 m/sec, 445059 t fired, .

Time elapsed: 826 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 537/3306 0/5 RERS17pb113-PT-1-04 153630 t fired, 21 attempts, .
66 EF STEQ 537/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 295/766 1/32 RERS17pb113-PT-1-04 85116 m, 290 m/sec, 455365 t fired, .

Time elapsed: 831 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 542/3306 0/5 RERS17pb113-PT-1-04 155097 t fired, 21 attempts, .
66 EF STEQ 542/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 300/766 1/32 RERS17pb113-PT-1-04 86617 m, 300 m/sec, 465785 t fired, .

Time elapsed: 836 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 547/3306 0/5 RERS17pb113-PT-1-04 156574 t fired, 21 attempts, .
66 EF STEQ 547/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 305/766 1/32 RERS17pb113-PT-1-04 88065 m, 289 m/sec, 477146 t fired, .

Time elapsed: 841 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 552/3306 0/5 RERS17pb113-PT-1-04 157959 t fired, 22 attempts, .
66 EF STEQ 552/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 310/766 1/32 RERS17pb113-PT-1-04 89546 m, 296 m/sec, 489257 t fired, .

Time elapsed: 846 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 557/3306 0/5 RERS17pb113-PT-1-04 159408 t fired, 23 attempts, .
66 EF STEQ 557/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 315/766 1/32 RERS17pb113-PT-1-04 90405 m, 171 m/sec, 495924 t fired, .

Time elapsed: 851 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 562/3306 0/5 RERS17pb113-PT-1-04 160830 t fired, 23 attempts, .
66 EF STEQ 562/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 320/766 1/32 RERS17pb113-PT-1-04 91712 m, 261 m/sec, 504992 t fired, .

Time elapsed: 856 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 567/3306 0/5 RERS17pb113-PT-1-04 162295 t fired, 24 attempts, .
66 EF STEQ 567/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 325/766 1/32 RERS17pb113-PT-1-04 93226 m, 302 m/sec, 515733 t fired, .

Time elapsed: 861 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 572/3306 0/5 RERS17pb113-PT-1-04 163770 t fired, 25 attempts, .
66 EF STEQ 572/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 330/766 1/32 RERS17pb113-PT-1-04 94730 m, 300 m/sec, 524948 t fired, .

Time elapsed: 866 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 577/3306 0/5 RERS17pb113-PT-1-04 165120 t fired, 25 attempts, .
66 EF STEQ 577/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 335/766 1/32 RERS17pb113-PT-1-04 96238 m, 301 m/sec, 533770 t fired, .

Time elapsed: 871 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 582/3306 0/5 RERS17pb113-PT-1-04 166305 t fired, 25 attempts, .
66 EF STEQ 582/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 340/766 1/32 RERS17pb113-PT-1-04 97608 m, 274 m/sec, 541744 t fired, .

Time elapsed: 876 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 587/3306 0/5 RERS17pb113-PT-1-04 167617 t fired, 25 attempts, .
66 EF STEQ 587/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 345/766 1/32 RERS17pb113-PT-1-04 98973 m, 273 m/sec, 551057 t fired, .

Time elapsed: 881 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 592/3306 0/5 RERS17pb113-PT-1-04 169029 t fired, 25 attempts, .
66 EF STEQ 592/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 350/766 1/32 RERS17pb113-PT-1-04 100317 m, 268 m/sec, 560598 t fired, .

Time elapsed: 886 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 597/3306 0/5 RERS17pb113-PT-1-04 170448 t fired, 26 attempts, .
66 EF STEQ 597/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 355/766 1/32 RERS17pb113-PT-1-04 101755 m, 287 m/sec, 569406 t fired, .

Time elapsed: 891 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 602/3306 0/5 RERS17pb113-PT-1-04 171870 t fired, 26 attempts, .
66 EF STEQ 602/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 360/766 1/32 RERS17pb113-PT-1-04 102476 m, 144 m/sec, 574095 t fired, .

Time elapsed: 896 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 607/3306 0/5 RERS17pb113-PT-1-04 172658 t fired, 26 attempts, .
66 EF STEQ 607/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 365/766 1/32 RERS17pb113-PT-1-04 103193 m, 143 m/sec, 578895 t fired, .

Time elapsed: 901 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 612/3306 0/5 RERS17pb113-PT-1-04 173390 t fired, 26 attempts, .
66 EF STEQ 612/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 370/766 1/32 RERS17pb113-PT-1-04 103927 m, 146 m/sec, 584310 t fired, .

Time elapsed: 906 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 617/3306 0/5 RERS17pb113-PT-1-04 174127 t fired, 26 attempts, .
66 EF STEQ 617/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 375/766 1/32 RERS17pb113-PT-1-04 104680 m, 150 m/sec, 588376 t fired, .

Time elapsed: 911 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 622/3306 0/5 RERS17pb113-PT-1-04 174866 t fired, 26 attempts, .
66 EF STEQ 622/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 380/766 1/32 RERS17pb113-PT-1-04 105422 m, 148 m/sec, 592336 t fired, .

Time elapsed: 916 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 627/3306 0/5 RERS17pb113-PT-1-04 175738 t fired, 26 attempts, .
66 EF STEQ 627/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 385/766 1/32 RERS17pb113-PT-1-04 106495 m, 214 m/sec, 598915 t fired, .

Time elapsed: 921 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 632/3306 0/5 RERS17pb113-PT-1-04 176488 t fired, 26 attempts, .
66 EF STEQ 632/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 390/766 1/32 RERS17pb113-PT-1-04 108025 m, 306 m/sec, 606711 t fired, .

Time elapsed: 926 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 637/3306 0/5 RERS17pb113-PT-1-04 177238 t fired, 27 attempts, .
66 EF STEQ 637/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 395/766 1/32 RERS17pb113-PT-1-04 109550 m, 305 m/sec, 615831 t fired, .

Time elapsed: 931 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 642/3306 0/5 RERS17pb113-PT-1-04 177991 t fired, 27 attempts, .
66 EF STEQ 642/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 400/766 1/32 RERS17pb113-PT-1-04 111070 m, 304 m/sec, 623528 t fired, .

Time elapsed: 936 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 647/3306 0/5 RERS17pb113-PT-1-04 178738 t fired, 27 attempts, .
66 EF STEQ 647/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 405/766 1/32 RERS17pb113-PT-1-04 112577 m, 301 m/sec, 630935 t fired, .

Time elapsed: 941 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 652/3306 0/5 RERS17pb113-PT-1-04 179444 t fired, 27 attempts, .
66 EF STEQ 652/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 410/766 1/32 RERS17pb113-PT-1-04 114001 m, 284 m/sec, 638039 t fired, .

Time elapsed: 946 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 657/3306 0/5 RERS17pb113-PT-1-04 180369 t fired, 27 attempts, .
66 EF STEQ 657/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 415/766 1/32 RERS17pb113-PT-1-04 115436 m, 287 m/sec, 646322 t fired, .

Time elapsed: 951 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 662/3306 0/5 RERS17pb113-PT-1-04 181811 t fired, 27 attempts, .
66 EF STEQ 662/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 420/766 1/32 RERS17pb113-PT-1-04 116959 m, 304 m/sec, 654497 t fired, .

Time elapsed: 956 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 667/3306 0/5 RERS17pb113-PT-1-04 182552 t fired, 28 attempts, .
66 EF STEQ 667/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 425/766 1/32 RERS17pb113-PT-1-04 118460 m, 300 m/sec, 663406 t fired, .

Time elapsed: 961 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 672/3306 0/5 RERS17pb113-PT-1-04 183292 t fired, 28 attempts, .
66 EF STEQ 672/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 430/766 1/32 RERS17pb113-PT-1-04 119964 m, 300 m/sec, 671008 t fired, .

Time elapsed: 966 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 677/3306 0/5 RERS17pb113-PT-1-04 184037 t fired, 28 attempts, .
66 EF STEQ 677/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 435/766 1/32 RERS17pb113-PT-1-04 121474 m, 302 m/sec, 679020 t fired, .

Time elapsed: 971 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 682/3306 0/5 RERS17pb113-PT-1-04 184780 t fired, 28 attempts, .
66 EF STEQ 682/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 440/766 1/32 RERS17pb113-PT-1-04 122989 m, 303 m/sec, 687078 t fired, .

Time elapsed: 976 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 687/3306 0/5 RERS17pb113-PT-1-04 185553 t fired, 28 attempts, .
66 EF STEQ 687/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 445/766 1/32 RERS17pb113-PT-1-04 124508 m, 303 m/sec, 696951 t fired, .

Time elapsed: 981 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 692/3306 0/5 RERS17pb113-PT-1-04 186437 t fired, 28 attempts, .
66 EF STEQ 692/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 450/766 1/32 RERS17pb113-PT-1-04 126007 m, 299 m/sec, 706411 t fired, .

Time elapsed: 986 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 697/3306 0/5 RERS17pb113-PT-1-04 187648 t fired, 28 attempts, .
66 EF STEQ 697/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 455/766 1/32 RERS17pb113-PT-1-04 127511 m, 300 m/sec, 714885 t fired, .

Time elapsed: 991 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 702/3306 0/5 RERS17pb113-PT-1-04 189165 t fired, 28 attempts, .
66 EF STEQ 702/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 460/766 1/32 RERS17pb113-PT-1-04 128976 m, 293 m/sec, 723685 t fired, .

Time elapsed: 996 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 707/3306 0/5 RERS17pb113-PT-1-04 190691 t fired, 28 attempts, .
66 EF STEQ 707/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 465/766 1/32 RERS17pb113-PT-1-04 130436 m, 292 m/sec, 733552 t fired, .

Time elapsed: 1001 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 712/3306 0/5 RERS17pb113-PT-1-04 192042 t fired, 28 attempts, .
66 EF STEQ 712/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 470/766 1/32 RERS17pb113-PT-1-04 131864 m, 285 m/sec, 741745 t fired, .

Time elapsed: 1006 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 717/3306 0/5 RERS17pb113-PT-1-04 192794 t fired, 28 attempts, .
66 EF STEQ 717/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 475/766 1/32 RERS17pb113-PT-1-04 132910 m, 209 m/sec, 748992 t fired, .

Time elapsed: 1011 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 722/3306 0/5 RERS17pb113-PT-1-04 193777 t fired, 28 attempts, .
66 EF STEQ 722/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 480/766 1/32 RERS17pb113-PT-1-04 133954 m, 208 m/sec, 754844 t fired, .

Time elapsed: 1016 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 727/3306 0/5 RERS17pb113-PT-1-04 194878 t fired, 28 attempts, .
66 EF STEQ 727/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 485/766 1/32 RERS17pb113-PT-1-04 135057 m, 220 m/sec, 761287 t fired, .

Time elapsed: 1021 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 732/3306 0/5 RERS17pb113-PT-1-04 195801 t fired, 28 attempts, .
66 EF STEQ 732/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 490/766 1/32 RERS17pb113-PT-1-04 135996 m, 187 m/sec, 767617 t fired, .

Time elapsed: 1026 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 737/3306 0/5 RERS17pb113-PT-1-04 196536 t fired, 28 attempts, .
66 EF STEQ 737/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 495/766 1/32 RERS17pb113-PT-1-04 136714 m, 143 m/sec, 772424 t fired, .

Time elapsed: 1031 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 742/3306 0/5 RERS17pb113-PT-1-04 197249 t fired, 28 attempts, .
66 EF STEQ 742/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 500/766 1/32 RERS17pb113-PT-1-04 137427 m, 142 m/sec, 776736 t fired, .

Time elapsed: 1036 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 747/3306 0/5 RERS17pb113-PT-1-04 198588 t fired, 28 attempts, .
66 EF STEQ 747/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 505/766 1/32 RERS17pb113-PT-1-04 138664 m, 247 m/sec, 783762 t fired, .

Time elapsed: 1041 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 752/3306 0/5 RERS17pb113-PT-1-04 199985 t fired, 29 attempts, .
66 EF STEQ 752/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 510/766 1/32 RERS17pb113-PT-1-04 140105 m, 288 m/sec, 790874 t fired, .

Time elapsed: 1046 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 757/3306 0/5 RERS17pb113-PT-1-04 201406 t fired, 29 attempts, .
66 EF STEQ 757/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 515/766 1/32 RERS17pb113-PT-1-04 141594 m, 297 m/sec, 799496 t fired, .

Time elapsed: 1051 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 762/3306 0/5 RERS17pb113-PT-1-04 202741 t fired, 29 attempts, .
66 EF STEQ 762/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 520/766 1/32 RERS17pb113-PT-1-04 143045 m, 290 m/sec, 808026 t fired, .

Time elapsed: 1056 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 767/3306 0/5 RERS17pb113-PT-1-04 204001 t fired, 30 attempts, .
66 EF STEQ 767/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 525/766 1/32 RERS17pb113-PT-1-04 144411 m, 273 m/sec, 817056 t fired, .

Time elapsed: 1061 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 772/3306 0/5 RERS17pb113-PT-1-04 204747 t fired, 30 attempts, .
66 EF STEQ 772/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 530/766 1/32 RERS17pb113-PT-1-04 145179 m, 153 m/sec, 822229 t fired, .

Time elapsed: 1066 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 777/3306 0/5 RERS17pb113-PT-1-04 205410 t fired, 30 attempts, .
66 EF STEQ 777/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 535/766 1/32 RERS17pb113-PT-1-04 145853 m, 134 m/sec, 826059 t fired, .

Time elapsed: 1071 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 782/3306 0/5 RERS17pb113-PT-1-04 206191 t fired, 30 attempts, .
66 EF STEQ 782/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 540/766 1/32 RERS17pb113-PT-1-04 146956 m, 220 m/sec, 832755 t fired, .

Time elapsed: 1076 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 787/3306 0/5 RERS17pb113-PT-1-04 206898 t fired, 30 attempts, .
66 EF STEQ 787/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 545/766 1/32 RERS17pb113-PT-1-04 148394 m, 287 m/sec, 840505 t fired, .

Time elapsed: 1081 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 792/3306 0/5 RERS17pb113-PT-1-04 207594 t fired, 30 attempts, .
66 EF STEQ 792/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 550/766 1/32 RERS17pb113-PT-1-04 149790 m, 279 m/sec, 848602 t fired, .

Time elapsed: 1086 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 797/3306 0/5 RERS17pb113-PT-1-04 208299 t fired, 31 attempts, .
66 EF STEQ 797/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 555/766 1/32 RERS17pb113-PT-1-04 151228 m, 287 m/sec, 856844 t fired, .

Time elapsed: 1091 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 802/3306 0/5 RERS17pb113-PT-1-04 209076 t fired, 31 attempts, .
66 EF STEQ 802/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 560/766 1/32 RERS17pb113-PT-1-04 152677 m, 289 m/sec, 865954 t fired, .

Time elapsed: 1096 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 807/3306 0/5 RERS17pb113-PT-1-04 209852 t fired, 31 attempts, .
66 EF STEQ 807/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 565/766 1/32 RERS17pb113-PT-1-04 154151 m, 294 m/sec, 874798 t fired, .

Time elapsed: 1101 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 812/3306 0/5 RERS17pb113-PT-1-04 210553 t fired, 31 attempts, .
66 EF STEQ 812/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 570/766 1/32 RERS17pb113-PT-1-04 155597 m, 289 m/sec, 883389 t fired, .

Time elapsed: 1106 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 817/3306 0/5 RERS17pb113-PT-1-04 211257 t fired, 31 attempts, .
66 EF STEQ 817/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 575/766 1/32 RERS17pb113-PT-1-04 157056 m, 291 m/sec, 893399 t fired, .

Time elapsed: 1111 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 822/3306 0/5 RERS17pb113-PT-1-04 212031 t fired, 32 attempts, .
66 EF STEQ 822/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 580/766 1/32 RERS17pb113-PT-1-04 158569 m, 302 m/sec, 902972 t fired, .

Time elapsed: 1116 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 827/3306 0/5 RERS17pb113-PT-1-04 212747 t fired, 32 attempts, .
66 EF STEQ 827/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 585/766 1/32 RERS17pb113-PT-1-04 160038 m, 293 m/sec, 914012 t fired, .

Time elapsed: 1121 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 832/3306 0/5 RERS17pb113-PT-1-04 213462 t fired, 32 attempts, .
66 EF STEQ 832/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 590/766 1/32 RERS17pb113-PT-1-04 161504 m, 293 m/sec, 924961 t fired, .

Time elapsed: 1126 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 837/3306 0/5 RERS17pb113-PT-1-04 214201 t fired, 32 attempts, .
66 EF STEQ 837/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 595/766 1/32 RERS17pb113-PT-1-04 163015 m, 302 m/sec, 935296 t fired, .

Time elapsed: 1131 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 842/3306 0/5 RERS17pb113-PT-1-04 214944 t fired, 32 attempts, .
66 EF STEQ 842/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 600/766 1/32 RERS17pb113-PT-1-04 164552 m, 307 m/sec, 945010 t fired, .

Time elapsed: 1136 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 847/3306 0/5 RERS17pb113-PT-1-04 215701 t fired, 32 attempts, .
66 EF STEQ 847/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 605/766 1/32 RERS17pb113-PT-1-04 166104 m, 310 m/sec, 955937 t fired, .

Time elapsed: 1141 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 852/3306 0/5 RERS17pb113-PT-1-04 216446 t fired, 32 attempts, .
66 EF STEQ 852/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 610/766 1/32 RERS17pb113-PT-1-04 167635 m, 306 m/sec, 966204 t fired, .

Time elapsed: 1146 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 857/3306 0/5 RERS17pb113-PT-1-04 217147 t fired, 32 attempts, .
66 EF STEQ 857/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 615/766 1/32 RERS17pb113-PT-1-04 169066 m, 286 m/sec, 976711 t fired, .

Time elapsed: 1151 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 862/3306 0/5 RERS17pb113-PT-1-04 217857 t fired, 32 attempts, .
66 EF STEQ 862/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 620/766 1/32 RERS17pb113-PT-1-04 170508 m, 288 m/sec, 985932 t fired, .

Time elapsed: 1156 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 867/3306 0/5 RERS17pb113-PT-1-04 218892 t fired, 32 attempts, .
66 EF STEQ 867/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 625/766 1/32 RERS17pb113-PT-1-04 172036 m, 305 m/sec, 995209 t fired, .

Time elapsed: 1161 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 872/3306 0/5 RERS17pb113-PT-1-04 220410 t fired, 32 attempts, .
66 EF STEQ 872/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 630/766 1/32 RERS17pb113-PT-1-04 173600 m, 312 m/sec, 1004155 t fired, .

Time elapsed: 1166 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 877/3306 0/5 RERS17pb113-PT-1-04 221902 t fired, 32 attempts, .
66 EF STEQ 877/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 635/766 1/32 RERS17pb113-PT-1-04 175128 m, 305 m/sec, 1013717 t fired, .

Time elapsed: 1171 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 882/3306 0/5 RERS17pb113-PT-1-04 223399 t fired, 33 attempts, .
66 EF STEQ 882/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 640/766 1/32 RERS17pb113-PT-1-04 176695 m, 313 m/sec, 1024373 t fired, .

Time elapsed: 1176 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 887/3306 0/5 RERS17pb113-PT-1-04 224276 t fired, 33 attempts, .
66 EF STEQ 887/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 645/766 1/32 RERS17pb113-PT-1-04 178226 m, 306 m/sec, 1033986 t fired, .

Time elapsed: 1181 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 892/3306 0/5 RERS17pb113-PT-1-04 225019 t fired, 33 attempts, .
66 EF STEQ 892/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 650/766 1/32 RERS17pb113-PT-1-04 179756 m, 306 m/sec, 1044601 t fired, .

Time elapsed: 1186 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 897/3306 0/5 RERS17pb113-PT-1-04 225763 t fired, 33 attempts, .
66 EF STEQ 897/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 655/766 1/32 RERS17pb113-PT-1-04 181273 m, 303 m/sec, 1055188 t fired, .

Time elapsed: 1191 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 902/3306 0/5 RERS17pb113-PT-1-04 227225 t fired, 33 attempts, .
66 EF STEQ 902/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 660/766 1/32 RERS17pb113-PT-1-04 182840 m, 313 m/sec, 1065774 t fired, .

Time elapsed: 1196 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 907/3306 0/5 RERS17pb113-PT-1-04 228577 t fired, 33 attempts, .
66 EF STEQ 907/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 665/766 1/32 RERS17pb113-PT-1-04 184275 m, 287 m/sec, 1076704 t fired, .

Time elapsed: 1201 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 912/3306 0/5 RERS17pb113-PT-1-04 229943 t fired, 33 attempts, .
66 EF STEQ 912/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 670/766 1/32 RERS17pb113-PT-1-04 185744 m, 293 m/sec, 1087536 t fired, .

Time elapsed: 1206 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 917/3306 0/5 RERS17pb113-PT-1-04 231321 t fired, 33 attempts, .
66 EF STEQ 917/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 675/766 1/32 RERS17pb113-PT-1-04 187225 m, 296 m/sec, 1098757 t fired, .

Time elapsed: 1211 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 922/3306 0/5 RERS17pb113-PT-1-04 232046 t fired, 33 attempts, .
66 EF STEQ 922/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 680/766 1/32 RERS17pb113-PT-1-04 188707 m, 296 m/sec, 1110107 t fired, .

Time elapsed: 1216 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 927/3306 0/5 RERS17pb113-PT-1-04 232769 t fired, 33 attempts, .
66 EF STEQ 927/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 685/766 1/32 RERS17pb113-PT-1-04 190147 m, 288 m/sec, 1121901 t fired, .

Time elapsed: 1221 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 932/3306 0/5 RERS17pb113-PT-1-04 234123 t fired, 34 attempts, .
66 EF STEQ 932/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 690/766 1/32 RERS17pb113-PT-1-04 191629 m, 296 m/sec, 1131935 t fired, .

Time elapsed: 1226 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 937/3306 0/5 RERS17pb113-PT-1-04 235464 t fired, 34 attempts, .
66 EF STEQ 937/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 695/766 1/32 RERS17pb113-PT-1-04 193059 m, 286 m/sec, 1140402 t fired, .

Time elapsed: 1231 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 942/3306 0/5 RERS17pb113-PT-1-04 236812 t fired, 34 attempts, .
66 EF STEQ 942/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 700/766 1/32 RERS17pb113-PT-1-04 194493 m, 286 m/sec, 1147689 t fired, .

Time elapsed: 1236 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 947/3306 0/5 RERS17pb113-PT-1-04 238214 t fired, 35 attempts, .
66 EF STEQ 947/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 705/766 1/32 RERS17pb113-PT-1-04 195963 m, 294 m/sec, 1155711 t fired, .

Time elapsed: 1241 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 952/3306 0/5 RERS17pb113-PT-1-04 238891 t fired, 36 attempts, .
66 EF STEQ 952/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 710/766 1/32 RERS17pb113-PT-1-04 197319 m, 271 m/sec, 1164166 t fired, .

Time elapsed: 1246 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 957/3306 0/5 RERS17pb113-PT-1-04 239697 t fired, 36 attempts, .
66 EF STEQ 957/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 715/766 1/32 RERS17pb113-PT-1-04 198807 m, 297 m/sec, 1172707 t fired, .

Time elapsed: 1251 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 962/3306 0/5 RERS17pb113-PT-1-04 241099 t fired, 36 attempts, .
66 EF STEQ 962/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 720/766 1/32 RERS17pb113-PT-1-04 200236 m, 285 m/sec, 1181883 t fired, .

Time elapsed: 1256 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 967/3306 0/5 RERS17pb113-PT-1-04 242419 t fired, 36 attempts, .
66 EF STEQ 967/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 725/766 1/32 RERS17pb113-PT-1-04 201709 m, 294 m/sec, 1190298 t fired, .

Time elapsed: 1261 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 972/3306 0/5 RERS17pb113-PT-1-04 243906 t fired, 36 attempts, .
66 EF STEQ 972/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 730/766 1/32 RERS17pb113-PT-1-04 203138 m, 285 m/sec, 1198217 t fired, .

Time elapsed: 1266 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 977/3306 0/5 RERS17pb113-PT-1-04 245388 t fired, 36 attempts, .
66 EF STEQ 977/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 735/766 1/32 RERS17pb113-PT-1-04 204614 m, 295 m/sec, 1207453 t fired, .

Time elapsed: 1271 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 982/3306 0/5 RERS17pb113-PT-1-04 246822 t fired, 36 attempts, .
66 EF STEQ 982/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 740/766 1/32 RERS17pb113-PT-1-04 206007 m, 278 m/sec, 1216089 t fired, .

Time elapsed: 1276 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 987/3306 0/5 RERS17pb113-PT-1-04 248327 t fired, 37 attempts, .
66 EF STEQ 987/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 745/766 1/32 RERS17pb113-PT-1-04 207381 m, 274 m/sec, 1223020 t fired, .

Time elapsed: 1281 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 992/3306 0/5 RERS17pb113-PT-1-04 249809 t fired, 37 attempts, .
66 EF STEQ 992/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 750/766 1/32 RERS17pb113-PT-1-04 208687 m, 261 m/sec, 1229592 t fired, .

Time elapsed: 1286 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 997/3306 0/5 RERS17pb113-PT-1-04 251262 t fired, 38 attempts, .
66 EF STEQ 997/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 755/766 1/32 RERS17pb113-PT-1-04 210080 m, 278 m/sec, 1236475 t fired, .

Time elapsed: 1291 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1002/3306 0/5 RERS17pb113-PT-1-04 252475 t fired, 38 attempts, .
66 EF STEQ 1002/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 760/766 1/32 RERS17pb113-PT-1-04 211463 m, 276 m/sec, 1244870 t fired, .

Time elapsed: 1296 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 3 0 3 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1007/3306 0/5 RERS17pb113-PT-1-04 253388 t fired, 38 attempts, .
66 EF STEQ 1007/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 765/766 1/32 RERS17pb113-PT-1-04 212851 m, 277 m/sec, 1252832 t fired, .

Time elapsed: 1301 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
lola: CANCELED task # 67 (type EXCL) for RERS17pb113-PT-1-04 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 1 2 0 3 1 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1012/3306 0/5 RERS17pb113-PT-1-04 254501 t fired, 38 attempts, .
66 EF STEQ 1012/3306 0/5 RERS17pb113-PT-1-04 sara is running.

Time elapsed: 1306 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
lola: LAUNCH task # 74 (type EXCL) for 20 RERS17pb113-PT-1-04
lola: time limit : 764 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 67 (type EXCL) for 20 RERS17pb113-PT-1-04
lola: time limit : 2294 sec
lola: memory limit: 5 pages
lola: FINISHED task # 74 (type EXCL) for RERS17pb113-PT-1-04
lola: result : false
lola: markings : 1
lola: time used : 2.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1018/3306 0/5 RERS17pb113-PT-1-04 255356 t fired, 38 attempts, .
66 EF STEQ 1018/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 6/764 1/5 RERS17pb113-PT-1-04 660 m, -42438 m/sec, 659 t fired, .

Time elapsed: 1312 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1023/3306 0/5 RERS17pb113-PT-1-04 256115 t fired, 39 attempts, .
66 EF STEQ 1023/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 11/764 1/5 RERS17pb113-PT-1-04 1372 m, 142 m/sec, 1371 t fired, .

Time elapsed: 1317 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1028/3306 0/5 RERS17pb113-PT-1-04 256940 t fired, 39 attempts, .
66 EF STEQ 1028/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 16/764 1/5 RERS17pb113-PT-1-04 2366 m, 198 m/sec, 2365 t fired, .

Time elapsed: 1322 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1033/3306 0/5 RERS17pb113-PT-1-04 257658 t fired, 39 attempts, .
66 EF STEQ 1033/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 21/764 1/5 RERS17pb113-PT-1-04 3620 m, 250 m/sec, 3619 t fired, .

Time elapsed: 1327 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1038/3306 0/5 RERS17pb113-PT-1-04 258316 t fired, 40 attempts, .
66 EF STEQ 1038/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 26/764 1/5 RERS17pb113-PT-1-04 4835 m, 243 m/sec, 4834 t fired, .

Time elapsed: 1332 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1043/3306 0/5 RERS17pb113-PT-1-04 258973 t fired, 40 attempts, .
66 EF STEQ 1043/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 31/764 1/5 RERS17pb113-PT-1-04 6090 m, 251 m/sec, 6652 t fired, .

Time elapsed: 1337 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1048/3306 0/5 RERS17pb113-PT-1-04 259667 t fired, 40 attempts, .
66 EF STEQ 1048/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 36/764 1/5 RERS17pb113-PT-1-04 7433 m, 268 m/sec, 11948 t fired, .

Time elapsed: 1342 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1053/3306 0/5 RERS17pb113-PT-1-04 260352 t fired, 40 attempts, .
66 EF STEQ 1053/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 41/764 1/5 RERS17pb113-PT-1-04 8837 m, 280 m/sec, 17533 t fired, .

Time elapsed: 1347 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1058/3306 0/5 RERS17pb113-PT-1-04 261038 t fired, 40 attempts, .
66 EF STEQ 1058/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 46/764 1/5 RERS17pb113-PT-1-04 10293 m, 291 m/sec, 24504 t fired, .

Time elapsed: 1352 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1063/3306 0/5 RERS17pb113-PT-1-04 261734 t fired, 40 attempts, .
66 EF STEQ 1063/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 51/764 1/5 RERS17pb113-PT-1-04 11761 m, 293 m/sec, 31793 t fired, .

Time elapsed: 1357 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1068/3306 0/5 RERS17pb113-PT-1-04 262409 t fired, 40 attempts, .
66 EF STEQ 1068/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 56/764 1/5 RERS17pb113-PT-1-04 13181 m, 284 m/sec, 37742 t fired, .

Time elapsed: 1362 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1073/3306 0/5 RERS17pb113-PT-1-04 263070 t fired, 40 attempts, .
66 EF STEQ 1073/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 61/764 1/5 RERS17pb113-PT-1-04 14586 m, 281 m/sec, 44635 t fired, .

Time elapsed: 1367 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1078/3306 0/5 RERS17pb113-PT-1-04 263749 t fired, 40 attempts, .
66 EF STEQ 1078/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 66/764 1/5 RERS17pb113-PT-1-04 15936 m, 270 m/sec, 51447 t fired, .

Time elapsed: 1372 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1083/3306 0/5 RERS17pb113-PT-1-04 264412 t fired, 40 attempts, .
66 EF STEQ 1083/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 71/764 1/5 RERS17pb113-PT-1-04 17294 m, 271 m/sec, 59065 t fired, .

Time elapsed: 1377 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1088/3306 0/5 RERS17pb113-PT-1-04 265049 t fired, 40 attempts, .
66 EF STEQ 1088/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 76/764 1/5 RERS17pb113-PT-1-04 18633 m, 267 m/sec, 67232 t fired, .

Time elapsed: 1382 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1093/3306 0/5 RERS17pb113-PT-1-04 265728 t fired, 40 attempts, .
66 EF STEQ 1093/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 81/764 1/5 RERS17pb113-PT-1-04 20038 m, 281 m/sec, 74668 t fired, .

Time elapsed: 1387 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1098/3306 0/5 RERS17pb113-PT-1-04 266435 t fired, 40 attempts, .
66 EF STEQ 1098/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 86/764 1/5 RERS17pb113-PT-1-04 21469 m, 286 m/sec, 81777 t fired, .

Time elapsed: 1392 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1103/3306 0/5 RERS17pb113-PT-1-04 267071 t fired, 40 attempts, .
66 EF STEQ 1103/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 91/764 1/5 RERS17pb113-PT-1-04 22849 m, 276 m/sec, 88707 t fired, .

Time elapsed: 1397 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1108/3306 0/5 RERS17pb113-PT-1-04 267762 t fired, 41 attempts, .
66 EF STEQ 1108/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 96/764 1/5 RERS17pb113-PT-1-04 24018 m, 233 m/sec, 94896 t fired, .

Time elapsed: 1402 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1113/3306 0/5 RERS17pb113-PT-1-04 268521 t fired, 41 attempts, .
66 EF STEQ 1113/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 101/764 1/5 RERS17pb113-PT-1-04 25409 m, 278 m/sec, 103267 t fired, .

Time elapsed: 1407 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1118/3306 0/5 RERS17pb113-PT-1-04 269499 t fired, 41 attempts, .
66 EF STEQ 1118/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 106/764 1/5 RERS17pb113-PT-1-04 26894 m, 297 m/sec, 111521 t fired, .

Time elapsed: 1412 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1123/3306 0/5 RERS17pb113-PT-1-04 270257 t fired, 41 attempts, .
66 EF STEQ 1123/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 111/764 1/5 RERS17pb113-PT-1-04 28369 m, 295 m/sec, 119853 t fired, .

Time elapsed: 1417 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1128/3306 0/5 RERS17pb113-PT-1-04 271013 t fired, 42 attempts, .
66 EF STEQ 1128/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 116/764 1/5 RERS17pb113-PT-1-04 29863 m, 298 m/sec, 128920 t fired, .

Time elapsed: 1422 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1133/3306 0/5 RERS17pb113-PT-1-04 271715 t fired, 42 attempts, .
66 EF STEQ 1133/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 121/764 1/5 RERS17pb113-PT-1-04 31261 m, 279 m/sec, 137538 t fired, .

Time elapsed: 1427 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1138/3306 0/5 RERS17pb113-PT-1-04 272422 t fired, 42 attempts, .
66 EF STEQ 1138/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 126/764 1/5 RERS17pb113-PT-1-04 32597 m, 267 m/sec, 146851 t fired, .

Time elapsed: 1432 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1143/3306 0/5 RERS17pb113-PT-1-04 273153 t fired, 42 attempts, .
66 EF STEQ 1143/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 131/764 1/5 RERS17pb113-PT-1-04 33914 m, 263 m/sec, 155564 t fired, .

Time elapsed: 1437 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1148/3306 0/5 RERS17pb113-PT-1-04 274206 t fired, 42 attempts, .
66 EF STEQ 1148/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 136/764 1/5 RERS17pb113-PT-1-04 35135 m, 244 m/sec, 162991 t fired, .

Time elapsed: 1442 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1153/3306 0/5 RERS17pb113-PT-1-04 275692 t fired, 43 attempts, .
66 EF STEQ 1153/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 141/764 1/5 RERS17pb113-PT-1-04 36461 m, 265 m/sec, 169862 t fired, .

Time elapsed: 1447 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1158/3306 0/5 RERS17pb113-PT-1-04 277236 t fired, 43 attempts, .
66 EF STEQ 1158/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 146/764 1/5 RERS17pb113-PT-1-04 37787 m, 265 m/sec, 176222 t fired, .

Time elapsed: 1452 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16

FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1163/3306 0/5 RERS17pb113-PT-1-04 278781 t fired, 44 attempts, .
66 EF STEQ 1163/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 151/764 1/5 RERS17pb113-PT-1-04 39197 m, 282 m/sec, 182348 t fired, .

Time elapsed: 1457 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1168/3306 0/5 RERS17pb113-PT-1-04 280323 t fired, 44 attempts, .
66 EF STEQ 1168/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 156/764 1/5 RERS17pb113-PT-1-04 40648 m, 290 m/sec, 190032 t fired, .

Time elapsed: 1462 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1173/3306 0/5 RERS17pb113-PT-1-04 281868 t fired, 44 attempts, .
66 EF STEQ 1173/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 161/764 1/5 RERS17pb113-PT-1-04 42093 m, 289 m/sec, 198312 t fired, .

Time elapsed: 1467 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 3 0 4 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1178/3306 0/5 RERS17pb113-PT-1-04 283277 t fired, 44 attempts, .
66 EF STEQ 1178/3306 0/5 RERS17pb113-PT-1-04 sara is running.
67 EF EXCL 166/764 1/5 RERS17pb113-PT-1-04 43448 m, 271 m/sec, 207140 t fired, .

Time elapsed: 1472 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
lola: FINISHED task # 66 (type EQUN) for RERS17pb113-PT-1-04
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1183/3306 0/5 RERS17pb113-PT-1-04 284726 t fired, 44 attempts, .
67 EF EXCL 171/764 1/5 RERS17pb113-PT-1-04 44831 m, 276 m/sec, 215675 t fired, .

Time elapsed: 1477 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1188/3306 0/5 RERS17pb113-PT-1-04 286267 t fired, 44 attempts, .
67 EF EXCL 176/764 1/5 RERS17pb113-PT-1-04 45970 m, 227 m/sec, 222277 t fired, .

Time elapsed: 1482 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1193/3306 0/5 RERS17pb113-PT-1-04 287813 t fired, 44 attempts, .
67 EF EXCL 181/764 1/5 RERS17pb113-PT-1-04 47243 m, 254 m/sec, 228286 t fired, .

Time elapsed: 1487 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1198/3306 0/5 RERS17pb113-PT-1-04 289361 t fired, 44 attempts, .
67 EF EXCL 186/764 1/5 RERS17pb113-PT-1-04 48666 m, 284 m/sec, 235627 t fired, .

Time elapsed: 1492 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1203/3306 0/5 RERS17pb113-PT-1-04 290823 t fired, 45 attempts, .
67 EF EXCL 191/764 1/5 RERS17pb113-PT-1-04 49868 m, 240 m/sec, 241334 t fired, .

Time elapsed: 1497 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1208/3306 0/5 RERS17pb113-PT-1-04 292295 t fired, 46 attempts, .
67 EF EXCL 196/764 1/5 RERS17pb113-PT-1-04 51114 m, 249 m/sec, 248493 t fired, .

Time elapsed: 1502 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1213/3306 0/5 RERS17pb113-PT-1-04 293722 t fired, 46 attempts, .
67 EF EXCL 201/764 1/5 RERS17pb113-PT-1-04 52513 m, 279 m/sec, 257133 t fired, .

Time elapsed: 1507 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1218/3306 0/5 RERS17pb113-PT-1-04 295252 t fired, 46 attempts, .
67 EF EXCL 206/764 1/5 RERS17pb113-PT-1-04 54014 m, 300 m/sec, 265605 t fired, .

Time elapsed: 1512 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1223/3306 0/5 RERS17pb113-PT-1-04 296753 t fired, 47 attempts, .
67 EF EXCL 211/764 1/5 RERS17pb113-PT-1-04 55495 m, 296 m/sec, 273716 t fired, .

Time elapsed: 1517 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1228/3306 0/5 RERS17pb113-PT-1-04 298190 t fired, 47 attempts, .
67 EF EXCL 216/764 1/5 RERS17pb113-PT-1-04 56928 m, 286 m/sec, 280682 t fired, .

Time elapsed: 1522 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1233/3306 0/5 RERS17pb113-PT-1-04 299611 t fired, 47 attempts, .
67 EF EXCL 221/764 1/5 RERS17pb113-PT-1-04 58345 m, 283 m/sec, 287931 t fired, .

Time elapsed: 1527 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1238/3306 0/5 RERS17pb113-PT-1-04 301138 t fired, 47 attempts, .
67 EF EXCL 226/764 1/5 RERS17pb113-PT-1-04 59882 m, 307 m/sec, 296572 t fired, .

Time elapsed: 1532 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1243/3306 0/5 RERS17pb113-PT-1-04 302680 t fired, 47 attempts, .
67 EF EXCL 231/764 1/5 RERS17pb113-PT-1-04 61419 m, 307 m/sec, 305580 t fired, .

Time elapsed: 1537 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1248/3306 0/5 RERS17pb113-PT-1-04 304208 t fired, 47 attempts, .
67 EF EXCL 236/764 1/5 RERS17pb113-PT-1-04 62939 m, 304 m/sec, 313598 t fired, .

Time elapsed: 1542 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1253/3306 0/5 RERS17pb113-PT-1-04 305709 t fired, 47 attempts, .
67 EF EXCL 241/764 1/5 RERS17pb113-PT-1-04 64427 m, 297 m/sec, 322183 t fired, .

Time elapsed: 1547 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1258/3306 0/5 RERS17pb113-PT-1-04 307132 t fired, 47 attempts, .
67 EF EXCL 246/764 1/5 RERS17pb113-PT-1-04 65832 m, 281 m/sec, 330380 t fired, .

Time elapsed: 1552 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1263/3306 0/5 RERS17pb113-PT-1-04 308614 t fired, 48 attempts, .
67 EF EXCL 251/764 1/5 RERS17pb113-PT-1-04 67284 m, 290 m/sec, 339377 t fired, .

Time elapsed: 1557 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1268/3306 0/5 RERS17pb113-PT-1-04 310083 t fired, 48 attempts, .
67 EF EXCL 256/764 1/5 RERS17pb113-PT-1-04 68734 m, 290 m/sec, 349134 t fired, .

Time elapsed: 1562 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1273/3306 0/5 RERS17pb113-PT-1-04 311633 t fired, 48 attempts, .
67 EF EXCL 261/764 1/5 RERS17pb113-PT-1-04 70254 m, 304 m/sec, 359950 t fired, .

Time elapsed: 1567 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1278/3306 0/5 RERS17pb113-PT-1-04 313157 t fired, 48 attempts, .
67 EF EXCL 266/764 1/5 RERS17pb113-PT-1-04 71761 m, 301 m/sec, 369770 t fired, .

Time elapsed: 1572 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1283/3306 0/5 RERS17pb113-PT-1-04 314677 t fired, 48 attempts, .
67 EF EXCL 271/764 1/5 RERS17pb113-PT-1-04 73291 m, 306 m/sec, 379100 t fired, .

Time elapsed: 1577 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1288/3306 0/5 RERS17pb113-PT-1-04 316155 t fired, 48 attempts, .
67 EF EXCL 276/764 1/5 RERS17pb113-PT-1-04 74770 m, 295 m/sec, 387327 t fired, .

Time elapsed: 1582 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1293/3306 0/5 RERS17pb113-PT-1-04 317658 t fired, 48 attempts, .
67 EF EXCL 281/764 1/5 RERS17pb113-PT-1-04 76243 m, 294 m/sec, 396096 t fired, .

Time elapsed: 1587 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1298/3306 0/5 RERS17pb113-PT-1-04 319144 t fired, 49 attempts, .
67 EF EXCL 286/764 1/5 RERS17pb113-PT-1-04 77706 m, 292 m/sec, 405028 t fired, .

Time elapsed: 1592 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1303/3306 0/5 RERS17pb113-PT-1-04 320658 t fired, 49 attempts, .
67 EF EXCL 291/764 1/5 RERS17pb113-PT-1-04 79186 m, 296 m/sec, 414789 t fired, .

Time elapsed: 1597 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1308/3306 0/5 RERS17pb113-PT-1-04 322165 t fired, 49 attempts, .
67 EF EXCL 296/764 1/5 RERS17pb113-PT-1-04 80661 m, 295 m/sec, 425073 t fired, .

Time elapsed: 1602 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1313/3306 0/5 RERS17pb113-PT-1-04 323679 t fired, 49 attempts, .
67 EF EXCL 301/764 1/5 RERS17pb113-PT-1-04 82132 m, 294 m/sec, 435138 t fired, .

Time elapsed: 1607 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1318/3306 0/5 RERS17pb113-PT-1-04 325191 t fired, 50 attempts, .
67 EF EXCL 306/764 1/5 RERS17pb113-PT-1-04 83604 m, 294 m/sec, 444717 t fired, .

Time elapsed: 1612 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1323/3306 0/5 RERS17pb113-PT-1-04 326651 t fired, 50 attempts, .
67 EF EXCL 311/764 1/5 RERS17pb113-PT-1-04 85032 m, 285 m/sec, 454702 t fired, .

Time elapsed: 1617 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1328/3306 0/5 RERS17pb113-PT-1-04 328053 t fired, 50 attempts, .
67 EF EXCL 316/764 1/5 RERS17pb113-PT-1-04 85707 m, 135 m/sec, 459407 t fired, .

Time elapsed: 1622 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1333/3306 0/5 RERS17pb113-PT-1-04 329467 t fired, 50 attempts, .
67 EF EXCL 321/764 1/5 RERS17pb113-PT-1-04 86412 m, 141 m/sec, 464470 t fired, .

Time elapsed: 1627 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1338/3306 0/5 RERS17pb113-PT-1-04 330892 t fired, 50 attempts, .
67 EF EXCL 326/764 1/5 RERS17pb113-PT-1-04 87784 m, 274 m/sec, 475073 t fired, .

Time elapsed: 1632 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1343/3306 0/5 RERS17pb113-PT-1-04 332336 t fired, 50 attempts, .
67 EF EXCL 331/764 1/5 RERS17pb113-PT-1-04 89173 m, 277 m/sec, 486080 t fired, .

Time elapsed: 1637 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1348/3306 0/5 RERS17pb113-PT-1-04 333767 t fired, 51 attempts, .
67 EF EXCL 336/764 1/5 RERS17pb113-PT-1-04 90438 m, 253 m/sec, 496158 t fired, .

Time elapsed: 1642 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1353/3306 0/5 RERS17pb113-PT-1-04 335284 t fired, 51 attempts, .
67 EF EXCL 341/764 1/5 RERS17pb113-PT-1-04 91568 m, 226 m/sec, 503963 t fired, .

Time elapsed: 1647 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1358/3306 0/5 RERS17pb113-PT-1-04 336824 t fired, 51 attempts, .
67 EF EXCL 346/764 1/5 RERS17pb113-PT-1-04 92884 m, 263 m/sec, 513465 t fired, .

Time elapsed: 1652 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1363/3306 0/5 RERS17pb113-PT-1-04 338345 t fired, 51 attempts, .
67 EF EXCL 351/764 1/5 RERS17pb113-PT-1-04 94331 m, 289 m/sec, 522302 t fired, .

Time elapsed: 1657 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1368/3306 0/5 RERS17pb113-PT-1-04 339879 t fired, 52 attempts, .
67 EF EXCL 356/764 1/5 RERS17pb113-PT-1-04 95837 m, 301 m/sec, 531434 t fired, .

Time elapsed: 1662 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1373/3306 0/5 RERS17pb113-PT-1-04 341411 t fired, 53 attempts, .
67 EF EXCL 361/764 1/5 RERS17pb113-PT-1-04 97318 m, 296 m/sec, 539927 t fired, .

Time elapsed: 1667 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1378/3306 0/5 RERS17pb113-PT-1-04 342954 t fired, 53 attempts, .
67 EF EXCL 366/764 1/5 RERS17pb113-PT-1-04 98836 m, 303 m/sec, 550108 t fired, .

Time elapsed: 1672 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1383/3306 0/5 RERS17pb113-PT-1-04 344491 t fired, 53 attempts, .
67 EF EXCL 371/764 1/5 RERS17pb113-PT-1-04 100332 m, 299 m/sec, 560694 t fired, .

Time elapsed: 1677 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1388/3306 0/5 RERS17pb113-PT-1-04 346028 t fired, 54 attempts, .
67 EF EXCL 376/764 1/5 RERS17pb113-PT-1-04 101602 m, 254 m/sec, 568410 t fired, .

Time elapsed: 1682 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1393/3306 0/5 RERS17pb113-PT-1-04 347577 t fired, 54 attempts, .
67 EF EXCL 381/764 1/5 RERS17pb113-PT-1-04 103102 m, 300 m/sec, 578256 t fired, .

Time elapsed: 1687 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1398/3306 0/5 RERS17pb113-PT-1-04 349125 t fired, 54 attempts, .
67 EF EXCL 386/764 1/5 RERS17pb113-PT-1-04 104620 m, 303 m/sec, 588088 t fired, .

Time elapsed: 1692 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1403/3306 0/5 RERS17pb113-PT-1-04 350594 t fired, 54 attempts, .
67 EF EXCL 391/764 1/5 RERS17pb113-PT-1-04 106043 m, 284 m/sec, 596042 t fired, .

Time elapsed: 1697 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1408/3306 0/5 RERS17pb113-PT-1-04 352112 t fired, 54 attempts, .
67 EF EXCL 396/764 1/5 RERS17pb113-PT-1-04 107516 m, 294 m/sec, 604272 t fired, .

Time elapsed: 1702 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1413/3306 0/5 RERS17pb113-PT-1-04 353652 t fired, 54 attempts, .
67 EF EXCL 401/764 1/5 RERS17pb113-PT-1-04 109031 m, 303 m/sec, 612483 t fired, .

Time elapsed: 1707 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1418/3306 0/5 RERS17pb113-PT-1-04 355163 t fired, 55 attempts, .
67 EF EXCL 406/764 1/5 RERS17pb113-PT-1-04 110511 m, 296 m/sec, 620993 t fired, .

Time elapsed: 1712 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1423/3306 0/5 RERS17pb113-PT-1-04 356700 t fired, 56 attempts, .
67 EF EXCL 411/764 1/5 RERS17pb113-PT-1-04 112028 m, 303 m/sec, 628346 t fired, .

Time elapsed: 1717 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1428/3306 0/5 RERS17pb113-PT-1-04 358104 t fired, 56 attempts, .
67 EF EXCL 416/764 1/5 RERS17pb113-PT-1-04 113409 m, 276 m/sec, 635088 t fired, .

Time elapsed: 1722 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1433/3306 0/5 RERS17pb113-PT-1-04 359467 t fired, 56 attempts, .
67 EF EXCL 421/764 1/5 RERS17pb113-PT-1-04 114787 m, 275 m/sec, 642583 t fired, .

Time elapsed: 1727 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1438/3306 0/5 RERS17pb113-PT-1-04 360934 t fired, 56 attempts, .
67 EF EXCL 426/764 1/5 RERS17pb113-PT-1-04 116237 m, 290 m/sec, 650929 t fired, .

Time elapsed: 1732 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1443/3306 0/5 RERS17pb113-PT-1-04 362431 t fired, 56 attempts, .
67 EF EXCL 431/764 1/5 RERS17pb113-PT-1-04 117713 m, 295 m/sec, 658812 t fired, .

Time elapsed: 1737 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1448/3306 0/5 RERS17pb113-PT-1-04 363839 t fired, 56 attempts, .
67 EF EXCL 436/764 1/5 RERS17pb113-PT-1-04 119217 m, 300 m/sec, 666912 t fired, .

Time elapsed: 1742 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1453/3306 0/5 RERS17pb113-PT-1-04 365291 t fired, 56 attempts, .
67 EF EXCL 441/764 1/5 RERS17pb113-PT-1-04 120682 m, 293 m/sec, 674904 t fired, .

Time elapsed: 1747 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1458/3306 0/5 RERS17pb113-PT-1-04 366729 t fired, 57 attempts, .
67 EF EXCL 446/764 1/5 RERS17pb113-PT-1-04 122150 m, 293 m/sec, 682692 t fired, .

Time elapsed: 1752 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1463/3306 0/5 RERS17pb113-PT-1-04 368098 t fired, 57 attempts, .
67 EF EXCL 451/764 1/5 RERS17pb113-PT-1-04 123648 m, 299 m/sec, 691185 t fired, .

Time elapsed: 1757 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1468/3306 0/5 RERS17pb113-PT-1-04 369510 t fired, 58 attempts, .
67 EF EXCL 456/764 1/5 RERS17pb113-PT-1-04 125145 m, 299 m/sec, 701097 t fired, .

Time elapsed: 1762 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1473/3306 0/5 RERS17pb113-PT-1-04 370889 t fired, 58 attempts, .
67 EF EXCL 461/764 1/5 RERS17pb113-PT-1-04 126667 m, 304 m/sec, 710302 t fired, .

Time elapsed: 1767 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1478/3306 0/5 RERS17pb113-PT-1-04 372365 t fired, 58 attempts, .
67 EF EXCL 466/764 1/5 RERS17pb113-PT-1-04 128142 m, 295 m/sec, 718585 t fired, .

Time elapsed: 1772 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1483/3306 0/5 RERS17pb113-PT-1-04 373823 t fired, 58 attempts, .
67 EF EXCL 471/764 1/5 RERS17pb113-PT-1-04 129641 m, 299 m/sec, 728339 t fired, .

Time elapsed: 1777 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1488/3306 0/5 RERS17pb113-PT-1-04 375341 t fired, 58 attempts, .
67 EF EXCL 476/764 1/5 RERS17pb113-PT-1-04 131123 m, 296 m/sec, 737148 t fired, .

Time elapsed: 1782 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1493/3306 0/5 RERS17pb113-PT-1-04 376871 t fired, 59 attempts, .
67 EF EXCL 481/764 1/5 RERS17pb113-PT-1-04 132611 m, 297 m/sec, 746865 t fired, .

Time elapsed: 1787 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1498/3306 0/5 RERS17pb113-PT-1-04 378400 t fired, 59 attempts, .
67 EF EXCL 486/764 1/5 RERS17pb113-PT-1-04 133962 m, 270 m/sec, 754893 t fired, .

Time elapsed: 1792 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1503/3306 0/5 RERS17pb113-PT-1-04 379932 t fired, 59 attempts, .
67 EF EXCL 491/764 1/5 RERS17pb113-PT-1-04 135446 m, 296 m/sec, 764107 t fired, .

Time elapsed: 1797 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1508/3306 0/5 RERS17pb113-PT-1-04 381455 t fired, 60 attempts, .
67 EF EXCL 496/764 1/5 RERS17pb113-PT-1-04 136897 m, 290 m/sec, 773663 t fired, .

Time elapsed: 1802 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1513/3306 0/5 RERS17pb113-PT-1-04 382941 t fired, 60 attempts, .
67 EF EXCL 501/764 1/5 RERS17pb113-PT-1-04 138350 m, 290 m/sec, 782348 t fired, .

Time elapsed: 1807 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1518/3306 0/5 RERS17pb113-PT-1-04 384343 t fired, 61 attempts, .
67 EF EXCL 506/764 1/5 RERS17pb113-PT-1-04 139861 m, 302 m/sec, 789774 t fired, .

Time elapsed: 1812 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1523/3306 0/5 RERS17pb113-PT-1-04 385728 t fired, 61 attempts, .
67 EF EXCL 511/764 1/5 RERS17pb113-PT-1-04 141319 m, 291 m/sec, 798010 t fired, .

Time elapsed: 1817 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1528/3306 0/5 RERS17pb113-PT-1-04 387057 t fired, 61 attempts, .
67 EF EXCL 516/764 1/5 RERS17pb113-PT-1-04 142647 m, 265 m/sec, 805379 t fired, .

Time elapsed: 1822 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1533/3306 0/5 RERS17pb113-PT-1-04 388463 t fired, 61 attempts, .
67 EF EXCL 521/764 1/5 RERS17pb113-PT-1-04 143963 m, 263 m/sec, 813783 t fired, .

Time elapsed: 1827 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1538/3306 0/5 RERS17pb113-PT-1-04 389884 t fired, 61 attempts, .
67 EF EXCL 526/764 1/5 RERS17pb113-PT-1-04 145257 m, 258 m/sec, 822769 t fired, .

Time elapsed: 1832 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1543/3306 0/5 RERS17pb113-PT-1-04 391340 t fired, 61 attempts, .
67 EF EXCL 531/764 1/5 RERS17pb113-PT-1-04 146785 m, 305 m/sec, 831820 t fired, .

Time elapsed: 1837 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1548/3306 0/5 RERS17pb113-PT-1-04 392733 t fired, 62 attempts, .
67 EF EXCL 536/764 1/5 RERS17pb113-PT-1-04 148231 m, 289 m/sec, 839679 t fired, .

Time elapsed: 1842 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1553/3306 0/5 RERS17pb113-PT-1-04 394099 t fired, 63 attempts, .
67 EF EXCL 541/764 1/5 RERS17pb113-PT-1-04 149604 m, 274 m/sec, 847410 t fired, .

Time elapsed: 1847 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1558/3306 0/5 RERS17pb113-PT-1-04 395451 t fired, 63 attempts, .
67 EF EXCL 546/764 1/5 RERS17pb113-PT-1-04 151004 m, 280 m/sec, 855681 t fired, .

Time elapsed: 1852 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1563/3306 0/5 RERS17pb113-PT-1-04 396798 t fired, 63 attempts, .
67 EF EXCL 551/764 1/5 RERS17pb113-PT-1-04 152381 m, 275 m/sec, 864104 t fired, .

Time elapsed: 1857 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1568/3306 0/5 RERS17pb113-PT-1-04 398173 t fired, 63 attempts, .
67 EF EXCL 556/764 1/5 RERS17pb113-PT-1-04 153777 m, 279 m/sec, 873055 t fired, .

Time elapsed: 1862 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1573/3306 0/5 RERS17pb113-PT-1-04 399640 t fired, 63 attempts, .
67 EF EXCL 561/764 1/5 RERS17pb113-PT-1-04 155247 m, 294 m/sec, 881311 t fired, .

Time elapsed: 1867 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1578/3306 0/5 RERS17pb113-PT-1-04 401128 t fired, 63 attempts, .
67 EF EXCL 566/764 1/5 RERS17pb113-PT-1-04 156793 m, 309 m/sec, 891602 t fired, .

Time elapsed: 1872 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1583/3306 0/5 RERS17pb113-PT-1-04 402606 t fired, 64 attempts, .
67 EF EXCL 571/764 1/5 RERS17pb113-PT-1-04 158316 m, 304 m/sec, 901199 t fired, .

Time elapsed: 1877 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1588/3306 0/5 RERS17pb113-PT-1-04 404015 t fired, 64 attempts, .
67 EF EXCL 576/764 1/5 RERS17pb113-PT-1-04 159766 m, 290 m/sec, 911805 t fired, .

Time elapsed: 1882 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1593/3306 0/5 RERS17pb113-PT-1-04 405467 t fired, 64 attempts, .
67 EF EXCL 581/764 1/5 RERS17pb113-PT-1-04 161229 m, 292 m/sec, 923189 t fired, .

Time elapsed: 1887 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1598/3306 0/5 RERS17pb113-PT-1-04 406857 t fired, 64 attempts, .
67 EF EXCL 586/764 1/5 RERS17pb113-PT-1-04 162772 m, 308 m/sec, 933585 t fired, .

Time elapsed: 1892 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1603/3306 0/5 RERS17pb113-PT-1-04 408277 t fired, 65 attempts, .
67 EF EXCL 591/764 1/5 RERS17pb113-PT-1-04 163464 m, 138 m/sec, 938136 t fired, .

Time elapsed: 1897 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1608/3306 0/5 RERS17pb113-PT-1-04 409689 t fired, 65 attempts, .
67 EF EXCL 596/764 1/5 RERS17pb113-PT-1-04 164744 m, 256 m/sec, 946198 t fired, .

Time elapsed: 1902 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1613/3306 0/5 RERS17pb113-PT-1-04 411174 t fired, 65 attempts, .
67 EF EXCL 601/764 1/5 RERS17pb113-PT-1-04 165840 m, 219 m/sec, 954159 t fired, .

Time elapsed: 1907 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1618/3306 0/5 RERS17pb113-PT-1-04 412685 t fired, 66 attempts, .
67 EF EXCL 606/764 1/5 RERS17pb113-PT-1-04 167205 m, 273 m/sec, 963119 t fired, .

Time elapsed: 1912 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1623/3306 0/5 RERS17pb113-PT-1-04 414164 t fired, 66 attempts, .
67 EF EXCL 611/764 1/5 RERS17pb113-PT-1-04 168317 m, 222 m/sec, 971212 t fired, .

Time elapsed: 1917 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1628/3306 0/5 RERS17pb113-PT-1-04 415553 t fired, 67 attempts, .
67 EF EXCL 616/764 1/5 RERS17pb113-PT-1-04 169699 m, 276 m/sec, 981383 t fired, .

Time elapsed: 1922 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1633/3306 0/5 RERS17pb113-PT-1-04 416981 t fired, 68 attempts, .
67 EF EXCL 621/764 1/5 RERS17pb113-PT-1-04 171121 m, 284 m/sec, 989790 t fired, .

Time elapsed: 1927 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1638/3306 0/5 RERS17pb113-PT-1-04 418324 t fired, 68 attempts, .
67 EF EXCL 626/764 1/5 RERS17pb113-PT-1-04 172501 m, 276 m/sec, 998176 t fired, .

Time elapsed: 1932 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1643/3306 0/5 RERS17pb113-PT-1-04 419744 t fired, 68 attempts, .
67 EF EXCL 631/764 1/5 RERS17pb113-PT-1-04 173915 m, 282 m/sec, 1005927 t fired, .

Time elapsed: 1937 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1648/3306 0/5 RERS17pb113-PT-1-04 421207 t fired, 68 attempts, .
67 EF EXCL 636/764 1/5 RERS17pb113-PT-1-04 175332 m, 283 m/sec, 1015286 t fired, .

Time elapsed: 1942 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1653/3306 0/5 RERS17pb113-PT-1-04 422625 t fired, 69 attempts, .
67 EF EXCL 641/764 1/5 RERS17pb113-PT-1-04 176088 m, 151 m/sec, 1020386 t fired, .

Time elapsed: 1947 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1658/3306 0/5 RERS17pb113-PT-1-04 424043 t fired, 69 attempts, .
67 EF EXCL 646/764 1/5 RERS17pb113-PT-1-04 176898 m, 162 m/sec, 1025642 t fired, .

Time elapsed: 1952 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1663/3306 0/5 RERS17pb113-PT-1-04 425474 t fired, 69 attempts, .
67 EF EXCL 651/764 1/5 RERS17pb113-PT-1-04 177825 m, 185 m/sec, 1031182 t fired, .

Time elapsed: 1957 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1668/3306 0/5 RERS17pb113-PT-1-04 427010 t fired, 69 attempts, .
67 EF EXCL 656/764 1/5 RERS17pb113-PT-1-04 178811 m, 197 m/sec, 1038030 t fired, .

Time elapsed: 1962 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1673/3306 0/5 RERS17pb113-PT-1-04 428529 t fired, 69 attempts, .
67 EF EXCL 661/764 1/5 RERS17pb113-PT-1-04 179566 m, 151 m/sec, 1043365 t fired, .

Time elapsed: 1967 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1678/3306 0/5 RERS17pb113-PT-1-04 429937 t fired, 69 attempts, .
67 EF EXCL 666/764 1/5 RERS17pb113-PT-1-04 180436 m, 174 m/sec, 1049166 t fired, .

Time elapsed: 1972 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1683/3306 0/5 RERS17pb113-PT-1-04 430701 t fired, 69 attempts, .
67 EF EXCL 671/764 1/5 RERS17pb113-PT-1-04 181951 m, 303 m/sec, 1059535 t fired, .

Time elapsed: 1977 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1688/3306 0/5 RERS17pb113-PT-1-04 431839 t fired, 69 attempts, .
67 EF EXCL 676/764 1/5 RERS17pb113-PT-1-04 183335 m, 276 m/sec, 1069043 t fired, .

Time elapsed: 1982 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1693/3306 0/5 RERS17pb113-PT-1-04 433289 t fired, 69 attempts, .
67 EF EXCL 681/764 1/5 RERS17pb113-PT-1-04 184563 m, 245 m/sec, 1078758 t fired, .

Time elapsed: 1987 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1698/3306 0/5 RERS17pb113-PT-1-04 434764 t fired, 69 attempts, .
67 EF EXCL 686/764 1/5 RERS17pb113-PT-1-04 185828 m, 253 m/sec, 1088098 t fired, .

Time elapsed: 1992 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1703/3306 0/5 RERS17pb113-PT-1-04 436314 t fired, 69 attempts, .
67 EF EXCL 691/764 1/5 RERS17pb113-PT-1-04 187015 m, 237 m/sec, 1097051 t fired, .

Time elapsed: 1997 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1708/3306 0/5 RERS17pb113-PT-1-04 437858 t fired, 69 attempts, .
67 EF EXCL 696/764 1/5 RERS17pb113-PT-1-04 187881 m, 173 m/sec, 1104082 t fired, .

Time elapsed: 2002 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1713/3306 0/5 RERS17pb113-PT-1-04 439358 t fired, 69 attempts, .
67 EF EXCL 701/764 1/5 RERS17pb113-PT-1-04 188801 m, 184 m/sec, 1110837 t fired, .

Time elapsed: 2007 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1718/3306 0/5 RERS17pb113-PT-1-04 440732 t fired, 70 attempts, .
67 EF EXCL 706/764 1/5 RERS17pb113-PT-1-04 190058 m, 251 m/sec, 1121134 t fired, .

Time elapsed: 2012 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1723/3306 0/5 RERS17pb113-PT-1-04 441504 t fired, 70 attempts, .
67 EF EXCL 711/764 1/5 RERS17pb113-PT-1-04 190824 m, 153 m/sec, 1126417 t fired, .

Time elapsed: 2017 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1728/3306 0/5 RERS17pb113-PT-1-04 442274 t fired, 70 attempts, .
67 EF EXCL 716/764 1/5 RERS17pb113-PT-1-04 191597 m, 154 m/sec, 1131721 t fired, .

Time elapsed: 2022 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1733/3306 0/5 RERS17pb113-PT-1-04 443165 t fired, 71 attempts, .
67 EF EXCL 721/764 1/5 RERS17pb113-PT-1-04 192375 m, 155 m/sec, 1137262 t fired, .

Time elapsed: 2027 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1738/3306 0/5 RERS17pb113-PT-1-04 443924 t fired, 71 attempts, .
67 EF EXCL 726/764 1/5 RERS17pb113-PT-1-04 193262 m, 177 m/sec, 1141495 t fired, .

Time elapsed: 2032 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1743/3306 0/5 RERS17pb113-PT-1-04 444660 t fired, 71 attempts, .
67 EF EXCL 731/764 1/5 RERS17pb113-PT-1-04 194783 m, 304 m/sec, 1149365 t fired, .

Time elapsed: 2037 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1748/3306 0/5 RERS17pb113-PT-1-04 445437 t fired, 71 attempts, .
67 EF EXCL 736/764 1/5 RERS17pb113-PT-1-04 195980 m, 239 m/sec, 1155816 t fired, .

Time elapsed: 2042 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1753/3306 0/5 RERS17pb113-PT-1-04 446209 t fired, 71 attempts, .
67 EF EXCL 741/764 1/5 RERS17pb113-PT-1-04 196748 m, 153 m/sec, 1160753 t fired, .

Time elapsed: 2047 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1758/3306 0/5 RERS17pb113-PT-1-04 447103 t fired, 71 attempts, .
67 EF EXCL 746/764 1/5 RERS17pb113-PT-1-04 197524 m, 155 m/sec, 1165498 t fired, .

Time elapsed: 2052 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1763/3306 0/5 RERS17pb113-PT-1-04 447870 t fired, 71 attempts, .
67 EF EXCL 751/764 1/5 RERS17pb113-PT-1-04 198289 m, 153 m/sec, 1169785 t fired, .

Time elapsed: 2057 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1768/3306 0/5 RERS17pb113-PT-1-04 448632 t fired, 71 attempts, .
67 EF EXCL 756/764 1/5 RERS17pb113-PT-1-04 199053 m, 152 m/sec, 1174369 t fired, .

Time elapsed: 2062 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1773/3306 0/5 RERS17pb113-PT-1-04 449396 t fired, 71 attempts, .
67 EF EXCL 761/764 1/5 RERS17pb113-PT-1-04 199816 m, 152 m/sec, 1179083 t fired, .

Time elapsed: 2067 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: CANCELED task # 67 (type EXCL) for RERS17pb113-PT-1-04 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 1 0 5 1 0 0
RERS17pb113-PT-1-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1778/3306 0/5 RERS17pb113-PT-1-04 450150 t fired, 71 attempts, .

Time elapsed: 2072 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: LAUNCH task # 43 (type EXCL) for 42 RERS17pb113-PT-1-10
lola: time limit : 764 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 67 (type EXCL) for 20 RERS17pb113-PT-1-04
lola: time limit : 1528 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 LTL EXCL 5/764 1/32 RERS17pb113-PT-1-10 176 m, 35 m/sec, 175 t fired, .
65 EF FNDP 1783/3306 0/5 RERS17pb113-PT-1-04 450863 t fired, 71 attempts, .
67 EF EXCL 5/1528 1/5 RERS17pb113-PT-1-04 566 m, -39850 m/sec, 565 t fired, .

Time elapsed: 2077 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 LTL EXCL 10/764 1/32 RERS17pb113-PT-1-10 356 m, 36 m/sec, 355 t fired, .
65 EF FNDP 1788/3306 0/5 RERS17pb113-PT-1-04 451636 t fired, 71 attempts, .
67 EF EXCL 10/509 1/5 RERS17pb113-PT-1-04 1405 m, 167 m/sec, 1404 t fired, .

Time elapsed: 2082 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 LTL EXCL 15/764 1/32 RERS17pb113-PT-1-10 557 m, 40 m/sec, 556 t fired, .
65 EF FNDP 1793/3306 0/5 RERS17pb113-PT-1-04 452339 t fired, 71 attempts, .
67 EF EXCL 15/509 1/5 RERS17pb113-PT-1-04 2240 m, 167 m/sec, 2239 t fired, .

Time elapsed: 2087 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 LTL EXCL 20/764 1/32 RERS17pb113-PT-1-10 724 m, 33 m/sec, 723 t fired, .
65 EF FNDP 1798/3306 0/5 RERS17pb113-PT-1-04 453114 t fired, 71 attempts, .
67 EF EXCL 20/509 1/5 RERS17pb113-PT-1-04 3318 m, 215 m/sec, 3317 t fired, .

Time elapsed: 2092 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 LTL EXCL 25/764 1/32 RERS17pb113-PT-1-10 957 m, 46 m/sec, 956 t fired, .
65 EF FNDP 1803/3306 0/5 RERS17pb113-PT-1-04 453820 t fired, 71 attempts, .
67 EF EXCL 25/509 1/5 RERS17pb113-PT-1-04 4271 m, 190 m/sec, 4270 t fired, .

Time elapsed: 2097 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 LTL EXCL 30/764 1/32 RERS17pb113-PT-1-10 1155 m, 39 m/sec, 1154 t fired, .
65 EF FNDP 1808/3306 0/5 RERS17pb113-PT-1-04 454548 t fired, 71 attempts, .
67 EF EXCL 30/509 1/5 RERS17pb113-PT-1-04 5181 m, 182 m/sec, 5180 t fired, .

Time elapsed: 2102 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 LTL EXCL 35/764 1/32 RERS17pb113-PT-1-10 1300 m, 29 m/sec, 1299 t fired, .
65 EF FNDP 1813/3306 0/5 RERS17pb113-PT-1-04 455305 t fired, 71 attempts, .
67 EF EXCL 35/509 1/5 RERS17pb113-PT-1-04 6044 m, 172 m/sec, 6443 t fired, .

Time elapsed: 2107 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-10: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 LTL EXCL 40/764 1/32 RERS17pb113-PT-1-10 1485 m, 37 m/sec, 1484 t fired, .
65 EF FNDP 1818/3306 0/5 RERS17pb113-PT-1-04 456446 t fired, 71 attempts, .
67 EF EXCL 40/509 1/5 RERS17pb113-PT-1-04 6670 m, 125 m/sec, 8936 t fired, .

Time elapsed: 2112 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
lola: FINISHED task # 43 (type EXCL) for RERS17pb113-PT-1-10
lola: result : false
lola: markings : 1633
lola: fired transitions : 1633
lola: time used : 45.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1823/3306 0/5 RERS17pb113-PT-1-04 457320 t fired, 71 attempts, .
67 EF EXCL 45/764 1/5 RERS17pb113-PT-1-04 7715 m, 209 m/sec, 13056 t fired, .

Time elapsed: 2117 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1828/3306 0/5 RERS17pb113-PT-1-04 458076 t fired, 71 attempts, .
67 EF EXCL 50/764 1/5 RERS17pb113-PT-1-04 9237 m, 304 m/sec, 19326 t fired, .

Time elapsed: 2122 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1833/3306 0/5 RERS17pb113-PT-1-04 458827 t fired, 71 attempts, .
67 EF EXCL 55/764 1/5 RERS17pb113-PT-1-04 10777 m, 308 m/sec, 26874 t fired, .

Time elapsed: 2127 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1838/3306 0/5 RERS17pb113-PT-1-04 459562 t fired, 71 attempts, .
67 EF EXCL 60/764 1/5 RERS17pb113-PT-1-04 12259 m, 296 m/sec, 33629 t fired, .

Time elapsed: 2132 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1843/3306 0/5 RERS17pb113-PT-1-04 460270 t fired, 71 attempts, .
67 EF EXCL 65/764 1/5 RERS17pb113-PT-1-04 13673 m, 282 m/sec, 40064 t fired, .

Time elapsed: 2137 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1848/3306 0/5 RERS17pb113-PT-1-04 460976 t fired, 71 attempts, .
67 EF EXCL 70/764 1/5 RERS17pb113-PT-1-04 15091 m, 283 m/sec, 47192 t fired, .

Time elapsed: 2142 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1853/3306 0/5 RERS17pb113-PT-1-04 461730 t fired, 71 attempts, .
67 EF EXCL 75/764 1/5 RERS17pb113-PT-1-04 16592 m, 300 m/sec, 54968 t fired, .

Time elapsed: 2147 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1858/3306 0/5 RERS17pb113-PT-1-04 462759 t fired, 71 attempts, .
67 EF EXCL 80/764 1/5 RERS17pb113-PT-1-04 17827 m, 247 m/sec, 62130 t fired, .

Time elapsed: 2152 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1863/3306 0/5 RERS17pb113-PT-1-04 464247 t fired, 71 attempts, .
67 EF EXCL 85/764 1/5 RERS17pb113-PT-1-04 18557 m, 146 m/sec, 66757 t fired, .

Time elapsed: 2157 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1868/3306 0/5 RERS17pb113-PT-1-04 465720 t fired, 71 attempts, .
67 EF EXCL 90/764 1/5 RERS17pb113-PT-1-04 19276 m, 143 m/sec, 70659 t fired, .

Time elapsed: 2162 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1873/3306 0/5 RERS17pb113-PT-1-04 467192 t fired, 71 attempts, .
67 EF EXCL 95/764 1/5 RERS17pb113-PT-1-04 19995 m, 143 m/sec, 74369 t fired, .

Time elapsed: 2167 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1878/3306 0/5 RERS17pb113-PT-1-04 468692 t fired, 71 attempts, .
67 EF EXCL 100/764 1/5 RERS17pb113-PT-1-04 20730 m, 147 m/sec, 78021 t fired, .

Time elapsed: 2172 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1883/3306 0/5 RERS17pb113-PT-1-04 470059 t fired, 71 attempts, .
67 EF EXCL 105/764 1/5 RERS17pb113-PT-1-04 21405 m, 135 m/sec, 81488 t fired, .

Time elapsed: 2177 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1888/3306 0/5 RERS17pb113-PT-1-04 471463 t fired, 71 attempts, .
67 EF EXCL 110/764 1/5 RERS17pb113-PT-1-04 22098 m, 138 m/sec, 84976 t fired, .

Time elapsed: 2182 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1893/3306 0/5 RERS17pb113-PT-1-04 472967 t fired, 72 attempts, .
67 EF EXCL 115/764 1/5 RERS17pb113-PT-1-04 22840 m, 148 m/sec, 88662 t fired, .

Time elapsed: 2187 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1898/3306 0/5 RERS17pb113-PT-1-04 474452 t fired, 73 attempts, .
67 EF EXCL 120/764 1/5 RERS17pb113-PT-1-04 23583 m, 148 m/sec, 92327 t fired, .

Time elapsed: 2192 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1903/3306 0/5 RERS17pb113-PT-1-04 475990 t fired, 73 attempts, .
67 EF EXCL 125/764 1/5 RERS17pb113-PT-1-04 24338 m, 151 m/sec, 96754 t fired, .

Time elapsed: 2197 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1908/3306 0/5 RERS17pb113-PT-1-04 477547 t fired, 73 attempts, .
67 EF EXCL 130/764 1/5 RERS17pb113-PT-1-04 25111 m, 154 m/sec, 101339 t fired, .

Time elapsed: 2202 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1913/3306 0/5 RERS17pb113-PT-1-04 478505 t fired, 73 attempts, .
67 EF EXCL 135/764 1/5 RERS17pb113-PT-1-04 26470 m, 271 m/sec, 109451 t fired, .

Time elapsed: 2207 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1918/3306 0/5 RERS17pb113-PT-1-04 479276 t fired, 73 attempts, .
67 EF EXCL 140/764 1/5 RERS17pb113-PT-1-04 28001 m, 306 m/sec, 117520 t fired, .

Time elapsed: 2212 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1923/3306 0/5 RERS17pb113-PT-1-04 480049 t fired, 73 attempts, .
67 EF EXCL 145/764 1/5 RERS17pb113-PT-1-04 29518 m, 303 m/sec, 126706 t fired, .

Time elapsed: 2217 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1928/3306 0/5 RERS17pb113-PT-1-04 480821 t fired, 73 attempts, .
67 EF EXCL 150/764 1/5 RERS17pb113-PT-1-04 31036 m, 303 m/sec, 135932 t fired, .

Time elapsed: 2222 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1933/3306 0/5 RERS17pb113-PT-1-04 482139 t fired, 73 attempts, .
67 EF EXCL 155/764 1/5 RERS17pb113-PT-1-04 31951 m, 183 m/sec, 142394 t fired, .

Time elapsed: 2227 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1938/3306 0/5 RERS17pb113-PT-1-04 483584 t fired, 73 attempts, .
67 EF EXCL 160/764 1/5 RERS17pb113-PT-1-04 32652 m, 140 m/sec, 147252 t fired, .

Time elapsed: 2232 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1943/3306 0/5 RERS17pb113-PT-1-04 485033 t fired, 73 attempts, .
67 EF EXCL 165/764 1/5 RERS17pb113-PT-1-04 33354 m, 140 m/sec, 152250 t fired, .

Time elapsed: 2237 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1948/3306 0/5 RERS17pb113-PT-1-04 486522 t fired, 73 attempts, .
67 EF EXCL 170/764 1/5 RERS17pb113-PT-1-04 34072 m, 143 m/sec, 156567 t fired, .

Time elapsed: 2242 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1953/3306 0/5 RERS17pb113-PT-1-04 488019 t fired, 73 attempts, .
67 EF EXCL 175/764 1/5 RERS17pb113-PT-1-04 34800 m, 145 m/sec, 161483 t fired, .

Time elapsed: 2247 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1958/3306 0/5 RERS17pb113-PT-1-04 489434 t fired, 73 attempts, .
67 EF EXCL 180/764 1/5 RERS17pb113-PT-1-04 35507 m, 141 m/sec, 164982 t fired, .

Time elapsed: 2252 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1963/3306 0/5 RERS17pb113-PT-1-04 490886 t fired, 73 attempts, .
67 EF EXCL 185/764 1/5 RERS17pb113-PT-1-04 36227 m, 144 m/sec, 168976 t fired, .

Time elapsed: 2257 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1968/3306 0/5 RERS17pb113-PT-1-04 492367 t fired, 74 attempts, .
67 EF EXCL 190/764 1/5 RERS17pb113-PT-1-04 36958 m, 146 m/sec, 172402 t fired, .

Time elapsed: 2262 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1973/3306 0/5 RERS17pb113-PT-1-04 493928 t fired, 74 attempts, .
67 EF EXCL 195/764 1/5 RERS17pb113-PT-1-04 37725 m, 153 m/sec, 176000 t fired, .

Time elapsed: 2267 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1978/3306 0/5 RERS17pb113-PT-1-04 495482 t fired, 75 attempts, .
67 EF EXCL 200/764 1/5 RERS17pb113-PT-1-04 38489 m, 152 m/sec, 179206 t fired, .

Time elapsed: 2272 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1983/3306 0/5 RERS17pb113-PT-1-04 496927 t fired, 76 attempts, .
67 EF EXCL 205/764 1/5 RERS17pb113-PT-1-04 39204 m, 143 m/sec, 182369 t fired, .

Time elapsed: 2277 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1988/3306 0/5 RERS17pb113-PT-1-04 498353 t fired, 76 attempts, .
67 EF EXCL 210/764 1/5 RERS17pb113-PT-1-04 39910 m, 141 m/sec, 185743 t fired, .

Time elapsed: 2282 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1993/3306 0/5 RERS17pb113-PT-1-04 499899 t fired, 76 attempts, .
67 EF EXCL 215/764 1/5 RERS17pb113-PT-1-04 40666 m, 151 m/sec, 190137 t fired, .

Time elapsed: 2287 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 1998/3306 0/5 RERS17pb113-PT-1-04 500859 t fired, 77 attempts, .
67 EF EXCL 220/764 1/5 RERS17pb113-PT-1-04 42018 m, 270 m/sec, 197882 t fired, .

Time elapsed: 2292 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2003/3306 0/5 RERS17pb113-PT-1-04 501629 t fired, 77 attempts, .
67 EF EXCL 225/764 1/5 RERS17pb113-PT-1-04 43539 m, 304 m/sec, 207669 t fired, .

Time elapsed: 2297 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2008/3306 0/5 RERS17pb113-PT-1-04 502405 t fired, 77 attempts, .
67 EF EXCL 230/764 1/5 RERS17pb113-PT-1-04 45079 m, 308 m/sec, 217075 t fired, .

Time elapsed: 2302 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2013/3306 0/5 RERS17pb113-PT-1-04 503174 t fired, 78 attempts, .
67 EF EXCL 235/764 1/5 RERS17pb113-PT-1-04 46610 m, 306 m/sec, 225723 t fired, .

Time elapsed: 2307 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2018/3306 0/5 RERS17pb113-PT-1-04 503942 t fired, 78 attempts, .
67 EF EXCL 240/764 1/5 RERS17pb113-PT-1-04 48133 m, 304 m/sec, 232380 t fired, .

Time elapsed: 2312 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2023/3306 0/5 RERS17pb113-PT-1-04 504708 t fired, 78 attempts, .
67 EF EXCL 245/764 1/5 RERS17pb113-PT-1-04 49662 m, 305 m/sec, 240227 t fired, .

Time elapsed: 2317 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2028/3306 0/5 RERS17pb113-PT-1-04 505479 t fired, 78 attempts, .
67 EF EXCL 250/764 1/5 RERS17pb113-PT-1-04 51202 m, 308 m/sec, 249009 t fired, .

Time elapsed: 2322 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2033/3306 0/5 RERS17pb113-PT-1-04 506252 t fired, 78 attempts, .
67 EF EXCL 255/764 1/5 RERS17pb113-PT-1-04 52734 m, 306 m/sec, 258276 t fired, .

Time elapsed: 2327 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2038/3306 0/5 RERS17pb113-PT-1-04 507025 t fired, 78 attempts, .
67 EF EXCL 260/764 1/5 RERS17pb113-PT-1-04 54272 m, 307 m/sec, 267118 t fired, .

Time elapsed: 2332 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2043/3306 0/5 RERS17pb113-PT-1-04 507800 t fired, 78 attempts, .
67 EF EXCL 265/764 1/5 RERS17pb113-PT-1-04 55828 m, 311 m/sec, 275247 t fired, .

Time elapsed: 2337 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2048/3306 0/5 RERS17pb113-PT-1-04 508572 t fired, 78 attempts, .
67 EF EXCL 270/764 1/5 RERS17pb113-PT-1-04 57380 m, 310 m/sec, 283213 t fired, .

Time elapsed: 2342 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2053/3306 0/5 RERS17pb113-PT-1-04 509328 t fired, 78 attempts, .
67 EF EXCL 275/764 1/5 RERS17pb113-PT-1-04 58933 m, 310 m/sec, 291117 t fired, .

Time elapsed: 2347 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2058/3306 0/5 RERS17pb113-PT-1-04 510097 t fired, 78 attempts, .
67 EF EXCL 280/764 1/5 RERS17pb113-PT-1-04 60492 m, 311 m/sec, 300208 t fired, .

Time elapsed: 2352 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2063/3306 0/5 RERS17pb113-PT-1-04 510857 t fired, 78 attempts, .
67 EF EXCL 285/764 1/5 RERS17pb113-PT-1-04 62030 m, 307 m/sec, 308870 t fired, .

Time elapsed: 2357 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2068/3306 0/5 RERS17pb113-PT-1-04 511621 t fired, 78 attempts, .
67 EF EXCL 290/764 1/5 RERS17pb113-PT-1-04 63576 m, 309 m/sec, 317105 t fired, .

Time elapsed: 2362 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2073/3306 0/5 RERS17pb113-PT-1-04 512397 t fired, 78 attempts, .
67 EF EXCL 295/764 1/5 RERS17pb113-PT-1-04 65124 m, 309 m/sec, 326147 t fired, .

Time elapsed: 2367 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2078/3306 0/5 RERS17pb113-PT-1-04 513165 t fired, 78 attempts, .
67 EF EXCL 300/764 1/5 RERS17pb113-PT-1-04 66673 m, 309 m/sec, 335760 t fired, .

Time elapsed: 2372 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2083/3306 0/5 RERS17pb113-PT-1-04 513933 t fired, 78 attempts, .
67 EF EXCL 305/764 1/5 RERS17pb113-PT-1-04 68223 m, 310 m/sec, 345501 t fired, .

Time elapsed: 2377 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2088/3306 0/5 RERS17pb113-PT-1-04 514692 t fired, 78 attempts, .
67 EF EXCL 310/764 1/5 RERS17pb113-PT-1-04 69740 m, 303 m/sec, 356162 t fired, .

Time elapsed: 2382 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2093/3306 0/5 RERS17pb113-PT-1-04 515460 t fired, 79 attempts, .
67 EF EXCL 315/764 1/5 RERS17pb113-PT-1-04 71274 m, 306 m/sec, 366820 t fired, .

Time elapsed: 2387 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2098/3306 0/5 RERS17pb113-PT-1-04 516226 t fired, 79 attempts, .
67 EF EXCL 320/764 1/5 RERS17pb113-PT-1-04 72828 m, 310 m/sec, 375937 t fired, .

Time elapsed: 2392 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2103/3306 0/5 RERS17pb113-PT-1-04 516984 t fired, 79 attempts, .
67 EF EXCL 325/764 1/5 RERS17pb113-PT-1-04 74371 m, 308 m/sec, 385128 t fired, .

Time elapsed: 2397 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2108/3306 0/5 RERS17pb113-PT-1-04 517749 t fired, 80 attempts, .
67 EF EXCL 330/764 1/5 RERS17pb113-PT-1-04 75884 m, 302 m/sec, 393723 t fired, .

Time elapsed: 2402 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2113/3306 0/5 RERS17pb113-PT-1-04 518505 t fired, 80 attempts, .
67 EF EXCL 335/764 1/5 RERS17pb113-PT-1-04 77400 m, 303 m/sec, 403090 t fired, .

Time elapsed: 2407 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2118/3306 0/5 RERS17pb113-PT-1-04 519259 t fired, 80 attempts, .
67 EF EXCL 340/764 1/5 RERS17pb113-PT-1-04 78901 m, 300 m/sec, 412788 t fired, .

Time elapsed: 2412 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2123/3306 0/5 RERS17pb113-PT-1-04 520022 t fired, 80 attempts, .
67 EF EXCL 345/764 1/5 RERS17pb113-PT-1-04 80408 m, 301 m/sec, 423204 t fired, .

Time elapsed: 2417 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2128/3306 0/5 RERS17pb113-PT-1-04 520719 t fired, 81 attempts, .
67 EF EXCL 350/764 1/5 RERS17pb113-PT-1-04 81787 m, 275 m/sec, 433048 t fired, .

Time elapsed: 2422 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2133/3306 0/5 RERS17pb113-PT-1-04 521404 t fired, 81 attempts, .
67 EF EXCL 355/764 1/5 RERS17pb113-PT-1-04 83145 m, 271 m/sec, 441471 t fired, .

Time elapsed: 2427 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2138/3306 0/5 RERS17pb113-PT-1-04 522131 t fired, 82 attempts, .
67 EF EXCL 360/764 1/5 RERS17pb113-PT-1-04 84584 m, 287 m/sec, 451510 t fired, .

Time elapsed: 2432 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2143/3306 0/5 RERS17pb113-PT-1-04 522853 t fired, 82 attempts, .
67 EF EXCL 365/764 1/5 RERS17pb113-PT-1-04 86020 m, 287 m/sec, 461692 t fired, .

Time elapsed: 2437 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2148/3306 0/5 RERS17pb113-PT-1-04 523567 t fired, 82 attempts, .
67 EF EXCL 370/764 1/5 RERS17pb113-PT-1-04 87427 m, 281 m/sec, 472087 t fired, .

Time elapsed: 2442 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2153/3306 0/5 RERS17pb113-PT-1-04 524273 t fired, 82 attempts, .
67 EF EXCL 375/764 1/5 RERS17pb113-PT-1-04 88810 m, 276 m/sec, 483092 t fired, .

Time elapsed: 2447 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2158/3306 0/5 RERS17pb113-PT-1-04 524987 t fired, 82 attempts, .
67 EF EXCL 380/764 1/5 RERS17pb113-PT-1-04 90227 m, 283 m/sec, 494566 t fired, .

Time elapsed: 2452 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2163/3306 0/5 RERS17pb113-PT-1-04 525708 t fired, 82 attempts, .
67 EF EXCL 385/764 1/5 RERS17pb113-PT-1-04 91664 m, 287 m/sec, 504656 t fired, .

Time elapsed: 2457 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2168/3306 0/5 RERS17pb113-PT-1-04 526419 t fired, 82 attempts, .
67 EF EXCL 390/764 1/5 RERS17pb113-PT-1-04 93084 m, 284 m/sec, 514702 t fired, .

Time elapsed: 2462 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2173/3306 0/5 RERS17pb113-PT-1-04 527135 t fired, 82 attempts, .
67 EF EXCL 395/764 1/5 RERS17pb113-PT-1-04 94523 m, 287 m/sec, 523571 t fired, .

Time elapsed: 2467 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2178/3306 0/5 RERS17pb113-PT-1-04 527894 t fired, 83 attempts, .
67 EF EXCL 400/764 1/5 RERS17pb113-PT-1-04 96027 m, 300 m/sec, 532448 t fired, .

Time elapsed: 2472 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2183/3306 0/5 RERS17pb113-PT-1-04 528654 t fired, 83 attempts, .
67 EF EXCL 405/764 1/5 RERS17pb113-PT-1-04 97559 m, 306 m/sec, 541507 t fired, .

Time elapsed: 2477 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2188/3306 0/5 RERS17pb113-PT-1-04 529347 t fired, 83 attempts, .
67 EF EXCL 410/764 1/5 RERS17pb113-PT-1-04 98952 m, 278 m/sec, 550880 t fired, .

Time elapsed: 2482 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2193/3306 0/5 RERS17pb113-PT-1-04 530065 t fired, 83 attempts, .
67 EF EXCL 415/764 1/5 RERS17pb113-PT-1-04 100375 m, 284 m/sec, 560964 t fired, .

Time elapsed: 2487 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2198/3306 0/5 RERS17pb113-PT-1-04 530831 t fired, 83 attempts, .
67 EF EXCL 420/764 1/5 RERS17pb113-PT-1-04 101906 m, 306 m/sec, 570228 t fired, .

Time elapsed: 2492 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2203/3306 0/5 RERS17pb113-PT-1-04 531588 t fired, 83 attempts, .
67 EF EXCL 425/764 1/5 RERS17pb113-PT-1-04 103423 m, 303 m/sec, 580404 t fired, .

Time elapsed: 2497 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2208/3306 0/5 RERS17pb113-PT-1-04 532348 t fired, 83 attempts, .
67 EF EXCL 430/764 1/5 RERS17pb113-PT-1-04 104953 m, 306 m/sec, 589679 t fired, .

Time elapsed: 2502 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2213/3306 0/5 RERS17pb113-PT-1-04 533107 t fired, 83 attempts, .
67 EF EXCL 435/764 1/5 RERS17pb113-PT-1-04 106493 m, 308 m/sec, 598904 t fired, .

Time elapsed: 2507 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2218/3306 0/5 RERS17pb113-PT-1-04 533869 t fired, 83 attempts, .
67 EF EXCL 440/764 1/5 RERS17pb113-PT-1-04 108031 m, 307 m/sec, 606754 t fired, .

Time elapsed: 2512 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2223/3306 0/5 RERS17pb113-PT-1-04 534636 t fired, 84 attempts, .
67 EF EXCL 445/764 1/5 RERS17pb113-PT-1-04 109566 m, 307 m/sec, 615955 t fired, .

Time elapsed: 2517 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2228/3306 0/5 RERS17pb113-PT-1-04 535387 t fired, 84 attempts, .
67 EF EXCL 450/764 1/5 RERS17pb113-PT-1-04 111067 m, 300 m/sec, 623516 t fired, .

Time elapsed: 2522 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2233/3306 0/5 RERS17pb113-PT-1-04 536133 t fired, 84 attempts, .
67 EF EXCL 455/764 1/5 RERS17pb113-PT-1-04 112556 m, 297 m/sec, 630851 t fired, .

Time elapsed: 2527 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2238/3306 0/5 RERS17pb113-PT-1-04 536879 t fired, 84 attempts, .
67 EF EXCL 460/764 1/5 RERS17pb113-PT-1-04 114034 m, 295 m/sec, 638151 t fired, .

Time elapsed: 2532 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2243/3306 0/5 RERS17pb113-PT-1-04 537629 t fired, 84 attempts, .
67 EF EXCL 465/764 1/5 RERS17pb113-PT-1-04 115530 m, 299 m/sec, 646877 t fired, .

Time elapsed: 2537 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2248/3306 0/5 RERS17pb113-PT-1-04 538338 t fired, 84 attempts, .
67 EF EXCL 470/764 1/5 RERS17pb113-PT-1-04 116950 m, 284 m/sec, 654446 t fired, .

Time elapsed: 2542 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2253/3306 0/5 RERS17pb113-PT-1-04 539056 t fired, 84 attempts, .
67 EF EXCL 475/764 1/5 RERS17pb113-PT-1-04 118369 m, 283 m/sec, 662935 t fired, .

Time elapsed: 2547 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2258/3306 0/5 RERS17pb113-PT-1-04 539795 t fired, 84 attempts, .
67 EF EXCL 480/764 1/5 RERS17pb113-PT-1-04 119847 m, 295 m/sec, 670469 t fired, .

Time elapsed: 2552 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2263/3306 0/5 RERS17pb113-PT-1-04 541081 t fired, 84 attempts, .
67 EF EXCL 485/764 1/5 RERS17pb113-PT-1-04 120817 m, 194 m/sec, 675572 t fired, .

Time elapsed: 2557 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2268/3306 0/5 RERS17pb113-PT-1-04 542623 t fired, 85 attempts, .
67 EF EXCL 490/764 1/5 RERS17pb113-PT-1-04 121569 m, 150 m/sec, 679480 t fired, .

Time elapsed: 2562 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2273/3306 0/5 RERS17pb113-PT-1-04 544087 t fired, 85 attempts, .
67 EF EXCL 495/764 1/5 RERS17pb113-PT-1-04 122286 m, 143 m/sec, 683440 t fired, .

Time elapsed: 2567 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2278/3306 0/5 RERS17pb113-PT-1-04 545550 t fired, 86 attempts, .
67 EF EXCL 500/764 1/5 RERS17pb113-PT-1-04 123012 m, 145 m/sec, 687226 t fired, .

Time elapsed: 2572 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2283/3306 0/5 RERS17pb113-PT-1-04 547076 t fired, 86 attempts, .
67 EF EXCL 505/764 1/5 RERS17pb113-PT-1-04 123768 m, 151 m/sec, 691822 t fired, .

Time elapsed: 2577 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2288/3306 0/5 RERS17pb113-PT-1-04 548581 t fired, 86 attempts, .
67 EF EXCL 510/764 1/5 RERS17pb113-PT-1-04 124501 m, 146 m/sec, 696905 t fired, .

Time elapsed: 2582 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2293/3306 0/5 RERS17pb113-PT-1-04 550052 t fired, 86 attempts, .
67 EF EXCL 515/764 1/5 RERS17pb113-PT-1-04 125221 m, 144 m/sec, 701527 t fired, .

Time elapsed: 2587 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2298/3306 0/5 RERS17pb113-PT-1-04 551602 t fired, 86 attempts, .
67 EF EXCL 520/764 1/5 RERS17pb113-PT-1-04 125986 m, 153 m/sec, 706271 t fired, .

Time elapsed: 2592 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2303/3306 0/5 RERS17pb113-PT-1-04 553150 t fired, 87 attempts, .
67 EF EXCL 525/764 1/5 RERS17pb113-PT-1-04 126752 m, 153 m/sec, 710756 t fired, .

Time elapsed: 2597 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2308/3306 0/5 RERS17pb113-PT-1-04 554686 t fired, 87 attempts, .
67 EF EXCL 530/764 1/5 RERS17pb113-PT-1-04 127509 m, 151 m/sec, 714874 t fired, .

Time elapsed: 2602 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2313/3306 0/5 RERS17pb113-PT-1-04 556226 t fired, 87 attempts, .
67 EF EXCL 535/764 1/5 RERS17pb113-PT-1-04 128260 m, 150 m/sec, 719338 t fired, .

Time elapsed: 2607 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2318/3306 0/5 RERS17pb113-PT-1-04 557768 t fired, 87 attempts, .
67 EF EXCL 540/764 1/5 RERS17pb113-PT-1-04 129018 m, 151 m/sec, 723976 t fired, .

Time elapsed: 2612 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2323/3306 0/5 RERS17pb113-PT-1-04 559311 t fired, 87 attempts, .
67 EF EXCL 545/764 1/5 RERS17pb113-PT-1-04 129775 m, 151 m/sec, 729237 t fired, .

Time elapsed: 2617 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2328/3306 0/5 RERS17pb113-PT-1-04 560848 t fired, 88 attempts, .
67 EF EXCL 550/764 1/5 RERS17pb113-PT-1-04 130527 m, 150 m/sec, 733975 t fired, .

Time elapsed: 2622 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2333/3306 0/5 RERS17pb113-PT-1-04 562389 t fired, 88 attempts, .
67 EF EXCL 555/764 1/5 RERS17pb113-PT-1-04 131280 m, 150 m/sec, 738096 t fired, .

Time elapsed: 2627 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2338/3306 0/5 RERS17pb113-PT-1-04 563929 t fired, 88 attempts, .
67 EF EXCL 560/764 1/5 RERS17pb113-PT-1-04 132031 m, 150 m/sec, 742879 t fired, .

Time elapsed: 2632 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2343/3306 0/5 RERS17pb113-PT-1-04 565470 t fired, 88 attempts, .
67 EF EXCL 565/764 1/5 RERS17pb113-PT-1-04 132782 m, 150 m/sec, 748110 t fired, .

Time elapsed: 2637 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2348/3306 0/5 RERS17pb113-PT-1-04 567010 t fired, 88 attempts, .
67 EF EXCL 570/764 1/5 RERS17pb113-PT-1-04 133540 m, 151 m/sec, 752430 t fired, .

Time elapsed: 2642 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2353/3306 0/5 RERS17pb113-PT-1-04 568428 t fired, 88 attempts, .
67 EF EXCL 575/764 1/5 RERS17pb113-PT-1-04 134234 m, 138 m/sec, 756392 t fired, .

Time elapsed: 2647 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2358/3306 0/5 RERS17pb113-PT-1-04 569877 t fired, 89 attempts, .
67 EF EXCL 580/764 1/5 RERS17pb113-PT-1-04 134947 m, 142 m/sec, 760623 t fired, .

Time elapsed: 2652 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2363/3306 0/5 RERS17pb113-PT-1-04 571414 t fired, 89 attempts, .
67 EF EXCL 585/764 1/5 RERS17pb113-PT-1-04 135699 m, 150 m/sec, 765756 t fired, .

Time elapsed: 2657 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2368/3306 0/5 RERS17pb113-PT-1-04 572951 t fired, 90 attempts, .
67 EF EXCL 590/764 1/5 RERS17pb113-PT-1-04 136449 m, 150 m/sec, 770459 t fired, .

Time elapsed: 2662 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2373/3306 0/5 RERS17pb113-PT-1-04 574498 t fired, 90 attempts, .
67 EF EXCL 595/764 1/5 RERS17pb113-PT-1-04 137208 m, 151 m/sec, 775562 t fired, .

Time elapsed: 2667 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2378/3306 0/5 RERS17pb113-PT-1-04 576032 t fired, 90 attempts, .
67 EF EXCL 600/764 1/5 RERS17pb113-PT-1-04 137953 m, 149 m/sec, 780386 t fired, .

Time elapsed: 2672 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2383/3306 0/5 RERS17pb113-PT-1-04 577438 t fired, 90 attempts, .
67 EF EXCL 605/764 1/5 RERS17pb113-PT-1-04 138846 m, 178 m/sec, 784595 t fired, .

Time elapsed: 2677 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2388/3306 0/5 RERS17pb113-PT-1-04 578209 t fired, 90 attempts, .
67 EF EXCL 610/764 1/5 RERS17pb113-PT-1-04 140386 m, 308 m/sec, 792422 t fired, .

Time elapsed: 2682 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2393/3306 0/5 RERS17pb113-PT-1-04 578978 t fired, 91 attempts, .
67 EF EXCL 615/764 1/5 RERS17pb113-PT-1-04 141904 m, 303 m/sec, 801446 t fired, .

Time elapsed: 2687 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2398/3306 0/5 RERS17pb113-PT-1-04 579741 t fired, 91 attempts, .
67 EF EXCL 620/764 1/5 RERS17pb113-PT-1-04 143422 m, 303 m/sec, 810293 t fired, .

Time elapsed: 2692 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2403/3306 0/5 RERS17pb113-PT-1-04 580448 t fired, 92 attempts, .
67 EF EXCL 625/764 1/5 RERS17pb113-PT-1-04 144821 m, 279 m/sec, 819979 t fired, .

Time elapsed: 2697 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2408/3306 0/5 RERS17pb113-PT-1-04 581159 t fired, 92 attempts, .
67 EF EXCL 630/764 1/5 RERS17pb113-PT-1-04 146245 m, 284 m/sec, 828354 t fired, .

Time elapsed: 2702 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2413/3306 0/5 RERS17pb113-PT-1-04 581905 t fired, 92 attempts, .
67 EF EXCL 635/764 1/5 RERS17pb113-PT-1-04 147734 m, 297 m/sec, 837190 t fired, .

Time elapsed: 2707 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2418/3306 0/5 RERS17pb113-PT-1-04 582656 t fired, 92 attempts, .
67 EF EXCL 640/764 1/5 RERS17pb113-PT-1-04 149213 m, 295 m/sec, 844980 t fired, .

Time elapsed: 2712 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2423/3306 0/5 RERS17pb113-PT-1-04 583397 t fired, 92 attempts, .
67 EF EXCL 645/764 1/5 RERS17pb113-PT-1-04 150688 m, 295 m/sec, 853908 t fired, .

Time elapsed: 2717 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2428/3306 0/5 RERS17pb113-PT-1-04 584161 t fired, 92 attempts, .
67 EF EXCL 650/764 1/5 RERS17pb113-PT-1-04 152204 m, 303 m/sec, 863028 t fired, .

Time elapsed: 2722 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2433/3306 0/5 RERS17pb113-PT-1-04 584924 t fired, 92 attempts, .
67 EF EXCL 655/764 1/5 RERS17pb113-PT-1-04 153719 m, 303 m/sec, 872728 t fired, .

Time elapsed: 2727 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2438/3306 0/5 RERS17pb113-PT-1-04 585685 t fired, 92 attempts, .
67 EF EXCL 660/764 1/5 RERS17pb113-PT-1-04 155250 m, 306 m/sec, 881330 t fired, .

Time elapsed: 2732 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2443/3306 0/5 RERS17pb113-PT-1-04 586445 t fired, 92 attempts, .
67 EF EXCL 665/764 1/5 RERS17pb113-PT-1-04 156788 m, 307 m/sec, 891566 t fired, .

Time elapsed: 2737 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2448/3306 0/5 RERS17pb113-PT-1-04 587205 t fired, 92 attempts, .
67 EF EXCL 670/764 1/5 RERS17pb113-PT-1-04 158206 m, 283 m/sec, 900507 t fired, .

Time elapsed: 2742 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2453/3306 0/5 RERS17pb113-PT-1-04 588527 t fired, 92 attempts, .
67 EF EXCL 675/764 1/5 RERS17pb113-PT-1-04 159593 m, 277 m/sec, 910381 t fired, .

Time elapsed: 2747 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2458/3306 0/5 RERS17pb113-PT-1-04 589891 t fired, 92 attempts, .
67 EF EXCL 680/764 1/5 RERS17pb113-PT-1-04 160936 m, 268 m/sec, 921069 t fired, .

Time elapsed: 2752 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2463/3306 0/5 RERS17pb113-PT-1-04 591265 t fired, 93 attempts, .
67 EF EXCL 685/764 1/5 RERS17pb113-PT-1-04 162407 m, 294 m/sec, 931173 t fired, .

Time elapsed: 2757 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2468/3306 0/5 RERS17pb113-PT-1-04 592718 t fired, 93 attempts, .
67 EF EXCL 690/764 1/5 RERS17pb113-PT-1-04 163844 m, 287 m/sec, 940619 t fired, .

Time elapsed: 2762 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2473/3306 0/5 RERS17pb113-PT-1-04 594087 t fired, 93 attempts, .
67 EF EXCL 695/764 1/5 RERS17pb113-PT-1-04 165280 m, 287 m/sec, 950157 t fired, .

Time elapsed: 2767 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2478/3306 0/5 RERS17pb113-PT-1-04 595405 t fired, 94 attempts, .
67 EF EXCL 700/764 1/5 RERS17pb113-PT-1-04 166799 m, 303 m/sec, 960523 t fired, .

Time elapsed: 2772 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2483/3306 0/5 RERS17pb113-PT-1-04 596670 t fired, 94 attempts, .
67 EF EXCL 705/764 1/5 RERS17pb113-PT-1-04 168330 m, 306 m/sec, 971296 t fired, .

Time elapsed: 2777 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2488/3306 0/5 RERS17pb113-PT-1-04 597963 t fired, 94 attempts, .
67 EF EXCL 710/764 1/5 RERS17pb113-PT-1-04 169783 m, 290 m/sec, 981881 t fired, .

Time elapsed: 2782 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2493/3306 0/5 RERS17pb113-PT-1-04 599354 t fired, 94 attempts, .
67 EF EXCL 715/764 1/5 RERS17pb113-PT-1-04 171214 m, 286 m/sec, 990402 t fired, .

Time elapsed: 2787 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2498/3306 0/5 RERS17pb113-PT-1-04 600752 t fired, 94 attempts, .
67 EF EXCL 720/764 1/5 RERS17pb113-PT-1-04 172649 m, 287 m/sec, 999192 t fired, .

Time elapsed: 2792 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2503/3306 0/5 RERS17pb113-PT-1-04 602239 t fired, 95 attempts, .
67 EF EXCL 725/764 1/5 RERS17pb113-PT-1-04 174185 m, 307 m/sec, 1007711 t fired, .

Time elapsed: 2797 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2508/3306 0/5 RERS17pb113-PT-1-04 603669 t fired, 95 attempts, .
67 EF EXCL 730/764 1/5 RERS17pb113-PT-1-04 175653 m, 293 m/sec, 1017638 t fired, .

Time elapsed: 2802 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2513/3306 0/5 RERS17pb113-PT-1-04 605072 t fired, 96 attempts, .
67 EF EXCL 735/764 1/5 RERS17pb113-PT-1-04 177105 m, 290 m/sec, 1026943 t fired, .

Time elapsed: 2807 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2518/3306 0/5 RERS17pb113-PT-1-04 606553 t fired, 97 attempts, .
67 EF EXCL 740/764 1/5 RERS17pb113-PT-1-04 178622 m, 303 m/sec, 1036702 t fired, .

Time elapsed: 2812 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2523/3306 0/5 RERS17pb113-PT-1-04 608065 t fired, 97 attempts, .
67 EF EXCL 745/764 1/5 RERS17pb113-PT-1-04 180183 m, 312 m/sec, 1047499 t fired, .

Time elapsed: 2817 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2528/3306 0/5 RERS17pb113-PT-1-04 609578 t fired, 97 attempts, .
67 EF EXCL 750/764 1/5 RERS17pb113-PT-1-04 181742 m, 311 m/sec, 1058362 t fired, .

Time elapsed: 2822 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2533/3306 0/5 RERS17pb113-PT-1-04 611092 t fired, 97 attempts, .
67 EF EXCL 755/764 1/5 RERS17pb113-PT-1-04 183305 m, 312 m/sec, 1068858 t fired, .

Time elapsed: 2827 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 2 0 5 0 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2538/3306 0/5 RERS17pb113-PT-1-04 612597 t fired, 98 attempts, .
67 EF EXCL 760/764 1/5 RERS17pb113-PT-1-04 184853 m, 309 m/sec, 1080868 t fired, .

Time elapsed: 2832 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: CANCELED task # 67 (type EXCL) for RERS17pb113-PT-1-04 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-1-00: LTL true LTL model checker
RERS17pb113-PT-1-02: CONJ false findpath
RERS17pb113-PT-1-03: LTL false LTL model checker
RERS17pb113-PT-1-05: INITIAL true preprocessing
RERS17pb113-PT-1-06: INITIAL true preprocessing
RERS17pb113-PT-1-07: INITIAL true preprocessing
RERS17pb113-PT-1-08: INITIAL true preprocessing
RERS17pb113-PT-1-09: LTL true LTL model checker
RERS17pb113-PT-1-10: LTL false LTL model checker
RERS17pb113-PT-1-11: LTL false LTL model checker
RERS17pb113-PT-1-12: LTL true LTL model checker
RERS17pb113-PT-1-13: CONJ false LTL model checker
RERS17pb113-PT-1-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-01: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-1-04: CONJ 0 0 1 0 5 1 0 0
RERS17pb113-PT-1-14: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF FNDP 2543/3306 0/5 RERS17pb113-PT-1-04 614110 t fired, 98 attempts, .

Time elapsed: 2837 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: LAUNCH task # 6 (type EXCL) for 3 RERS17pb113-PT-1-01
lola: time limit : 763 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 67 (type EXCL) for 20 RERS17pb113-PT-1-04
lola: time limit : 763 sec
lola: memory limit: 5 pages
/home/mcc/BenchKit/BenchKit_head.sh: line 62: 411 Killed lola --conf=$BIN_DIR/configfiles/ltlcardinalityconf --formula=$DIR/LTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb113-PT-1"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is RERS17pb113-PT-1, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r175-tajo-162089411000124"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb113-PT-1.tgz
mv RERS17pb113-PT-1 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;