fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r144-tall-162089134500071
Last Updated
Jun 28, 2021

About the Execution of LoLA for NeoElection-COL-2

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
77.840 372.00 119.00 0.00 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r144-tall-162089134500071.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is NeoElection-COL-2, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r144-tall-162089134500071
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 424K
-rw-r--r-- 1 mcc users 20K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 112K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 14K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 72K May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 4.4K Apr 26 07:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 26 07:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Apr 26 07:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 26 07:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Mar 27 06:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 27 06:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 25 07:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K Mar 25 07:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 22 09:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 22 09:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 2 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 70K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1620942062994

starting LoLA
BK_INPUT NeoElection-COL-2
BK_EXAMINATION: ReachabilityDeadlock
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
GlobalProperty: ReachabilityDeadlock

FORMULA ReachabilityDeadlock TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620942063366

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: TR BINDINGS
lola: TR BINDINGS DONE
lola: Places: 438, Transitions: 343
lola: @ trans T-sendAnnPs__start
lola: @ trans T-poll__handleAnsP3
lola: @ trans T-poll__handleAnnP1
lola: @ trans T-poll__handleAnnP2
lola: @ trans T-poll__start
lola: @ trans T-startNeg__send
lola: @ trans T-sendAnnPs__send
lola: @ trans T-poll__handleAskP
lola: @ trans T-poll__handleAnsP4
lola: @ trans T-poll__handleRP
lola: @ trans T-startSec
lola: @ trans T-startNeg__end
lola: @ trans T-poll__handleAI2
lola: @ trans T-poll__handleRI
lola: @ trans T-sendAnnPs__end
lola: @ trans T-poll__handleAnsP1
lola: @ trans T-poll__handleAI1
lola: @ trans T-poll__handleAnsP2
lola: @ trans T-poll__end
lola: @ trans T-poll__iAmSecondary
lola: @ trans T-startNeg__start
lola: @ trans T-poll__iAmPrimary
lola: REM DEA TR: t = t328
lola: REM DEA TR: t = t329
lola: REM DEA TR: t = t330
lola: REM DEA TR: t = t340
lola: REM DEA TR: t = t277
lola: REM DEA TR: t = t283
lola: REM DEA TR: t = t286
lola: REM DEA TR: t = t279
lola: REM DEA TR: t = t285
lola: REM DEA TR: t = t288
lola: REM DEA TR: t = t15
lola: REM DEA TR: t = t16
lola: REM DEA TR: t = t17
lola: REM DEA TR: t = t18
lola: REM DEA TR: t = t27
lola: REM DEA TR: t = t28
lola: REM DEA TR: t = t29
lola: REM DEA TR: t = t30
lola: REM DEA TR: t = t39
lola: REM DEA TR: t = t40
lola: REM DEA TR: t = t41
lola: REM DEA TR: t = t42
lola: REM DEA TR: t = t51
lola: REM DEA TR: t = t52
lola: REM DEA TR: t = t53
lola: REM DEA TR: t = t54
lola: REM DEA TR: t = t63
lola: REM DEA TR: t = t64
lola: REM DEA TR: t = t65
lola: REM DEA TR: t = t66
lola: REM DEA TR: t = t75
lola: REM DEA TR: t = t78
lola: REM DEA TR: t = t81
lola: REM DEA TR: t = t91
lola: REM DEA TR: t = t92
lola: REM DEA TR: t = t93
lola: REM DEA TR: t = t94
lola: REM DEA TR: t = t95
lola: REM DEA TR: t = t96
lola: REM DEA TR: t = t3
lola: REM DEA TR: t = t4
lola: REM DEA TR: t = t5
lola: REM DEA TR: t = t6
lola: REM DEA TR: t = t109
lola: REM DEA TR: t = t110
lola: REM DEA TR: t = t111
lola: REM DEA TR: t = t112
lola: REM DEA TR: t = t113
lola: REM DEA TR: t = t114
lola: REM DEA TR: t = t127
lola: REM DEA TR: t = t128
lola: REM DEA TR: t = t129
lola: REM DEA TR: t = t130
lola: REM DEA TR: t = t131
lola: REM DEA TR: t = t132
lola: REM DEA TR: t = t145
lola: REM DEA TR: t = t146
lola: REM DEA TR: t = t147
lola: REM DEA TR: t = t148
lola: REM DEA TR: t = t157
lola: REM DEA TR: t = t158
lola: REM DEA TR: t = t159
lola: REM DEA TR: t = t160
lola: REM DEA TR: t = t169
lola: REM DEA TR: t = t170
lola: REM DEA TR: t = t171
lola: REM DEA TR: t = t172
lola: REM DEA TR: t = t181
lola: REM DEA TR: t = t184
lola: REM DEA TR: t = t187
lola: REM DEA TR: t = t250
lola: REM DEA TR: t = t253
lola: REM DEA TR: t = t256
lola: REM DEA TR: t = t262
lola: REM DEA TR: t = t265
lola: REM DEA TR: t = t268
lola: REM DEA TR: t = t289
lola: REM DEA TR: t = t290
lola: REM DEA TR: t = t291
lola: REM DEA TR: t = t292
lola: REM DEA TR: t = t301
lola: REM DEA TR: t = t302
lola: REM DEA TR: t = t303
lola: REM DEA TR: t = t304
lola: REM DEA TR: t = t313
lola: REM DEA TR: t = t314
lola: REM DEA TR: t = t315
lola: REM DEA TR: t = t316
lola: REM DEA TR: t = t97
lola: REM DEA TR: t = t98
lola: REM DEA TR: t = t99
lola: REM DEA TR: t = t100
lola: REM DEA TR: t = t101
lola: REM DEA TR: t = t102
lola: REM DEA TR: t = t263
lola: REM DEA TR: t = t10
lola: REM DEA TR: t = t9
lola: REM DEA TR: t = t293
lola: REM DEA TR: t = t294
lola: REM DEA TR: t = t7
lola: REM DEA TR: t = t8
lola: REM DEA TR: t = t295
lola: REM DEA TR: t = t296
lola: REM DEA TR: t = t251
lola: REM DEA TR: t = t276
lola: REM DEA TR: t = t43
lola: REM DEA TR: t = t44
lola: REM DEA TR: t = t45
lola: REM DEA TR: t = t46
lola: REM DEA TR: t = t76
lola: REM DEA TR: t = t182
lola: REM DEA TR: t = t115
lola: REM DEA TR: t = t116
lola: REM DEA TR: t = t117
lola: REM DEA TR: t = t118
lola: REM DEA TR: t = t119
lola: REM DEA TR: t = t120
lola: REM DEA TR: t = t266
lola: REM DEA TR: t = t21
lola: REM DEA TR: t = t22
lola: REM DEA TR: t = t305
lola: REM DEA TR: t = t306
lola: REM DEA TR: t = t19
lola: REM DEA TR: t = t20
lola: REM DEA TR: t = t307
lola: REM DEA TR: t = t308
lola: REM DEA TR: t = t254
lola: REM DEA TR: t = t282
lola: REM DEA TR: t = t55
lola: REM DEA TR: t = t56
lola: REM DEA TR: t = t57
lola: REM DEA TR: t = t58
lola: REM DEA TR: t = t79
lola: REM DEA TR: t = t185
lola: REM DEA TR: t = t188
lola: REM DEA TR: t = t103
lola: REM DEA TR: t = t104
lola: REM DEA TR: t = t105
lola: REM DEA TR: t = t106
lola: REM DEA TR: t = t107
lola: REM DEA TR: t = t108
lola: REM DEA TR: t = t264
lola: REM DEA TR: t = t13
lola: REM DEA TR: t = t14
lola: REM DEA TR: t = t297
lola: REM DEA TR: t = t298
lola: REM DEA TR: t = t11
lola: REM DEA TR: t = t12
lola: REM DEA TR: t = t299
lola: REM DEA TR: t = t300
lola: REM DEA TR: t = t252
lola: REM DEA TR: t = t278
lola: REM DEA TR: t = t47
lola: REM DEA TR: t = t48
lola: REM DEA TR: t = t49
lola: REM DEA TR: t = t50
lola: REM DEA TR: t = t77
lola: REM DEA TR: t = t183
lola: REM DEA TR: t = t186
lola: REM DEA TR: t = t139
lola: REM DEA TR: t = t140
lola: REM DEA TR: t = t141
lola: REM DEA TR: t = t142
lola: REM DEA TR: t = t143
lola: REM DEA TR: t = t144
lola: REM DEA TR: t = t270
lola: REM DEA TR: t = t37
lola: REM DEA TR: t = t38
lola: REM DEA TR: t = t321
lola: REM DEA TR: t = t322
lola: REM DEA TR: t = t35
lola: REM DEA TR: t = t36
lola: REM DEA TR: t = t323
lola: REM DEA TR: t = t324
lola: REM DEA TR: t = t258
lola: REM DEA TR: t = t287
lola: REM DEA TR: t = t71
lola: REM DEA TR: t = t72
lola: REM DEA TR: t = t73
lola: REM DEA TR: t = t74
lola: REM DEA TR: t = t83
lola: REM DEA TR: t = t189
lola: REM DEA TR: t = t331
lola: REM DEA TR: t = t332
lola: REM DEA TR: t = t333
lola: REM DEA TR: t = t341
lola: REM DEA TR: t = t334
lola: REM DEA TR: t = t335
lola: REM DEA TR: t = t336
lola: REM DEA TR: t = t342
lola: REM DEA TR: t = t32
lola: REM DEA TR: t = t82
lola: REM DEA TR: t = t136
lola: REM DEA TR: t = t243
lola: REM DEA TR: t = t318
lola: REM DEA TR: t = t34
lola: REM DEA TR: t = t70
lola: REM DEA TR: t = t138
lola: REM DEA TR: t = t249
lola: REM DEA TR: t = t320
lola: REM DEA TR: t = t59
lola: REM DEA TR: t = t121
lola: REM DEA TR: t = t24
lola: REM DEA TR: t = t62
lola: REM DEA TR: t = t124
lola: REM DEA TR: t = t310
lola: REM DEA TR: t = t26
lola: REM DEA TR: t = t80
lola: REM DEA TR: t = t126
lola: REM DEA TR: t = t312
lola: REM DEA TR: t = t89
lola: REM DEA TR: t = t90
lola: REM DEA TR: t = t67
lola: REM DEA TR: t = t68
lola: REM DEA TR: t = t69
lola: REM DEA TR: t = t60
lola: REM DEA TR: t = t61
lola: REM DEA TR: t = t31
lola: REM DEA TR: t = t135
lola: REM DEA TR: t = t242
lola: REM DEA TR: t = t317
lola: REM DEA TR: t = t33
lola: REM DEA TR: t = t137
lola: REM DEA TR: t = t248
lola: REM DEA TR: t = t319
lola: REM DEA TR: t = t23
lola: REM DEA TR: t = t123
lola: REM DEA TR: t = t309
lola: REM DEA TR: t = t25
lola: REM DEA TR: t = t125
lola: REM DEA TR: t = t311
lola: STP: formula with 89 variables and 250 clauses shipped to Minisat
lola: A deadlock is reachable.
lola: A deadlock is reachable.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NeoElection-COL-2"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is NeoElection-COL-2, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r144-tall-162089134500071"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/NeoElection-COL-2.tgz
mv NeoElection-COL-2 execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;