fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r137-tall-162089122200492
Last Updated
Jun 28, 2021

About the Execution of LoLA for PermAdmissibility-COL-20

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
5919.544 330547.00 340787.00 739.90 ?F?FF?F?FTFTT?TF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r137-tall-162089122200492.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is PermAdmissibility-COL-20, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r137-tall-162089122200492
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 448K
-rw-r--r-- 1 mcc users 14K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 123K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 15K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 108K May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K Mar 28 16:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Mar 28 16:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 28 16:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 28 16:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Mar 27 06:59 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Mar 27 06:59 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 25 08:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K Mar 25 08:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 22 09:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 22 09:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 3 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 54K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-20-00
FORMULA_NAME PermAdmissibility-COL-20-01
FORMULA_NAME PermAdmissibility-COL-20-02
FORMULA_NAME PermAdmissibility-COL-20-03
FORMULA_NAME PermAdmissibility-COL-20-04
FORMULA_NAME PermAdmissibility-COL-20-05
FORMULA_NAME PermAdmissibility-COL-20-06
FORMULA_NAME PermAdmissibility-COL-20-07
FORMULA_NAME PermAdmissibility-COL-20-08
FORMULA_NAME PermAdmissibility-COL-20-09
FORMULA_NAME PermAdmissibility-COL-20-10
FORMULA_NAME PermAdmissibility-COL-20-11
FORMULA_NAME PermAdmissibility-COL-20-12
FORMULA_NAME PermAdmissibility-COL-20-13
FORMULA_NAME PermAdmissibility-COL-20-14
FORMULA_NAME PermAdmissibility-COL-20-15

=== Now, execution of the tool begins

BK_START 1620951429148

starting LoLA
BK_INPUT PermAdmissibility-COL-20
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
LTLCardinality

FORMULA PermAdmissibility-COL-20-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-COL-20-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-COL-20-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-COL-20-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-COL-20-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-COL-20-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-COL-20-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-COL-20-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-COL-20-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-COL-20-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-COL-20-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620951759695

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/LTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:122
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:141
lola: rewrite Frontend/Parser/formula_rewrite.k:141
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:424
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: NOTDEADLOCKFREE
lola: start findlow
lola: CHECK FINDLOW FOR TRANS display1
lola: INVENT VAR FOR PLACE aux15
lola: INVENT VAR FOR PLACE aux13
lola: INVENT VAR FOR PLACE c17
lola: CHECK EQ TRANS display1
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 62 (type SKEL/FNDP) for 18 PermAdmissibility-COL-20-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: TR BINDINGS
lola: LAUNCH task # 63 (type SKEL/EQUN) for 18 PermAdmissibility-COL-20-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 64 (type SKEL/SRCH) for 18 PermAdmissibility-COL-20-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type SKEL/SRCH) for 18 PermAdmissibility-COL-20-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 62 (type SKEL/FNDP) for PermAdmissibility-COL-20-06
lola: result : true
lola: fired transitions : 14
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 65 (type SKEL/SRCH) for PermAdmissibility-COL-20-06
lola: result : unknown
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH INITIAL
lola: LAUNCH task # 5 (type SKEL/CNST) for 3 PermAdmissibility-COL-20-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 11 (type SKEL/CNST) for 9 PermAdmissibility-COL-20-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: CANCELED task # 63 (type EQUN) for PermAdmissibility-COL-20-06 (obsolete)
lola: CANCELED task # 64 (type SRCH) for PermAdmissibility-COL-20-06 (obsolete)
lola: FINISHED task # 5 (type SKEL/CNST) for PermAdmissibility-COL-20-01
lola: result : false
lola: FINISHED task # 11 (type SKEL/CNST) for PermAdmissibility-COL-20-03
lola: result : false
sara: try reading problem file /home/mcc/execution/LTLCardinality-63.sara.
sara: place or transition ordering is non-deterministic

lola: CHECK FINDLOW FOR TRANS display2
lola: FINISHED task # 63 (type SKEL/EQUN) for PermAdmissibility-COL-20-06
lola: result : true
lola: TR BINDINGS DONE
lola: Places: 208, Transitions: 1024
lola: INVENT VAR FOR PLACE aux15
lola: INVENT VAR FOR PLACE aux13
lola: INVENT VAR FOR PLACE c18
lola: CHECK EQ TRANS display2
lola: @ trans switch9
lola: @ trans switch3
lola: @ trans switch4
lola: @ trans display4
lola: @ trans display3
lola: @ trans switch7
lola: @ trans switch8
lola: @ trans switch11
lola: @ trans switch10
lola: @ trans switch2
lola: @ trans switch1
lola: @ trans switch5
lola: @ trans switch12
lola: @ trans display2
lola: @ trans display1
lola: CHECK FINDLOW FOR TRANS display3
lola: @ trans switch6
lola: INVENT VAR FOR PLACE c19
lola: INVENT VAR FOR PLACE aux16
lola: INVENT VAR FOR PLACE aux14
lola: CHECK EQ TRANS display3
lola: CHECK FINDLOW FOR TRANS display4
lola: INVENT VAR FOR PLACE aux14
lola: INVENT VAR FOR PLACE aux16
lola: INVENT VAR FOR PLACE c20
lola: CHECK EQ TRANS display4
lola: Rule S: 432 transitions removed,40 places removed
lola: CHECK FINDLOW FOR TRANS switch10
lola: INVENT VAR FOR PLACE c14
lola: INVENT VAR FOR PLACE aux9
lola: INVENT VAR FOR PLACE aux11
lola: CHECK EQ TRANS switch10
lola: CHECK FINDLOW FOR TRANS switch11
lola: INVENT VAR FOR PLACE c15
lola: INVENT VAR FOR PLACE aux12
lola: INVENT VAR FOR PLACE aux10
lola: CHECK EQ TRANS switch11
lola: LAUNCH task # 52 (type EXCL) for 51 PermAdmissibility-COL-20-13
lola: time limit : 109 sec
lola: memory limit: 32 pages
lola: CHECK FINDLOW FOR TRANS switch12
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 67 (type FNDP) for 18 PermAdmissibility-COL-20-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type EQUN) for 18 PermAdmissibility-COL-20-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 70 (type SRCH) for 18 PermAdmissibility-COL-20-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: INVENT VAR FOR PLACE c16
lola: INVENT VAR FOR PLACE aux12
lola: INVENT VAR FOR PLACE aux10
lola: CHECK EQ TRANS switch12
lola: FINISHED task # 70 (type SRCH) for PermAdmissibility-COL-20-06
lola: result : true
lola: markings : 16
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 67 (type FNDP) for PermAdmissibility-COL-20-06 (obsolete)
lola: CANCELED task # 68 (type EQUN) for PermAdmissibility-COL-20-06 (obsolete)
lola: FINISHED task # 67 (type FNDP) for PermAdmissibility-COL-20-06
lola: result : unknown
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/LTLCardinality-68.sara.
lola: CHECK FINDLOW FOR TRANS switch1
lola: INVENT VAR FOR PLACE in1
lola: INVENT VAR FOR PLACE in3
lola: INVENT VAR FOR PLACE c5
lola: CHECK EQ TRANS switch1
sara: place or transition ordering is non-deterministic
lola: CHECK FINDLOW FOR TRANS switch2
lola: INVENT VAR FOR PLACE in1
lola: INVENT VAR FOR PLACE in3
lola: INVENT VAR FOR PLACE c6
lola: CHECK EQ TRANS switch2

lola: FINISHED task # 68 (type EQUN) for PermAdmissibility-COL-20-06
lola: result : true
lola: CHECK FINDLOW FOR TRANS switch3
lola: INVENT VAR FOR PLACE in2
lola: INVENT VAR FOR PLACE in4
lola: INVENT VAR FOR PLACE c7
lola: CHECK EQ TRANS switch3
lola: CHECK FINDLOW FOR TRANS switch4
lola: INVENT VAR FOR PLACE in2
lola: INVENT VAR FOR PLACE c8
lola: INVENT VAR FOR PLACE in4
lola: CHECK EQ TRANS switch4
lola: CHECK FINDLOW FOR TRANS switch5
lola: INVENT VAR FOR PLACE aux5
lola: INVENT VAR FOR PLACE c9
lola: INVENT VAR FOR PLACE aux7
lola: CHECK EQ TRANS switch5
lola: CHECK FINDLOW FOR TRANS switch6
lola: INVENT VAR FOR PLACE c110
lola: INVENT VAR FOR PLACE aux5
lola: INVENT VAR FOR PLACE aux7
lola: CHECK EQ TRANS switch6
lola: CHECK FINDLOW FOR TRANS switch7
lola: INVENT VAR FOR PLACE c11
lola: INVENT VAR FOR PLACE aux8
lola: INVENT VAR FOR PLACE aux6
lola: CHECK EQ TRANS switch7
lola: CHECK FINDLOW FOR TRANS switch8
lola: INVENT VAR FOR PLACE c12
lola: INVENT VAR FOR PLACE aux8
lola: INVENT VAR FOR PLACE aux6
lola: CHECK EQ TRANS switch8
lola: CHECK FINDLOW FOR TRANS switch9
lola: INVENT VAR FOR PLACE c13
lola: INVENT VAR FOR PLACE aux9
lola: INVENT VAR FOR PLACE aux11
lola: CHECK EQ TRANS switch9
lola: findlow criterion satisfied
lola: Time for checking findlow: 1.000000
lola: TRANS 0: display1 is minimal, eq to 0
lola: TRANS 1: display2 is minimal, eq to 1
lola: TRANS 2: display3 is minimal, eq to 2
lola: TRANS 3: display4 is minimal, eq to 3
lola: TRANS 4: switch10 is minimal, eq to 4
lola: TRANS 5: switch11 is minimal, eq to 5
lola: TRANS 6: switch12 is minimal, eq to 6
lola: TRANS 7: switch1 is minimal, eq to 7
lola: TRANS 8: switch2 is minimal, eq to 8
lola: TRANS 9: switch3 is minimal, eq to 9
lola: TRANS 10: switch4 is minimal, eq to 10
lola: TRANS 11: switch5 is minimal, eq to 11
lola: TRANS 12: switch6 is minimal, eq to 12
lola: TRANS 13: switch7 is minimal, eq to 13
lola: TRANS 14: switch8 is minimal, eq to 14
lola: TRANS 15: switch9 is minimal, eq to 15
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: HLFINDLOW
lola: LAUNCH task # 75 (type SKEL/SRCH) for 28 PermAdmissibility-COL-20-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SKEL/SRCH) for 0 PermAdmissibility-COL-20-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/SRCH) for 6 PermAdmissibility-COL-20-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 75 (type SKEL/SRCH) for PermAdmissibility-COL-20-08
lola: result : false
lola: markings : 321
lola: fired transitions : 321
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 72 (type SKEL/SRCH) for 38 PermAdmissibility-COL-20-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 72 (type SKEL/SRCH) for PermAdmissibility-COL-20-10
lola: result : false
lola: markings : 321
lola: fired transitions : 321
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 76 (type SKEL/SRCH) for 28 PermAdmissibility-COL-20-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 76 (type SKEL/SRCH) for PermAdmissibility-COL-20-08
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 84 (type SKEL/SRCH) for 57 PermAdmissibility-COL-20-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 84 (type SKEL/SRCH) for PermAdmissibility-COL-20-15
lola: result : false
lola: markings : 322
lola: fired transitions : 323
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 83 (type SKEL/SRCH) for 54 PermAdmissibility-COL-20-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 83 (type SKEL/SRCH) for PermAdmissibility-COL-20-14
lola: result : true
lola: markings : 73526
lola: fired transitions : 197288
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 74 (type SKEL/SRCH) for 45 PermAdmissibility-COL-20-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 74 (type SKEL/SRCH) for PermAdmissibility-COL-20-11
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 78 (type SKEL/SRCH) for 35 PermAdmissibility-COL-20-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 78 (type SKEL/SRCH) for PermAdmissibility-COL-20-09
lola: result : true
lola: markings : 7
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
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1 LTL EXCL 150/3425 32/32 PermAdmissibility-COL-20-00 4793189 m, 27803 m/sec, 44761592 t fired, .

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# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 1 (type EXCL) for PermAdmissibility-COL-20-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PermAdmissibility-COL-20-01: INITIAL false skeleton: preprocessing
PermAdmissibility-COL-20-03: INITIAL false skeleton: preprocessing
PermAdmissibility-COL-20-04: LTL false LTL model checker
PermAdmissibility-COL-20-06: CONJ false search / frozen tokens
PermAdmissibility-COL-20-08: CONJ false LTL model checker
PermAdmissibility-COL-20-09: LTL true skeleton: LTL model checker
PermAdmissibility-COL-20-10: CONJ false skeleton: LTL model checker
PermAdmissibility-COL-20-11: LTL true skeleton: LTL model checker
PermAdmissibility-COL-20-12: LTL true skeleton: LTL model checker
PermAdmissibility-COL-20-14: LTL true skeleton: LTL model checker
PermAdmissibility-COL-20-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PermAdmissibility-COL-20-00: LTL 0 0 0 0 0 0 2 0
PermAdmissibility-COL-20-02: LTL 0 0 0 0 0 0 2 0
PermAdmissibility-COL-20-05: LTL 0 0 0 0 0 0 2 0
PermAdmissibility-COL-20-07: LTL 0 0 0 0 0 0 2 0
PermAdmissibility-COL-20-13: LTL 0 0 0 0 0 0 2 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PermAdmissibility-COL-20-00: LTL unknown AGGR
PermAdmissibility-COL-20-01: INITIAL false skeleton: preprocessing
PermAdmissibility-COL-20-02: LTL unknown AGGR
PermAdmissibility-COL-20-03: INITIAL false skeleton: preprocessing
PermAdmissibility-COL-20-04: LTL false LTL model checker
PermAdmissibility-COL-20-05: LTL unknown AGGR
PermAdmissibility-COL-20-06: CONJ false search / frozen tokens
PermAdmissibility-COL-20-07: LTL unknown AGGR
PermAdmissibility-COL-20-08: CONJ false LTL model checker
PermAdmissibility-COL-20-09: LTL true skeleton: LTL model checker
PermAdmissibility-COL-20-10: CONJ false skeleton: LTL model checker
PermAdmissibility-COL-20-11: LTL true skeleton: LTL model checker
PermAdmissibility-COL-20-12: LTL true skeleton: LTL model checker
PermAdmissibility-COL-20-13: LTL unknown AGGR
PermAdmissibility-COL-20-14: LTL true skeleton: LTL model checker
PermAdmissibility-COL-20-15: LTL false LTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-20"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is PermAdmissibility-COL-20, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r137-tall-162089122200492"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-20.tgz
mv PermAdmissibility-COL-20 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;